Z1031A

AOZ1031AIEZBuck™ 3A Synchronous Buck Regulator General Description Features The AOZ1031A is a high efficiency, easy to use, 3A z 4.5V to 18V operating input voltage range synchronous buck regulator. The AOZ1031A works from z Synchronous Buck: 80mΩ internal high-side switch 4.5V to 18V input voltage range, and provides up to 3A of and 30mΩ internal low-side switch with integrated continuous output current with an output voltage adjust- schottky diode able down to 0.8V. z High efficiency: up to 95% The AOZ1031A comes in a SO-8 package and is rated z Internal soft start over a -40°C to +85°C operating ambient temperature z Output voltage adjustable to 0.8V range. z 3A continuous output current z Fixed 600kHz PWM operation z Pulse skipping at light load for high efficiency over entire load range z Cycle-by-cycle current limit z Pre-bias start-up z Short-circuit protection z Thermal shutdown z SO-8 package Applications z Point of load DC/DC converters z LCD TV z Set top boxes z DVD/Blu-ray players/recorders z Cable modems z PCIe graphics cards z Telecom/Networking/Datacom equipment Typical Application VIN C1 22µF VIN L1 4.7µH EN VOUT AOZ1031 LX COMP R1 C2, C3 RC FB 22µF CC AGND PGND R2 Figure 1. 3.3V 3A Synchronous Buck Regulator Rev. 1.6 March 2010 www.aosmd.com Page 1 of 15 jsp for additional information.aosmd. 2 VIN Supply voltage input. 8 LX Switching node. PWM output connection to inductor. When VIN rises above the UVLO threshold and EN is logic high. the device starts up. and are also RoHS compliant. Please visit www.com Page 2 of 15 .aosmd. AGND needs to be electrically connected to PGND. 7. Pin Configuration PGND 1 8 LX VIN 2 7 LX AGND 3 6 EN FB 4 5 COMP SO-8 (Top View) Pin Description Pin Number Pin Name Pin Function 1 PGND Power ground. 4 FB Feedback input. 1.6 March 2010 www. Pull EN to logic high to enable the device. Do not leave it open. PGND needs to be electrically connected to AGND. AOZ1031AI Ordering Information Part Number Ambient Temperature Range Package Environmental AOZ1031AI -40°C to +85°C SO-8 RoHS Compliant Green Product AOS Green Products use reduced levels of Halogens. 3 AGND Analog ground. 5 COMP External loop compensation pin. The FB pin is used to set the output voltage via a resistive voltage divider between the output and AGND. 6 EN Enable pin. Pull EN to logic low to disable the device.com/web/quality/rohs_compliant. AGND is the reference point for controller section. Connect a RC network between COMP and AGND to compensate the control loop. Rev. 5kΩ in series with 100pF.5V to 18V LX to AGND -0.3V Package Thermal Resistance FB to AGND -0. Rev. Devices are inherently ESD sensitive. Parameter Rating Parameter Rating Supply Voltage (VIN) 20V Supply Voltage (VIN) 4.aosmd. handling precautions are required.3V to 6V SO-8 (ΘJA) 87°C/W COMP to AGND -0. AOZ1031AI Block Diagram VIN EN UVLO 5V LDO Internal OTP & POR Regulator +5V + ISen – Reference Softstart & Bias Q1 ILimit + + PWM Level 0. Human body model rating: 1.15W Storage Temperature (TS) -65°C to +150°C ESD Rating(1) 2.0kV Note: 1.2V – Over-Voltage Protection Comparator + 0.3V to VIN+0.8V to VIN LX to AGND -3V for 20 nS Ambient Temperature (TA) -40°C to +85°C EN to AGND -0.8V PWM Shifter EAmp – Control FB – Comp + Logic + FET LX Driver Q2 COMP Frequency Foldback 600kHz Comparator + 0.96V – AGND PGND Absolute Maximum Ratings Recommend Operating Ratings Exceeding the Absolute Maximum ratings may damage the The device is not guaranteed to operate beyond the Maximum device. 1.3V to +0.3V Package Power Dissipation (PD) @ 25°C Ambient Junction Temperature (TJ) +150°C SO-8 1.3V Output Voltage Range 0.3V to 6V SO-8 (ΘJC) 30°C/W PGND to AGND -0.com Page 3 of 15 .7V to VIN+0.6 March 2010 www. Operating Ratings. VFB = 1.8 0. VEN >1. VOUT = 3.com Page 4 of 15 .(3) Symbol Parameter Conditions Min.788 0.812 V Load regulation 0.6 March 2010 www.6 V On threshold 2 V VHYS EN input hysteresis 100 mV MODULATOR fO Frequency 500 600 700 kHz DMAX Maximum Duty Cycle 100 % DMIN Minimum Duty Cycle 9 % Error amplifier voltage gain 500 V/V Error amplifier transconductance 200 μA / V PROTECTION ILIM Current Limit 4.2 ms OUTPUT STAGE High-side switch on-resistance VIN = 12V 80 100 mΩ VIN = 5V 130 180 mΩ Low-side switch on-resistance VIN = 12V 30 36 mΩ VIN = 5V 56 70 mΩ Notes: 3. Rev.6 2.0 5. Max.2V. The device is not guaranteed to operate beyond the Maximum Operating ratings.2V 1. Units VIN Supply Voltage 4.3V unless otherwise specified. 1.aosmd.5 mA IOFF Shutdown supply current VEN = 0V 1 10 μA VFB Feedback Voltage TA = 25°C 0. VIN = VEN = 12V.7 V IIN Supply current (Quiescent) IOUT = 0.5 18 V VUVLO Input under-voltage lockout VIN rising 4.1 V threshold VIN falling 3. AOZ1031AI Electrical Characteristics TA = 25°C. Typ.0 A VOVP Over-Voltage Protection Off threhsold 960 mV On threshold 860 mV Over-temperature shutdown limit TJ rising 150 °C TJ falling 100 °C tSS Soft Start Interval 2.5 % Line regulation 1 % IFB Feedback voltage input current 200 nA VEN EN input threshold Off threshold 0. Light Load (DCM) Operation Full Load (CCM) Operation 1us/div 1us/div Start Up to Full Load Short Circuit Protection 1ms/div 4ms/div 50% to 100% Load Transient Short Circuit Recovery 100us/div 10ms/div Rev. 1.com Page 5 of 15 .aosmd. TA = 25°C. VIN = VEN = 12V. AOZ1031AI Typical Performance Characteristics Circuit of Figure 1. VOUT = 3.3V unless otherwise specified.6 March 2010 www. 5 2.0 1.3V.3V 50 VO = 3.0 IOUT (A) IOUT (A) Thermal Derating Thermal de-rating curves for SO-8 package part under typical input and output condition based on the evaluation board.0V Output 3 3 3.0 2.8V. Load Current Efficiency (VIN = 5V) vs.5 3. 1.3V VO = 5V 40 40 30 30 20 20 10 10 0 0 0 0.2V.5 1.2V 60 VO = 1. 1.0 1.5 2. 3.aosmd.0 0 0.5 3. 1.8V VO = 1.3V Output 2 2 1 1 0 0 25 35 45 55 65 75 85 25 35 45 55 65 75 85 Ambient Temperature (TA) Ambient Temperature (TA) Rev.6 March 2010 www.5 1.0 2. Derating Curves at 5V/6V Input Derating Curves at 12V Input 5 5 4 4 Output Current (IO) Output Current (IO) 1. 5.2V VO = 1. Load Current 100 100 90 90 80 80 70 70 Efficiency (%) Efficiency (%) 60 VO = 1.8V Output 1. AOZ1031AI Efficiency AOZ1031AI Efficiency Efficiency (VIN = 12V) vs.8V 50 VO = 3.2V. 25°C ambient temperature and natural convection (air speed < 50LFM) unless otherwise specified.com Page 6 of 15 . Power-On Reset. The AOZ1031A uses a P-Channel MOSFET as the The AOZ1031A is available in SO-8 package. Output voltage is divided down by application circuit shown in Figure 1. Some standard value of R1. is compared against the current signal. the output volt- V O_MAX = V IN – I O × R DS ( ON ) age is ramped to regulation voltage in typically 2. the AOZ1031A uses freewheeling NMOSFET to The AOZ1031A is a current-mode step down regulator realize synchronous rectification. Several pulses may be skipped in control. It Enable and Soft Start allows 100% turn-on of the high-side switch to achieve The AOZ1031A has internal soft start feature to limit linear regulation mode of operation.6V. The value is AOZ1031A is disabled. The minimum volt- in-rush current and ensure the output voltage ramps up age drop from VIN to VO is the load current times DC smoothly to regulation voltage. high-side switch. which is sum of inductor current signal ⎛ R 1⎞ and ramp compensation signal.2ms soft start time is set internally. EN pin to VIN if enable function is not used. Do not leave it open. Switching Frequency Steady-State Operation The AOZ1031A switching frequency is fixed and set by Under steady-state conditions. Usually. an open drain or open col- lector circuit should be used to interface to EN pin. If an application circuit requires between 97mΩ and 200mΩ depending on input voltage and junction temperature. the RDS(ON) is the on resistance of internal MOSFET. input under voltage lockout. age range and supplies up to 3A of load current. the voltage values are listed in Table 1 on the next page. Rev. Inductor current is sensed by amplifying Output voltage can be set by feeding back the output to the voltage drop across the drain to source of the high the FB pin by using a resistor divider network. In the side power MOSFET. Pull it to VIN is the input voltage from 4. ⎝ R 2⎠ the internal high-side switch is on.1V and voltage tor. If the current signal is less than the error voltage. A soft start process resistance of MOSFET plus DC resistance of buck induc- begins when the input voltage rises to 4. The practical switching frequency in fixed frequency and Continuous-Conduction Mode could range from 500kHz to 700kHz due to device varia- (CCM).8 × ⎜ 1 + -------⎟ input.5V to 18V. It operates from a 4.aosmd.2ms. tion. The inductor current flows from the input through the inductor to the output. It saves the bootstrap capacitor nor- mally seen in a circuit which is using an NMOS switch. The error volt- R1 with equation below. which shows on the COMP pin. the AOZ1031A to be disabled. It greatly improves the with integrated high-side PMOS switch and a low-side converter efficiency and reduces power loss in the NMOS switch. The inductor current is freewheel- ing through the internal low-side N-MOSFET switch to output. When voltage on EN pin falls below 0. where. it further output over voltage protection. The difference network includes R1 and R2. age. AOZ1031AI Detailed Description Comparing with regulators using freewheeling Schottky diodes.6 March 2010 www. The EN pin of the AOZ1031A is active high. R2 and most used output When the current signal exceeds the error voltage. In soft start process. the converter operates an internal oscillator. It can be calculated by equation below: on EN pin is HIGH. ground will disable the AOZ1031A. a design is started of the FB pin voltage and reference is amplified by the by picking a fixed R2 value and calculating the required internal transconductance error amplifier. at PWM comparator V O = 0.com Page 7 of 15 . active high power good improving light load efficiency. IO is the output current from 0A to 3A. and The voltage on EN pin must be above 2V to enable the AOZ1031A. between switching cycles at very light load. state. Features include enable mode at light load. Connect the VO_MAX is the maximum output voltage. The duty cycle can be adjusted from 6% to 100% allowing a The AOZ1031A will enter the discontinuous conduction wide range of output voltage.. 1. The internal adaptive FET driver guarantees no turn on overlap of both high-side and low-side switch. fixed internal soft-start and thermal shut down. The resistor divider the external voltage divider at the FB pin. The AOZ1031A integrates an internal P-MOSFET as the Output Voltage Programming high-side switch. The 2.5V to 18V input volt- low-side switch. high-side switch is off. of input capacitor must be greater than maximum input vent system circuit damage under abnormal conditions. then the chip will be off again. If the over-current condition I CIN_RMS = I O × -------- . voltage plus ripple voltage. the Figure 1. VO -------- . VO ⎛ VO ⎞ current condition occurs. The input capacitor must be connected to the VIN pin and PGND pin of AOZ1031A to maintain steady input voltage Protection Features and filter out the pulsing input current. The worst current stress on CIN is 0. The voltage rating The AOZ1031A has multiple protection features to pre. Application Information The basic AOZ1031A application circuit is show in Since the switch duty cycle can be as high as 100%.1 10 high side PMOS if the junction temperature exceeds 5. Component selection is explained below. ΔV IN = ----------------.4V and 2.0 open ation. The converter will initiate a soft if we let m equal the conversion ratio: start once the over-current condition disappears. When the input voltage exceeds 4. which will cause power loss.8 12. The COMP pin volt. If the fault is still there. To prevent cata- strophic failure.2 An internal temperature sensor monitors the junction 2.7V.8 1.0 52.3 31.5 10 11.aosmd.5 x IO.6 March 2010 www. the converter starts oper- 0. Power-On Reset (POR) Vo (V) R1 (kΩ) R2 (kΩ) A power-on reset circuit monitors the input voltage. the COMP pin voltage is propor. The peak inductor current is automatically limited cycle Since the input current is discontinuous in a buck con- by cycle. Since the AOZ1031A employs peak IO ⎛ VO ⎞ VO current mode control. When the output is shorted to ground under fault condi.com Page 8 of 15 .3 10 150°C.5 Thermal Protection 1. verter.5V internally.⎜ 1 – -------- -⎟ V IN ⎝ V IN⎠ occurs for certain period. the RMS value of input capacitor current can be calcu- tions.5 21.99 10 will be shut down. When input voltage falls below 3. the converter 1.1V. maximum output voltage can be set as high as the input voltage minus the voltage drop on upper PMOS and Input Capacitor inductor. Rev. f × C IN ⎝ V IN⎠ V IN age is limited to be between 0. avoid drawing excessive current from the output. AOZ1031AI Table 1. AOZ1031A detects the duration the over. the current stress on the input capacitor is another concern when selecting the capacitor.5 10 temperature.7 10.= m V IN The relation between the input capacitor RMS current and voltage conversion ratio is calculated and shown in Figure 2 on the next page. the inductor current decays very slow during a lated by: switching cycle because of Vo=0V. The regulator will restart automatically under the control of soft-start circuit when the junction temperature The combination of R1 and R2 should be large enough to decreases to 100°C.2 4. It can be seen that when VO is half of VIN. then restarts. CIN is under the worst current stress. For a buck circuit.× ⎜ 1 – ---------⎟ × --------- tional to the peak inductor current. AOZ1013A totally turns off for a period of time. 1. Over Current Protection (OCP) The input ripple voltage can be approximated by equa- The sensed inductor current signal is also used for over tion below: current protection. 1. It shuts down the internal control circuit and 3. 3 inductors are small and radiate less EMI noise. other low ESR tantalum capacitor may also be verter circuit.2 depends on EMI requirement. and when it is driven by a switching voltage. which ΔV O = ΔI L × ESR CO results in less conduction loss. ICIN vs. ing temperature range. X5R or X7R dielectric type of ceramic. output capacitor type dielectric ceramic capacitors should be used for value and ESR. ple voltage calculation can be further simplified to: ple current reduces inductor core losses. 0.× ⎜ 1 – -------- -⎟ f×L ⎝ V IN⎠ capacitor value and inductor ripple current. The inductor is used to supply constant current to output CO is output capacitor value. The output rip- requires larger size inductor to avoid saturation. Note below: that the ripple current rating from capacitor manufactures ΔV O = ΔI L × ⎛ ESR CO + -------------------------⎞ 1 are based on certain amount of life time. Output ripple is mainly caused by ΔI L = ----------. switching frequency. The output ripple voltage calculation can be simplified to: 1 The peak inductor current is: ΔV O = ΔI L × ------------------------- 8×f×C ΔI L O I Lpeak = I O + -------- 2 If the impedance of ESR at switching frequency domi- nates. The choice 0. the input voltage including ripple. at worst operating conditions. factor for selecting the output capacitor. output ripple voltage is determined by used. Further ⎝ 8×f×C ⎠ de-rating may be necessary in practical design. Usually. Ceramic capacitors are preferred for input capacitors because of their low ESR Output ripple voltage specification is another important and high current rating. Rev.aosmd. price and size. Figure 2. Low rip. 0. peak to peak rip- ple current on inductor is designed to be 20% For lower output ripple voltage across the entire operat- to 30% of output current.6 March 2010 www. which is: When low ESR ceramic capacitor is used as output capacitor. When selecting ceramic capacitors. make sure it is able to han. inductance and switching frequency together decide the inductor ripple current. De-rating needs to be consid- capacitors must have current rating higher than ICIN_RMS ered for long term reliability. and output voltage. Elytone and Murata.com Page 9 of 15 . the output ripple voltage is mainly decided by High inductance gives low inductor ripple current but capacitor ESR and inductor ripple current. It also reduces RMS current through inductor and switches. X5R or X7R inductor value.5 The conduction loss on inductor need to be checked for thermal and efficiency requirements. output ripple voltage specification and rip- m ple current rating. Shielded ICIN_RMS(m) 0. AOZ1031AI The inductor takes the highest current in a buck circuit. 0. dle the peak current without saturation even at the high- est operating temperature. O Inductor where. For given input ESRCO is the Equivalent Series Resistor of output capacitor. It can be calculated by the equation their better temperature and voltage characteristics. or other low ESR tantalum are recommended to When selecting the inductor. be used as output capacitors. Voltage Conversion Ratio The selected output capacitor must have a higher rated voltage specification than the maximum desired output For reliable operation and best performance.1 Output Capacitor The output capacitor is selected based on the DC output 0 0 0. Depending on the application cir. 1. But they IO cost more than unshielded inductors.5 1 voltage rating. the impedance of the capacitor at the switching VO ⎛ VO ⎞ frequency dominates. In a buck con- cuits.4 Surface mount inductors in different shape and styles are available from Coilcraft. Peak current mode Generally a higher bandwidth means faster response to control eliminates the double pole effect of the output load transient. where. I CO_RMS = ---------- 12 The zero given by the external compensation network. The compensation design is actually to shape the con. For best performance. which is 6. and COMP pin sets the pole-zero and is adequate for a stable GCS is the current sense circuit transconductance. fC is verter control loop transfer function to get desired gain set to be about 1/10 of switching frequency. It greatly simplifies the compensation loop high because of system stability concern. FB pin and COMP pin are the inverting The compensation capacitor CC and resistor RC together input and the output of internal error amplifier. ous. and ΔI L C2 is compensation capacitor in Figure 1. 200 x 10-6 A/V. R C = f C × ---------. it is recommended to set the bandwidth to be in frequency domain. When 1 f Z2 = ----------------------------------- the buck inductor is selected to be very small and induc. f C = 40kHz The zero is a ESR zero due to output capacitor and its ESR. It is recommended to choose a crossover fre- f P1 = ----------------------------------- 2π × C O × R L quency equal or less than 40kHz. A/V. capacitor C2 and resistor R3. The system Loop Compensation crossover frequency is where control loop has unity gain. where.5 f P2 = ------------------------------------------. which is 500 V/V. the buck power stage can be simplified to be a one-pole and one-zero system Usually. The pole is: over frequency. CC can is selected by: G EA 1. When design- design. To design the compensation circuit. and ESRCO is the equivalent series resistance of output capacitor. The calculated by: AOZ1031A operates at a frequency range from 500kHz 1 to 700kHz. It is can be calculated by: The strategy for choosing RC and CC is to set the cross 1 over frequency with RC and set the compensator zero f Z1 = ------------------------------------------------ 2π × C O × ESR CO with CC. lated by: GVEA is the error amplifier voltage gain. In the AOZ1031A. The pole is dominant pole can be equal or less than 1/10 of switching frequency. The RMS current of output capacitor is decided by GEA is the error amplifier transconductance.68 high-bandwidth control loop. which is the peak to peak inductor ripple current. converter stability under all line and load condition must be considered. AOZ1031AI In a buck converter. and phase. ing the compensation loop. Several different types of compensation net. A series R make a zero. 1. However. fC.× ----------------------------- - V G ×G FB EA CS RL is load resistor value. a target crossover frequency fC for close loop must be selected. With peak current mode control. the bandwidth should not be too L&C filter. VFB is 0. work can be used for the AOZ1031A. The AOZ1031A employs peak current mode control for The crossover is the also called the converter bandwidth. dominate pole fP1 but lower than 1/5 of selected cross- vides one pole and one zero. fC is desired crossover frequency. output capacitor could be over- stressed. This zero is put somewhere close to the and C compensation network connected to COMP pro. is located at: Usually. output capacitor current is continu.com Page 10 of 15 .8V. easy use and fast transient response. a GEA is the error amplifier transconductance.6 March 2010 www. For most cases. to calcu- late RC: where. 2π × C C × R C tor ripple current is high. It can be calcu. which is series capacitor and resistor network connected to the 200 x 10-6 A/V. Using selected crossover frequency.aosmd. C C = ----------------------------------- 2π × C C × G VEA 2π × R C × f P1 Rev. VO 2π × C 2 CO is the output filter capacitor. the ripple current rating of the output capacitor is a smaller issue because of the low current stress. Several lay- Consideration out tips are listed below for the best electric and thermal performance. 1.aosmd. Current duction path and most noisy switching node.com Page 11 of 15 . tions.com. to the LX pins. The first loop starts from the input capacitors. In the AOZ1031A buck regulator circuit. AOZ1031AI Equation above can also be simplified to: Please see the thermal de-rating curves for maximum load current of the AOZ1031A under different ambient CO × RL C C = --------------------. If a ground plane is not dissipating components are the AOZ1031A and the out. output capacitor.1 pins. Con- flows in the first loop when the high side switch is on. Pour a maximized copper area to the In PCB layout. RC The thermal performance of the AOZ1031A is strongly affected by the PCB layout. Pour copper plane on all unused board area and The power dissipation of inductor can be approximately connect it to stable DC nodes. The actual junction temperature can be calculated with power dissipation in the AOZ1031A and thermal imped- ance from junction to ambient.6 March 2010 www. which limits the maximum load current capability. the major power 4. used. only at one point to avoid the PGND pin noise cou- cuit can be measured by input power minus output pling to the AGND pin. 1. and the PGND pin as close as possible. high pulsing cur- layout example of AOZ1031A. to the low side NMOSFET. A ground tion. 3. The nected a large copper plane to LX pin to help thermal second loop starts from inductor. Thermal Management and Layout The AOZ1031A is standard SO-8 package. Figure 3 on the next page illustrates a PCB In the AOZ1031A buck regulator circuit.aosmd. Keep sensitive signal trace far away form the LX P inductor_loss = IO2 × R inductor × 1. rent flows through two circuit loops. and load. to the output capacitors dissipation. The LX pins are connected to internal PFET and to the filter inductor. Input capacitor should be connected to the VIN pin tor. and PGND pin of the AOZ1031A. to the output capacitor and load. temperature. plane is strongly recommended to connect input capaci. to the VIN pin. 5. minimizing the two loops area reduces the PGND pin and the VIN pin to help thermal dissipa- noise of this circuit and improves efficiency. 7. T junction = ( P total_loss – P inductor_loss ) × Θ JA The maximum junction temperature of AOZ1031A is 150°C. Make the current trace from LX pins to L to Co to the P total_loss = V IN × I IN – V O × I O PGND as short as possible. separate PGND from AGND and connect them put inductor. Current flows in the second loop when the low side NMOSFET is on. Extra care should be taken An easy-to-use application software which helps to by users during design process to ensure that the IC will design and simulate the compensation loop can be found operate under the recommended environmental condi- at www. power. They are low resistance thermal con- then return to the input capacitor through ground. VOUT. and NFET drains. Rev. The total power dissipation of converter cir. GND or calculated by output current and DCR of inductor. 2. A ground plane is preferred. 6. Do not use thermal relief connection to the VIN and the PGND pin. like VIN. aosmd. AOZ1031AI Figure 3. 1. AOZ1031A (SO-8) PCB layout Rev.6 March 2010 www.com Page 12 of 15 . 27 BSC e 0.1 b A1 Dimensions in millimeters Dimensions in inches Symbols Min.020 L 0.20 A 1.10 — 0.27 L 0.25 A1 0.31 — 0. Dimension L is measured in gauge plane. Nom.80 3. Nom.80 6.65 A2 0.010 — 0.020 5.244 h 0.065 b 0.016 — 0.74 c 0.150 0.25 — 0.00 D 0.157 1.40 — 1.065 0.00 E1 0.053 0.154 0.aosmd.228 0. SO-8L D Gauge Plane Seating Plane e 0.6 March 2010 www. Max.50 1.236 0.059 0.27 e 1.35 1.049 0. converted inch dimensions are not necessarily exact.010 D 4.com Page 13 of 15 .51 b 0.80 Unit: mm θ 0° — 8° θ 0° — 8° Notes: 1.50 h 0.050 BSC E 5. Mold flash at the non-lead sides should be less than 6 mils.25 8 L E E1 h x 45° 1 C θ 7° (4x) A2 A 0.007 — 0. All dimensions are in millimeters.80 4.20 E 0. Package body sizes exclude mold flash and gate burrs. Symbols Min.90 4.012 — 0.25 1.25 c 0.75 A 0. 2.65 1. AOZ1031AI Package Dimensions. 5.004 — 0.17 — 0.90 5.197 E1 3.050 0. Rev. Max. 2. 4.00 6. Controlling dimension is millimeter.189 0.010 A2 1.069 A1 0. 1.193 0. Dimensions are inclusive of plating 3. 50 SO-8 Tape Leader/Trailer & Orientation Trailer Tape Components Tape Leader Tape 300mm min.10 ±0.10 ±0.50 8.10 ±0.40 5.10 ±0.6 March 2010 www.00 ø97.50 ±0.60 2.40 ø13.20 2.20 ±0.00 17.75 5.10 1.00 4. or 75 empty pockets 125 empty pockets Rev.10 ±0.00 0.aosmd.10 ±0.50/-0.50 12.00 1.00 2.10 ±0.10 ±0. AOZ1031AI Tape and Reel Dimensions SO-8 Carrier Tape P1 See Note 3 D1 P2 T See Note 5 E1 E2 E See Note 3 B0 K0 D0 A0 P0 Feeding Direction Unit: mm Package A0 B0 K0 D0 D1 E E1 E2 P0 P1 P2 T SO-8 6.10 ±0.00 — — — ±0. or Orientation in Pocket 500mm min.00 +0.00 13. 1.10 ±0.com Page 14 of 15 .25 (12mm) ±0.10 ±0.00 10.10 ±0.30 ±1.10 SO-8 Reel W1 S G N K M V R H W Tape Size Reel Size M N W W1 H K S G R V 12mm ø330 ø330.60 1. reasonably expected to result in a significant injury of the user. As used herein: 1. AOZ1031AI AOZ1031 Package Marking Z1031AI Part Number Code FAYWLT Fab & Assembly Location Assembly Lot Code Year & Week Code This datasheet contains preliminary data. device. Alpha & Omega Semiconductor reserves the right to make changes at any time without notice. Life support devices or systems are devices or 2. 1.com Page 15 of 15 . LIFE SUPPORT POLICY ALPHA & OMEGA SEMICONDUCTOR PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS. can be effectiveness. Rev. supplementary data may be published at a later date. (a) are intended for surgical implant into support. A critical component in any component of a life systems which. or system whose failure to perform can the body or (b) support or sustain life.aosmd. or to affect its safety or with instructions for use provided in the labeling. and (c) whose be reasonably expected to cause the failure of the life failure to perform when properly used in accordance support device or system.6 March 2010 www.