TV+LG+LEDTV+42SL90QD-SA
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North/Latin America Europe/Africa Asia/Oceaniahttp://aic.lgservice.com http://eic.lgservice.com http://biz.lgservice.com LCD TV SERVICE MANUAL CHASSIS : LJ91L MODEL : 42SL90QD CAUTION 42SL90QD-SA BEFORE SERVICING THE CHASSIS, READ THE SAFETY PRECAUTIONS IN THIS MANUAL. P/NO : MFL61862416 (0911-REV01) Printed in Korea CONTENTS CONTENTS .............................................................................................. 2 PRODUCT SAFETY ..................................................................................3 SPECIFICATION ........................................................................................6 ADJUSTMENT INSTRUCTION ...............................................................10 EXPLODED VIEW .................................................................................. 17 SVC. SHEET ............................................................................................... -2- SAFETY PRECAUTIONS IMPORTANT SAFETY NOTICE Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by Schematic Diagram and Exploded View. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to pr Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer. in the event General Guidance An isolation Transformer should always be used during the servicing of a receiver whose chassis is not isolated from the AC power line. Use a transformer of adequate power rating as this protects the technician from accidents resulting in personal injury from electrical shocks. It will also protect the receiver and it's components from being damaged by accidental shorts of the circuitry that may be inadvertently introduced during the service operation. If any fuse (or Fusible Resistor) in this TV receiver is blown, replace it with the specified. When replacing a high wattage resistor (Oxide Metal Film Resistor, over 1W), keep the resistor 10mm away from PCB. Keep wires away from high voltage or high temperature parts. Leakage Current Hot Check (See below Figure) Plug the AC cord directly into the AC outlet. Do not use a line Isolation Transformer during this check. Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor between a known good earth ground (Water Pipe, Conduit, etc.) and the exposed metallic parts. Measure the AC voltage across the resistor using AC voltmeter with 1000 ohms/volt or more sensitivity. Reverse plug the AC cord into the AC outlet and repeat AC voltage measurements for each exposed metallic part. Any voltage measured must not exceed 0.75 volt RMS which is corresponds to 0.5mA. In case any measurement is out of the limits specified, there is possibility of shock hazard and the set must be checked and repaired before it is returned to the customer. Leakage Current Hot Check circuit AC Volt-meter Before returning the receiver to the customer, always perform an AC leakage current check on the exposed metallic parts of the cabinet, such as antennas, terminals, etc., to be sure the set is safe to operate without damage of electrical shock. Leakage Current Cold Check(Antenna Cold Check) With the instrument AC plug removed from AC source, connect an electrical jumper across the two AC plug prongs. Place the AC switch in the on position, connect one lead of ohm-meter to the AC plug prongs tied together and touch other ohm-meter lead in turn to each exposed metallic parts such as antenna terminals, phone jacks, etc. If the exposed metallic part has a return path to the chassis, the measured resistance should be between 1MΩ and 5.2MΩ. When the exposed metal has no return path to the chassis the reading must be infinite. An other abnormality exists that must be corrected before the receiver is returned to the customer. To Instrument’s exposed METALLIC PARTS 0.15uF Good Earth Ground such as WATER PIPE, CONDUIT etc. 1.5 Kohm/10W When 25A is impressed between Earth and 2nd Ground for 1 second, Resistance must be less than 0.1 Ω *Base on Adjustment standard -3- SERVICING PRECAUTIONS CAUTION: Before servicing receivers covered by this service manual and its supplements and addenda, read and follow the SAFETY PRECAUTIONS on page 3 of this publication. NOTE: If unforeseen circumstances create conflict between the following servicing precautions and any of the safety precautions on page 3 of this publication, always follow the safety precautions. Remember: Safety First. General Servicing Precautions 1. Always unplug the receiver AC power cord from the AC power source before; a. Removing or reinstalling any component, circuit board module or any other receiver assembly. b. Disconnecting or reconnecting any receiver electrical plug or other electrical connection. c. Connecting a test substitute in parallel with an electrolytic capacitor in the receiver. CAUTION: A wrong part substitution or incorrect polarity installation of electrolytic capacitors may result in an explosion hazard. 2. Test high voltage only by measuring it with an appropriate high voltage meter or other voltage measuring device (DVM, FETVOM, etc) equipped with a suitable high voltage probe. Do not test high voltage by "drawing an arc". 3. Do not spray chemicals on or near this receiver or any of its assemblies. 4. Unless specified otherwise in this service manual, clean electrical contacts only by applying the following mixture to the contacts with a pipe cleaner, cotton-tipped stick or comparable non-abrasive applicator; 10% (by volume) Acetone and 90% (by volume) isopropyl alcohol (90%-99% strength) CAUTION: This is a flammable mixture. Unless specified otherwise in this service manual, lubrication of contacts in not required. 5. Do not defeat any plug/socket B+ voltage interlocks with which receivers covered by this service manual might be equipped. 6. Do not apply AC power to this instrument and/or any of its electrical assemblies unless all solid-state device heat sinks are correctly installed. 7. Always connect the test receiver ground lead to the receiver chassis ground before connecting the test receiver positive lead. Always remove the test receiver ground lead last. 8. Use with this receiver only the test fixtures specified in this service manual. CAUTION: Do not connect the test fixture ground strap to any heat sink in this receiver. Electrostatically Sensitive (ES) Devices Some semiconductor (solid-state) devices can be damaged easily by static electricity. Such components commonly are called Electrostatically Sensitive (ES) Devices. Examples of typical ES devices are integrated circuits and some field-effect transistors and semiconductor "chip" components. The following techniques should be used to help reduce the incidence of component damage caused by static by static electricity. 1. Immediately before handling any semiconductor component or semiconductor-equipped assembly, drain off any electrostatic charge on your body by touching a known earth ground. Alternatively, obtain and wear a commercially available discharging wrist strap device, which should be removed to prevent potential shock reasons prior to applying power to the unit under test. 2. After removing an electrical assembly equipped with ES devices, place the assembly on a conductive surface such as aluminum foil, to prevent electrostatic charge buildup or exposure of the assembly. 3. Use only a grounded-tip soldering iron to solder or unsolder ES devices. 4. Use only an anti-static type solder removal device. Some solder removal devices not classified as "anti-static" can generate electrical charges sufficient to damage ES devices. 5. Do not use freon-propelled chemicals. These can generate electrical charges sufficient to damage ES devices. 6. Do not remove a replacement ES device from its protective package until immediately before you are ready to install it. (Most replacement ES devices are packaged with leads electrically shorted together by conductive foam, aluminum foil or comparable conductive material). 7. Immediately before removing the protective material from the leads of a replacement ES device, touch the protective material to the chassis or circuit assembly into which the device will be installed. CAUTION: Be sure no power is applied to the chassis or circuit, and observe all other safety precautions. 8. Minimize bodily motions when handling unpackaged replacement ES devices. (Otherwise harmless motion such as the brushing together of your clothes fabric or the lifting of your foot from a carpeted floor can generate static electricity sufficient to damage an ES device.) General Soldering Guidelines 1. Use a grounded-tip, low-wattage soldering iron and appropriate tip size and shape that will maintain tip temperature within the range or 500°F to 600°F. 2. Use an appropriate gauge of RMA resin-core solder composed of 60 parts tin/40 parts lead. 3. Keep the soldering iron tip clean and well tinned. 4. Thoroughly clean the surfaces to be soldered. Use a mall wirebristle (0.5 inch, or 1.25cm) brush with a metal handle. Do not use freon-propelled spray-on cleaners. 5. Use the following unsoldering technique a. Allow the soldering iron tip to reach normal temperature. (500°F to 600°F) b. Heat the component lead until the solder melts. c. Quickly draw the melted solder with an anti-static, suctiontype solder removal device or with solder braid. CAUTION: Work quickly to avoid overheating the circuit board printed foil. 6. Use the following soldering technique. a. Allow the soldering iron tip to reach a normal temperature (500°F to 600°F) b. First, hold the soldering iron tip and solder the strand against the component lead until the solder melts. c. Quickly move the soldering iron tip to the junction of the component lead and the printed circuit foil, and hold it there only until the solder flows onto and around both the component lead and the foil. CAUTION: Work quickly to avoid overheating the circuit board printed foil. d. Closely inspect the solder area and remove any excess or splashed solder with a small wire-bristle brush. -4- IC Remove/Replacement Some chassis circuit boards have slotted holes (oblong) through which the IC leads are inserted and then bent flat against the circuit foil. When holes are the slotted type, the following technique should be used to remove and replace the IC. When working with boards using the familiar round hole, use the standard technique as outlined in paragraphs 5 and 6 above. Removal 1. Desolder and straighten each IC lead in one operation by gently prying up on the lead with the soldering iron tip as the solder melts. 2. Draw away the melted solder with an anti-static suction-type solder removal device (or with solder braid) before removing the IC. Replacement 1. Carefully insert the replacement IC in the circuit board. 2. Carefully bend each IC lead against the circuit foil pad and solder it. 3. Clean the soldered areas with a small wire-bristle brush. (It is not necessary to reapply acrylic coating to the areas). "Small-Signal" Discrete Transistor Removal/Replacement 1. Remove the defective transistor by clipping its leads as close as possible to the component body. 2. Bend into a "U" shape the end of each of three leads remaining on the circuit board. 3. Bend into a "U" shape the replacement transistor leads. 4. Connect the replacement transistor leads to the corresponding leads extending from the circuit board and crimp the "U" with long nose pliers to insure metal to metal contact then solder each connection. Power Output, Transistor Device Removal/Replacement 1. Heat and remove all solder from around the transistor leads. 2. Remove the heat sink mounting screw (if so equipped). 3. Carefully remove the transistor from the heat sink of the circuit board. 4. Insert new transistor in the circuit board. 5. Solder each transistor lead, and clip off excess lead. 6. Replace heat sink. Diode Removal/Replacement 1. Remove defective diode by clipping its leads as close as possible to diode body. 2. Bend the two remaining leads perpendicular y to the circuit board. 3. Observing diode polarity, wrap each lead of the new diode around the corresponding lead on the circuit board. 4. Securely crimp each connection and solder it. 5. Inspect (on the circuit board copper side) the solder joints of the two "original" leads. If they are not shiny, reheat them and if necessary, apply additional solder. Fuse and Conventional Resistor Removal/Replacement 1. Clip each fuse or resistor lead at top of the circuit board hollow stake. 2. Securely crimp the leads of replacement component around notch at stake top. 3. Solder the connections. CAUTION: Maintain original spacing between the replaced component and adjacent components and the circuit board to prevent excessive component temperatures. Circuit Board Foil Repair Excessive heat applied to the copper foil of any printed circuit board will weaken the adhesive that bonds the foil to the circuit board causing the foil to separate from or "lift-off" the board. The following guidelines and procedures should be followed whenever this condition is encountered. At IC Connections To repair a defective copper pattern at IC connections use the following procedure to install a jumper wire on the copper pattern side of the circuit board. (Use this technique only on IC connections). 1. Carefully remove the damaged copper pattern with a sharp knife. (Remove only as much copper as absolutely necessary). 2. carefully scratch away the solder resist and acrylic coating (if used) from the end of the remaining copper pattern. 3. Bend a small "U" in one end of a small gauge jumper wire and carefully crimp it around the IC pin. Solder the IC connection. 4. Route the jumper wire along the path of the out-away copper pattern and let it overlap the previously scraped end of the good copper pattern. Solder the overlapped area and clip off any excess jumper wire. At Other Connections Use the following technique to repair the defective copper pattern at connections other than IC Pins. This technique involves the installation of a jumper wire on the component side of the circuit board. 1. Remove the defective copper pattern with a sharp knife. Remove at least 1/4 inch of copper, to ensure that a hazardous condition will not exist if the jumper wire opens. 2. Trace along the copper pattern from both sides of the pattern break and locate the nearest component that is directly connected to the affected copper pattern. 3. Connect insulated 20-gauge jumper wire from the lead of the nearest component on one side of the pattern break to the lead of the nearest component on the other side. Carefully crimp and solder the connections. CAUTION: Be sure the insulated jumper wire is dressed so the it does not touch components or sharp edges. -5- NOTE : Specifications and others are subject to change without notice for improvement. SPECIFICATION 1. Application range This specification is applied to the LCD TV used LJ91L chassis. 3. Test method 1) Performance: LGE TV test method followed 2) Demanded other specification - Safety: CE, IEC specification - EMC: CE, IEC specification 2. Requirement for Test Each part is tested as below without special appointment. 1) Temperature : 25±5ºC (77±9ºF), CST : 40±5ºC 2) Relative Humidity : 65±10% 3) Power Voltage : Standard input voltage(100~240V@50/60Hz) * Standard Voltage of each products is marked by models. 4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with BOM. 5) The receiver must be operated for about 5 minutes prior to the adjustment. 4. Electrical specification 4.1 General Specification No 1. 2. Item Receiving System Available Channel Specification 1) SBTVD / NTSC / PAL-M / PAL-N 1) VHF : 02~13 2) UHF : 14~69 3) DTV : 02-69 4) CATV : 01~135 1) AC 100 ~ 240V 50/60Hz Central and South AMERICA 42 inch Wide(1920x1080) 47 inch Wide(1920x1080) 16:9 FS LC420WUL-SBT1 LC470WUL-SBT1 1) Temp : 0 ~ 40 deg 2) Humidity : ~ 80 % 1) Temp : -20 ~ 60 deg 2) Humidity : ~ 85 % 42SL90QD-SA 47SL90QD-SA Remark 3. 4. 5. 6. 7. 8. 9. 10. Input Voltage Market Screen Size Aspect Ratio Tuning System Module Operating Environment Storage Environment Mark : 110V, 60Hz 42SL90QD-SA 47SL90QD-SA -6- 5. Chromiance & Luminance spec. No Item White brightness Module 1. 2. Luminance uniformity Color RED X 3. coordinate Y 4. 5. GREEN X 6. Y BLUE 7. X 8. Y WHITE X 9. 10. Y 11. Color coordinate uniformity 12. Contrast ratio 13. Colo r Cool Temperature Standard Warm Min 294 77 Typ. -0.03 Typ 368 0.640 0.331 0.282 0.634 0.151 0.279 0.292 900 Typ. -0.015 Typ. -0.015 Typ. -0.015 1300 0.269 0.273 0.285 0.293 0.313 0.329 N/A Typ. +0.015 Typ. +0.015 Typ. +0.015 10.0 10.0 % deg dB dBm <Test Condition> 85% Full white pattern ** The W/B Tolerance –0.015 for Adjustment Dynamic contrast : off Dynamic color : off OPC : off Max Unit cd/m2 % Remark Full white Typ. +0.03 is 14. 15. 16. 17. Color Distortion, DG Color Distortion, DP Color S/N, AM/FM Color Killer Sensitivity 43.0 -80 6. Component Input (Y, CB/PB, CR/PR) No Resolution 1. 720*480 2. 720* 480 3. 720*480 4. 720*480 5. 1280*72 0 6. 1280*72 0 7. 1920*10 80 8. 1920*10 80 9. 1920*1080 10. 1920*1080 11. 1920*1080 12. 1920*1080 13. 1920*1080 14. 1920*1080 15. 1920*1080 16. 1920*1080 H-freq(kHz) 15.73 15.73 31.47 31.47 45.00 44.96 33.75 33.72 67.500 67.432 27.000 26.97 33.75 33.71 56.25 28.125 V-freq.(kHz) 60 59.94 60 59.94 60.00 59.94 60.00 59.94 60 59.939 24.000 23.94 30.000 29.97 50.000 25.000 Pixel clock 13.5135 13.5 27.027 27.0 74.25 74.176 74.25 74.176 148.50 148.352 74.25 74.176 74.25 74.176 148.5 74.25 Proposed SDTV ,DVD 480I SDTV ,DVD 480I SDTV 480P SDTV 480P HDTV 720P HDTV 720P HDTV 1080I HDTV 1080I HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P 7. RGB Input (PC) Resolution PC 1. 640*350 2. 720*400 3. 640*480 4. 800*600 5. 800*600 6. 1024*768 7. 1280*768 8. 1360*768 9. 1280*1024 10. 1600*1200 11 1920*1080 No H-freq(kHz) 31.468 31.469 31.469 35.156 37.879 48.363 47.776 47.712 63.981 75.00 67.5 V-freq.(Hz) 70.09 70.08 59.94 56.25 60.31 60.00 59.870 60.015 60.020 60.00 60 Pixel clock(MHz) 25.17 28.32 25.17 36.00 40.00 65.00 79.5 85.50 108.00 162 148.5 Proposed EGA DOS VESA(VGA) VESA(SVGA) VESA(SVGA) VESA(XGA) CVT(WXGA) VESA (WXGA) VESA VESA (UXGA) HDTV 1080P DDC X O O O O O O O O O O ** RGB PC Monitor Range Limits - Min Vertical Freq - 56 Hz - Max Vertical Freq - 62 Hz - Min Horiz. Freq - 30 kHz - Max Horiz. Freq - 80 kHz - Pixel Clock - 170 MHz 8. HDMI Input (PC/DTV) No Resolution PC 1 640* 350 2 720* 400 3 640* 480 4 800* 600 5 800* 600 6 1024*768 7 1280 *768 8 1360*768 9 1280*1024 10 1600*1200 11 1920*1080 DTV 1 720* 480 2 720* 480 3 1280 *720 4 1280 *720 5 1920 *1080 6 1920 *1080 7 1920 *1080 8 1920 *1080 9 1920 *1080 10 1920*1080 11 1920*1080 12 1920*1080 17. 1920*1080 18. 1920*1080 H-freq(kHz) 31.468 31.469 31.469 35.156 37.879 48.363 47.776 47.712 63.981 75.00 66.587 31.47 31.47 45.00 44.96 33.75 33.72 67.500 67.432 27.000 26.97 33.75 33.71 56.25 28.125 V-freq.(Hz) 70.09 70.08 59.94 56.25 60.31 60.00 59.870 60.015 60.020 60.00 59.934 60 59.94 60.00 59.94 60.00 59.94 60 59.939 24.000 23.94 30.000 29.97 50.000 25.000 Pixel clock(MHz) 25.17 28.32 25.17 36.00 40.00 65.00 79.5 85.50 108.00 162 138.5 27.027 27.00 74.25 74.176 74.25 74.176 148.50 148.352 74.25 74.176 74.25 74.176 148.5 74.25 Proposed EGA DOS VESA(VGA) VESA(SVGA) VESA(SVGA) VESA(XGA) CVT(WXGA) VESA (WXGA) VESA (SXGA) VESA (UXGA) HDTV 1080P SDTV 480P SDTV 480P HDTV 720P HDTV 720P HDTV 1080I HDTV 1080I HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P DDC X O O O O O O O O O O ** HDMI Monitor Range Limits - Min Vertical Freq - 56 Hz - Max Vertical Freq - 62 Hz - Min Horiz. Freq - 30 kHz - Max Horiz. Freq - 80 kHz - Pixel Clock - 170 MHz 9. Consignment Setting (OUTGOING CONDITION) No Item 1. Input Mode 2. Volume Level 3. Mute 4. Aspe ct Ratio 5. System Color 6 Booster 7. Picture Picture Mode Backlight Contrast Brightness Sharpness Color Tint Color Temperature Picture Reset 8. Audio Sound Mode Auto Volume Clear Voice SRS TruSurround XT Balance TV Speaker 9. Time Clock Off Timer / On Timer Sleep Timer / Auto Sleep 10. Option Language (Menu/Audio) SimpLink Key Lock Caption Set ID 11. Channel Memory TV02CH 10 Off 16:9 PAL-M On Vivid 100 100 50 70 70 0 Cool Standard Off Off Off 0 On Auto Off Portugues On Off Off 1 RF : 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 30, 51, 63 CATV : 15, 16, 17 Condition ADJUSTMENT INSTRUCTION 1. Application Range This specification sheet is applied all of the LJ91T LCD TV models, which produced in manufacture department or similar LG TV factory. 4. PCB Assembly Adjustment 4.1. CPLD DOWNLOAD : JTAG MODE 2. Notice 1) Because this is not a hot chassis, it is not necessary to use an isolation transformer. However, the use of isolation transformer will help protect test instrument. 2) Adjustment must be done in the correct order. But it is flexible when its factory local problem occurs. . 3) The adjustment must be performed in the circumstance of 25 ±5°C of temperature and 65± 10% of relative humidity if there is no specific designation. 4) The input voltage of the receiver must keep 100~220V, 50/60Hz. 5) Before adjustment, execute Heat-Run for 5 minutes. • After Receive 100% Full white pattern (06CH) then process Heat-run (or “8. Test pattern” condition of Ez-Adjust status) • How to make set white pattern 1) Press Power ON button of Service Remocon 2) Press ADJ button of Service remocon. Select “8. Test pattern” and, after select “White” using navigation button, and then you can see 100% Full White pattern. * In this status you can maintain Heat-Run useless any pattern generator * Notice: if you maintain one picture over 20 minutes (Especially sharp distinction black with white pattern – 13Ch, or Cross hatch pattern – 09Ch) then it can appear image stick near black level. 4.2. << PRINT PORT >> PIN MAP Pin 2 3 8 11 13 15 18 TO 25 JTAG Mode Signal Name TCK TMS TDI TDO VCC GND 3. Adjustment Items 3.1 PCB Assembly adjustment • CPLD DOWNLOAD • Adjust 480i Comp1 • Adjust 1080p Comp1/RGB - If it is necessary, it can adjustment at Manufacture Line - You can see set adjustment status at “1. ADJUST CHECK” of the “In-start menu” 3.2 Set Assembly Adjustment • EDID (The Extended Display Identification Data ) / DDC (Display Data Channel) download • Color Temperature (White Balance) Adjustment • Make sure RS-232C control • Selection Factory output option - 10 - 4.3. << 10P WAFER >> PIN MAP 4.4. Using RS-232C Adjust 3 items at 3.1 PCB assembly adjustments sequence” one after the order. O Adjustment protocol Order 1. Inter the Adjustment mode 2. Change the Source 4.Return the Response 5.Read (main) Adjustment data ad 00 20 (main) ad 00 30 6.Confirm Adjustment ad 00 99 kb 00 40 kb 00 60 b 00 OK40x (Adjust 480i Comp1/1080p Comp1) b 00 OK60x (Adjust 1080p RGB) OKx ( Success condition ) NGx ( Failed condition ) (main : component1 480i, RGB 1080p) 000000000000000000000000007c007b006dx (main : component1 1080p) 000000070000000000000000007c00830077x NG 03 00x (Failed condition) NG 03 01x (Failed condition) NG 03 02x (Failed condition) OK 03 03x (Success condition) 7. End of Adjustment ad 00 90 d 00 OK90x Command ad 00 00 Set response d 00 OK00x “4.1.3 3.Start Adjustment ad 00 10 See ADC Adjustment RS232C Protocol_Ver1.0 O Adjustment protocol - Pattern Generator : (MSPG-925FA) - Adjust 480i Comp1 (MSPG-925FA : model :209 , pattern : 65) - Adjust 1080p Comp1/RGB(MSPG-925FA:model : 225 , pattern : 65) - Adjust RGB (MSPG-925FA:model :225 , Pattern :65) – RGB-PC Mode * If you want more information then see the below Adjustment method (Factory Adjustment) O Adjustment sequence - ad 00 00 : Enter the ADC Adjustment mode. - xb 00 40: Change the mode to Component1 (No actions) - ad 00 10: Adjust 480i Comp - ad 00 10: Adjust 1080p Comp - xb 00 60: Change to RGB-PC mode(No action) - ad 00 10: Adjust 1080p RGB - ad 00 90: End of the adjustment 5. Factory Adjustment 5.1 Manual Adjust Component 480i/1080p RGB 1080p O Summary : Adjustment component 480i/1080i and RGB 1080p is Gain and Black levelsetting at Analog to Digital converter, and compensate the RGB deviation O Using instrument - Adjustment remocon, 801GF(802B, 802F, 802R) or MSPG925FA pattern generator (It can output 480i/1080i horizontal 100% color bar pattern signal, and its output level must setting 0.7V±0.1V p-p correctly) 5.2 EDID (The Extended Display Identification Data) / DDC (Display Data Channel) Download. <Pic.4 Adjustment pattern : 480i / 1080p 60Hz Pattern > * You must make it sure its resolution and pattern cause every instrument can have different setting O Adjustment method 480i Comp1, Adjust 1080p Comp1/RGB (Factory adjustment) • ADC 480i Component1 adjustment - Check connection of Component1 - MSPG-925FA Ë Model: 209, Pattern 65 • Set Component 480i mode and 100% Horizontal Color Bar Pattern(HozTV31Bar), then set TV set to Component1 mode and its screen to “NORMAL” • ADC 1080p Component1 / RGB adjustment - Check connection both of Component1 and RGB - MSPG-925FA Model: 225, Pattern 65 • Set Component 1080p mode and 100% Horizontal Color Bar Pattern(HozTV31Bar), then set TV set to Component1 mode and its screen to “NORMAL” • After get each the signal, wait more a second and enter the “IN-START” with press IN-START key of Service remocon. After then select “7. External ADC ” with navigator button and press “Enter”. • After Then Press key of Service remocon “Right Arrow(VOL+)” • You can see “ADC Component1 Success” • Component1 1080p, RGB 1080p Adjust is same method. • Component 1080p Adjustment in Component1 input mode • RGB 1080p adjustment in RGB input mode • If you success RGB 1080p Adjust. You can see “ADC RGB-DTV Success” O Summary • It is established in VESA, for communication between PC and Monitor without order from user for building user condition. It helps to make easily use realize “Plug and Play” function. • For EDID data write, we use DDC2B protocol. O Auto Download • After enter Service Mode by pushing “ADJ” key, • Enter EDID D/L mode. • Enter “START” by pushing “OK” key. Caution: - Never connect HDMI & D-sub Cable when the user downloading . - Use the proper cables below for EDID Writing. - 13 - Edid data and Model option download (RS232) NO Enter download MODE Edid data and Model option download Adjust Item Download M odeIn Download Mode Out Adjustment Confirmation CMD 1 AE AE AE AE CMD 2 0 *Note1 9 9 Data 0 0 *Note2 0 9 When transfer the ’Mode In’ , Carry the command. Automaticall y download (The use of a internal Data) To check Download on Assembly line. - HDM2 EDID table (0x3D, 0x1C) O Manual Download • Write HDMI EDID data - Using instruments => Jig. (PC Serial to D-Sub connection) for PC, DDC adjustment. => S/W for DDC recording (EDID data write and read) => D-sub jack => Additional HDMI cable connection Jig. - Preparing and setting. => Set instruments and Jig. Like pic.5), then turn on PC and Jig. => Operate DDC write S/W (EDID write & read) => It will operate in the DOS mode. - HDMI-3 EDID table (0x3D, 0x0C) PC VSC B/D Pic.3) For write EDID data, setting Jig and another instruments. • EDID data for LJ91D Chassis (Model name = LG TV) - HDMI-1 EDID table (0x3D, 0x2C) - Analog (RGB) EDID table (0x9B, 0x25) See Workig Guide of you want more information about EDID communication. 5.3 Adjustment Color Temperature (White balance) O Using Instruments • Color Analyzer: CA-210 (CH 9) - Using LCD color temperature, Color Analyzer (CA-210) must use CH 9, which Matrix compensated (White, Red, Green, Blue compensation) with CS-2100. See the Coordination bellowed one. • Auto-adjustment Equipment (It needs when Autoadjustment – It is availed communicate with RS-232C : Baud rate: 115200) • Video Signal Generator MSPG-925F 720p, 216Gray (Model: 217, Pattern 78) O Connection Diagram (Auto Adjustment) • Using Inner Pattern O White Balance Adjustment If you can ’t adjust with inner pattern, then you can adjust it using HDMI pattern. You can select option at "Ez-Adjust Menu – 7. White Balance" there items "NONE, INNER, HDMI". It is normally setting at inner basically. If you can ’t adjust using inner pattern you can select HDMI item, and you can adjust. In manual Adjust case, if you press ADJ button of service remocon, and enter "Ez-Adjust Menu – 7. White Balance", then automatically inner pattern operates. (In case of "Inner" originally "Inner" will be selected. • Connect all cables and equipments like Pic.5) • Set Baud Rate of RS-232C to 115200. It may set 115200 orignally. • Connect RS-232C cable to set • Connect HDMI cable to set F u l l W h i t e P at t er n C A -100+ COL OR A NA L Y ZER T Y PE ; C A -100+ R S-232C • Using HDMI input wb wb wb wb wb wb 00 00 00 00 00 00 ¢ RS-232C Command (Commonly apply) 00 10 1f 20 2f ff White Balance adjustment start. Start of adjust gain (Inner white pattern) End of gain adjust Start of offset adjust(Inner white pattern) End of offset adjust End of White Balance adjust(Inner pattern disappeared) <Pic.5 Connection Diagram for Adjustment White balance> . • "wb 00 00": Start Auto-adjustment of white balance. • "wb 00 10": Start Gain Adjustment (Inner pattern) • "jb 00 c0" : •… • "wb 00 1f": End of Adjustment * If it needs, offset adjustment (wb 00 20-start, wb 00 2f-end) • "wb 00 ff": End of white balance adjustment (inner pattern disappear) . Only for training and service purposes - 15 - O White Balance Adjustment (Manual adjustment) • Test Equipment: CA-210 - Using LCD color temperature, Color Analyzer (CA210) must use CH 9, which Matrix compensated (White, Red, Green, Blue compensation) with CS2100. See the Coordination bellowed one. • Manual adjustment sequence is like bellowed one. - Turn to "Ez-Adjust" mode with press ADJ button of service remocon. - Select "10.Test Pattern" with CH+/- button and press enter. Then set will go on Heat-run mode. Over 30 minutes set let on Heat-run mode. - Let CA-210 to zero calibration and must has gap more 10cm from center of LCD module when adjustment. - Press "ADJ" button of service remocon and select "7.White-Balance" in "Ez-Adjust" then press " ▶" button of navigation key. (When press " ▶" button then set will go to full white mode) - Adjust at three mode (Cool, Medium, Warm) - If "cool" mode Let B-Gain to 192 and R, G, B-Cut to 64 and then control R, G gain adjustment High Light adjustment. - If "Medium" and "Warm" mode Let R-Gain to 192 and R, G, B-Cut to 64 and then control G, B gain adjustment High Light adjustment. - All of the three mode Let R-Gain to 192 and R, G, B-Cut to 64 and then control G, B gain adjustment High Light adjustment. - With volume button (+/-) you can adjust. - After all adjustment finished, with Enter ( ■ key) turn to Ez-Adjust mode. Then with ADJ button, exit from adjustment mode Attachment: White Balance adjustment coordination and color temperature. O Using CS-1000 Equipment. - COOL : T=11000K, △uv=0.000, x=0.276 y=0.283 - MEDIUM : T=9300K, △uv=0.000, x=0.285 y=0.293 - WARM : T=6500K, △uv=0.000, x=0.313 y=0.329 5.5 Test of RS-232C control Press IN-Start button of service remocon then set the rate” to 15200, Then check RS-232C control and “4.Baud 5.6 Selection of Country option. Selection of country option is allowed only North American model (Not allowed Korean model). It is selection of Country about Rating and Time Zone. • Models: All models which use LA75A Chassis (See the first page.) • Press “In-Start” button of Service Remocon, then enter the “Option” Menu with “PIP CH-“ Button • Select one of these three (USA, CANADA, MEXICO) defends on its market using “Vol. +/-“button. * Caution : Don’t push The Instop Key ater completing the function inspection. 5.7 Check the Ginga(Data Broadcasting) 1) Turn on TV 2) Press the OK Button on the ADJ R/C 5.4 EYE-Q Function check. 1) Turn on TV 2) Press EYE Key of Adj R/C 3) Cover the Eye Q II sensor on the front of the using your hand and wait for 6 seconds 4) Confirm that R/G/B va;ie os ;pwer tjam 10 of the ‘Raw Data (Sensor data, Back light) ”. If after 6 seconds, R/G/B value is not lower than 10, re[;ace EYE Q II sensor. 5) Remove your hand from the EYE Q II sensor and wait for 6 sencond 6) Confirm that “OK” pop up. If change is not seen, replace EYE Q II sensor 3) Check the Ginga icon EXPLODED VIEW IMPORTANT SAFETY NOTICE Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and EXPLODED VIEW. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer. 521 400 540 920 801 530 803 550 200 802 810 910 900 560 120 122 300 310 500 510 -17 - A2 LV1 LV2 A10 A 29 B C D E F G 10K R1101 H D3.3V I J K L M N O P Q R S T U V W X Y Z AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP COMPONENT1 5.1V ZD1102 SIDE AV R1118 1K COMP1_DET 3:T21 R,G,B PC&DDC +5V_ST D1103 ENKMC2838-T112 A1 D3.3V C A2 28 FIX-TER 11 10 ZD1101 5.1V C1101 100pF 50V 27 26 25 L1101 CM2012FR27KT ZD1103 5.1V R1123 15 50V 27pF C1116 5.1V ZD1133 9 8 7 6 3:T21 COMP1_Y_IN ZD1134 5.1V R1134 2.7K C1130 0.1uF 16V R1137 1K SIDE_CVBS_DET 3:T19 5.1V ZD1104 50V 27pF C1103 P1101 12507WS-08L R1156 4.7K C1142 0.1uF +5V IC1103 M24C02-RMN6T R1153 4.7K E0 R1142 22 VCC C1151 R1159 10K OPT 0.1uF 50V C1153 4700pF 50V L1102 CM2012FR27KT ZD1105 5.1V R1124 15 50V 27pF C1117 COMP1_Pb_IN 3:T21 1 R1129 0 R1130 15 5.1V ZD1135 C1137 47pF 50V SIDE_CVBS_IN 3:T19 D2A D2B D3A D3B VCC Q2 Q3 RGB_VSYNC 3:T14 1 8 5.1V ZD1106 5 4 JK1101 13 R1151 0 [RD]MONO 50V 27pF C1104 E1 2 7 WC R1166 0 2 EDID_WP 3:T16 DDC_SCL 3:T17 E2 3 6 SCL 10 11 12 13 14 24 23 22 21 8 9 L1103 CM2012FR27KT ZD1107 5.1V ZD1136 5.1V 3 R1125 15 COMP1_Pr_IN 5.1V ZD1108 50V 27pF C1105 50V 27pF C1118 3:T20 5 R1131 0 R1172 75 VSS 4 5 SDA R1157 22 DDC_SDA 3:T17 R1163 22 4 74F08D IC1102 7 6 5 4 3 2 1 6 C1112 ZD1109 5.1V R1103 470K Q1 GND D1B D1A Q0 D0B 5.1V ZD1137 5.1V ZD1110 8 9 ZD1138 5.1V 1uF 25V 0 R1114 C1122 100pF 50V COMP1_L_IN 3:T22 7 R1150 0 1uF 25V R1127 470K R1135 0 C1135 100pF SIDE_L_IN 3:T20 D0A C1131 D1104 ADMC5M03200L 5.6V R1173 0 OPT D1105 ADMC5M03200L 5.6V R1143 22 RGB_HSYNC 3:T14 D1101 ADUC30S03010L 30V BCM Reference D1102 ADUC30S03010L 30V C1113 R1104 470K 0 R1115 C1123 100pF 50V COMP1_R_IN 3:T21 ZD1111 5.1V 1uF 25V 5.1V ZD1112 3:T15 DSUB_B C1132 C1143 47pF 50V SIDE_R_IN 3:T20 ZD1147 5.1V 5.1V ZD1146 20 19 COMPONENT2 L1108 0 L1108-*1 BG1608B121F RGB_BEAD +5V L1109 0 L1109-*1 BG1608B121F RGB_BEAD R1136 5.1V ZD1139 D3.3V 10K R1102 ZD1140 5.1V 1uF 25V 0 R1128 470K 3:T15 DSUB_G ZD1149 5.1V C1144 47pF 50V 5.1V ZD1121 ZD1122 5.1V 18 FIX-TER 11 10 C1102 100pF 50V BCM RECOMMAND L1106 CM2012FR27KT COMP2_DET 3:T23 5.1V ZD1148 R1119 1K C1136 100pF R1169 10K 1K R1170 DSUB_DET 3:T16 C1152 100pF 50V R1162 0 R1164 0 D1106 ADMC5M03200L 5.6V 3:T16 DSUB_R ZD1151 5.1V COMP2_Y_IN 3:T23 C1145 47pF 50V 5.1V ZD1123 5.1V ZD1150 9 ZD1124 5.1V 8 7 6 L1110-*1 BG1608B121F RGB-BEAD GREEN_GND RED_GND L1104 CM2012FR27KT 5.1V ZD1125 R1121 15 50V 27pF C1120 COMP2_Pb_IN 3:T22 ZD1126 5.1V 4 JK1102 13 1 2 3 4 5.1V ZD1127 ZD1128 5.1V 50V 27pF C1109 13 12 11 50V 27pF C1121 COMP2_Pr_IN 3:T22 JK1104 PEJ027-01 3 6A E_SPRING T_TERMINAL1 B_TERMINAL1 5.1V ZD1141 R1132 470K R_SPRING T_SPRING B_TERMINAL2 5.1V ZD1143 R1133 470K T_TERMINAL2 SHIELD_PLATE C1133 1uF 25V R1138 PC_R_IN 0 3:T13 C1114 R1108 470K 5.1V ZD1129 0 R1116 C1127 100pF 50V COMP2_L_IN 3:T23 7A 4 5 7B ZD1130 5.1V 1uF 25V ZD1142 5.1V RS-232C C1134 1uF 25V R1139 PC_L_IN 0 3:T13 +5V_ST L1107 BLM18PG121SN1D C1115 5.1V ZD1131 R1109 470K 0 R1117 C1128 100pF 50V COMP2_R_IN 3:T23 6B 8 ZD1132 5.1V 1uF 25V ZD1144 5.1V 10 9 AV1 IC1101 MAX3232CDR D3.3V C1140 0.47uF 25V C1+ R1105 10K R1111 1K C1106 0.1uF 16V AV1_CVBS_DET 3:T18 C1C1141 0.47uF 25V C2+ C1138 0.1uF 50V V+ 1 16 VCC R1144 4.7K R1145 4.7K C1146 0.1uF 50V R1146 0 RS232C_RxD R1147 0 RS232C_TxD 3:T12 R1167 220 3:T12 5 14 [RD]MONO L1105 CM2012FR27KT R1122 15 10 6 7 8 9 16 R1152 0 PC AUDIO JK1106 SPG09-DB-010 SHILED 11 12 13 14 15 15 5 50V 27pF C1108 DDC_GND H_SYNC V_SYNC GND_2 GREEN GND_1 BLUE 16 DDC_CLOCK DDC_DATA BLUE_GND SYNC_GND 50V 27pF C1107 50V 27pF C1119 RED NC OPT 17 R1120 15 L1110 0 JK1107 SPG09-DB-009 1 6 2 2 15 GND R1148 100 OPT 5.1V ZD1152 ZD1155 5.1V 5.1V ZD1154 R1168 220 7 5.1V ZD1114 8 7 6 5 4 JK1103 6 8 7 5 4 ZD1113 5.1V 3 14 DOUT1 3 50V 47pF C1149 50V 47pF C1150 8 4 9 5 R1110 15 AV1_CVBS_IN ZD1115 5.1V C1124 47pF 50V 3:T18 D3.3V +5V JK1105 JST1223-001 GND R1126 C1139 0.47uF 25V C2- 5 12 ROUT1 50V C1147 220pF 5.1V ZD1116 R1171 75 V- 6 11 DIN1 +5V_ST ZD1153 5.1V SPDIF OPTIC JACK 4 13 RIN1 R1149 100 OPT 50V C1148 220pF 10 1 Fiber Optic DOUT2 7 10 DIN2 +5V_ST US_Commercial R1165 3.3K US_Commercial R1160 100K C Q1101 2SC3052 OPT E 2 C1110 25V 1uF R1112 0 C1125 100pF AV1_L_IN 3:T18 SPDIF_OUT G4;3:T12 ZD1145 OPT 5.6B 1K VCC RIN2 8 9 ROUT2 OPT R1158 3.3K R1154 0 ZD1117 5.1V 5.1V ZD1118 R1106 470K 3 VINPUT C1129 0.1uF 50V 4 C B FIX_POLE R1140 100 R1141 100 IR 3:T11 R1155 10K B OPT C1111 25V 1uF R1113 0 C1126 100pF AV1_R_IN 3:T18 Q1102 2SC3052 US_Commercial E R1161 100K US_Commercial ZD1119 5.1V 3 2 1 THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. 5.1V ZD1120 R1107 470K BCM (BRAZIL VENUS) 2009. 03. 23 LEE GI YOUNG IN - OUT 1 15 A 29 28 27 26 25 24 23 22 21 20 B C D E F G H I J K L M N O P Q R S T U V W X Y Z AA AB AC AD AE AF AG AH AI AJ AK AL AM AN +3.3V_HDMI AO AP * HDMI CEC +3.3V_ST +1.8V_AMP +1.8V_HDMI D3.3V JACK_GND 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 MMBD301LT1G D601 Q16;AH18 5V_HDMI_4 R641 0 HPD +5V_POWER DDC/CEC_GND SDA SCL NC CEC CLKCLK_SHIELD CLK+ DATA0DATA0_SHIELD DATA0+ DATA1DATA1_SHIELD DATA1+ DATA2DATA2_SHIELD DATA2+ AE19 D2+_HDMI4 AF19 D1+_HDMI4 AE19 D2-_HDMI4 AF19 D0+_HDMI4 AF19 D1-_HDMI4 AG19 CK+_HDMI4 AF19 D0-_HDMI4 GND R639 R643 0 H8;H17;W27;AL11 0 CEC_REMOTE AG19 CK-_HDMI4 R642 0 R14;AG19 DDC_SDA_4 R13;AG19 DDC_SCL_4 CEC_REMOTE H8;H17;R26;AL11 AVRL161A1R1NT VR607 0 R658 68K R666 R667 9.1K Q601 SSM6N15FU L601 BLM18PG121SN1D L602 BLM18PG121SN1D AH19 HPD4 C623 0.1uF C629 0.1uF DRAIN1 6 1 SOURCE1 12:F6 HDMI_CEC GATE2 5 2 GATE1 SOURCE2 4 3 DRAIN2 C612 0.1uF R664 0 OPT GND +3.3V_HDMI R665 0 KJA-ET-0-0032 C611 0.1uF 0.1uF C609 0.1uF C610 0.1uF C613 0.1uF C614 0.1uF JK503 GND SIDE_HDMI_PORT4 HDMI0_RX0-_BCM 11:W17 HDMI0_RX0+_BCM 11:W17 HDMI0_RXC-_BCM 11:W17 HDMI0_RXC+_BCM 11:W17 C615 D2-_HDMI4 D1+_HDMI4 D1-_HDMI4 D2+_HDMI4 C624 D0+_HDMI4 D0-_HDMI4 CK+_HDMI4 CK-_HDMI4 DDC_SCL_4 DDC_SDA_4 0.1uF C625 0.1uF C626 0.1uF C627 0.1uF 20 P19;AJ15 5V_HDMI_2 20 19 18 19 18 17 16 15 14 13 R628 0 AL11 HPD2 R634 47K R635 47K R656 47K R662 1.8K R653 47K DDC_SDA_1 DDC_SCL_1 HPD4 5V_HDMI_4 5V_HDMI_1 5V_HDMI_2 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 R616 0 R18;AL12 DDC_SDA_2 R17;AL12 DDC_SCL_2 H8;R26;W27;AL11 R661 1.8K DDC_SDA_2 DDC_SCL_2 C616 0.1uF +1.8V_HDMI R617 R618 0 0 CEC_REMOTE AL12 CK-_HDMI2 AL12 CK+_HDMI2 AL13 D0-_HDMI2 C620 0.1uF VDDC[1V8]_3 VDDH[3V3]_8 VDDH[3V3]_7 RXD_DDC_CLK VDDO[1V8] 5V_HDMI_4 OUT_D0OUT_D0+ OUT_D1OUT_D1+ VSS_12 RXD_DDC_DAT C622 0.1uF C628 0.1uF HDMI_SDA HDMI_SCL +5.0V HDMI0_RX1-_BCM 11:W16 HDMI0_RX1+_BCM 11:W16 HDMI0_RX2-_BCM 11:W16 HDMI0_RX2+_BCM 11:W16 OUT_D2- OUT_D2+ RXD_D2+ RXD_D2- RXD_D1+ RXD_D1- RXD_D0+ RXD_D0- RXD_DC+ RXD_DC- RXD_HPD VSS_11 VSS_10 RXD_5V 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 AL13 D0+_HDMI2 AL13 D1-_HDMI2 VSS_1 5V_HDMI_1 AL13 D1+_HDMI2 AL14 D2-_HDMI2 OUT_C+ OUT_CR655 47K R657 47K DDC_SDA_4 DDC_SCL_4 HPD1 DDC_SDA_1 DDC_SCL_1 C607 0.1uF VDDO[3V3] OUT_DDC_CLK OUT_DDC_DAT VSS_2 VDDC[1V8]_1 RXA_HPD RXA_5V RXA_DDC_DAT RXA_DDC_CLK RXA_CCK-_HDMI1 CK+_HDMI1 D0-_HDMI1 D0+_HDMI1 RXA_C+ VDDH[3V3]_1 RXA_D0RXA_D0+ VSS_3 RXA_D1D1-_HDMI1 D1+_HDMI1 RXA_D1+ VDDH[3V3]_2 RXA_D2RXA_D2+ VDDH[1V8]_1 +5.0V R663 C605 0.1uF R605 0 M18;X13 DDC_SDA_1 M17;X12 DDC_SCL_1 H17;R26;W27;AL11 0 CEC_REMOTE Y12 CK-_HDMI1 C604 0.1uF Y12 CK+_HDMI1 Y12 D0-_HDMI1 C606 0.1uF C608 0.1uF +1.8V_HDMI 0 NC 1 2 3 4 5 6 7 8 9 5V_HDMI_2 75 74 73 72 71 70 69 VDDH[1V8]_2 R676 R12K VSS_9 RXC_D2+ RXC_D2VDDH[3V3]_6 RXC_D1+ RXC_D1VSS_8 RXC_D0+ RXC_D0VDDH[3V3]_5 RXC_C+ RXC_CRXC_DDC_CLK RXC_DDCC_DAT RXC_5V RXC_HPD CEC VSS_7 VDDS[3V3] CDEC_STBY INT/HP_CTRL XTAL_OUT XTAL_IN C619 0.1uF R678 0 R677 12K C621 0.1uF D2+_HDMI2 D2-_HDMI2 D1+_HDMI2 D1-_HDMI2 AL14 D2+_HDMI2 IC601 TDA9996HL 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 D0+_HDMI2 D0-_HDMI2 CK+_HDMI2 CK-_HDMI2 DDC_SCL_2 DDC_SDA_2 HPD2 CEC_REMOTE 12 11 YKF45-7058V JK501 UI_HW_PORT2 GND EDID Pull-up Net Labels changed for HDMI2 0 OPT 20 10 9 8 7 6 5 4 3 2 1 L19;Z14 5V_HDMI_1 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 R606 R607 0 R627 0 Y13 HPD1 D2-_HDMI1 D2+_HDMI1 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 PD 49 SDA/SEL1 VSS_4 VSS_5 RXB_5V RXB_DDC_DAT RXB_DDC_CLK RXB_C- RXB_C+ VDDH[3V3]_3 VDDH[3V3]_4 VSS_6 VDDC[1V8]_2 RXB_HPD RXB_D0- RXB_D0+ RXB_D1- RXB_D1+ RXB_D2- RXB_D2+ CDEC_DDC VDDC[3V3] R668 SCL/SEL0 TEST 0 MODE 50 0 R675 OPT 0 C617 0.1uF R670 0 C618 5.6nF R671 +3.3V_HDMI R672 4.7K OPT R673 4.7K OPT 4.7K R674 OPT Y11 D0+_HDMI1 Y11 D1-_HDMI1 R669 0 Y11 D1+_HDMI1 Y10 D2-_HDMI1 5:G5;16:G14 SDA1_3.3V SCL1_3.3V 5:G5;16:G14 Y10 D2+_HDMI1 YKF45-7058V JK500 GND UI_HW_PORT1 VARISTORS(VR500/501/502/503/504/505/506/507) on lines-HPD1/2/3/4 are all options in case HDMI Switch doesn’t support ’ESD protection’ HDMI S/W For MSTAR Platform THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. BCM (BRAZIL VENUS) 2009.03.23 LEE GI YOUNG HDMI 2 15 A B C D E F G H I J IC503 D3.3V AZ1117H-1.8TRE1(EH13A) INPUT ADJ/GND +1.8V_AMP 7 3 2 C548 10uF 10V C549 0.1uF 16V 1 OUTPUT GND C551 0.1uF 16V C552 10uF 10V 6 +24V +24V_AMP L511 MLB-201209-0120P-N2 +24V_AMP R511 3.3 SPK_L+ D501 1N4148W 100V OPT R518 5.6 C531 1000pF 50V C532 1000pF 50V R519 5.6 C519 22000pF 50V L504 DA-8580 EAP38319001 2S 2F C538 0.47uF 50V 1S 22uH 1F C541 0.1uF 50V R524 4.7K C544 0.01uF 50V R527 3.3 R528 3.3 C545 0.01uF 50V SPK_L- H3 T_330uF_Capacitor C540 0.1uF 50V R523 4.7K C515 0.01uF 50V C520 0.1uF 50V C522 0.1uF 50V SPEAKER_L C553 330uF 35V C526 0.01uF 50V D502 1N4148W 100V OPT MLB-201209-0120P-N2 5 R502 100 9:G7;9:I3;12:I4 AMP_RST C506 1000pF 50V R504 0 D3.3V C514 22000pF 50V H3 L503 PGND1A_2 PGND1A_1 PVDD1A_2 PVDD1A_1 PVDD1B_2 PVDD1B_1 PGND1B_2 PGND1B_1 OUT1A_2 OUT1A_1 OUT1B_2 OUT1B_1 C521 1uF 16V BST1B 56 55 54 53 52 51 50 49 48 47 46 45 44 C511 9:G6 +1.8V_AMP AUDIO_M_CLK +1.8V_AMP MLB-201209-0120P-N2 MLB-201209-0120P-N2 1uF 10V BST1A VDR1A RESET AD DVSS_1 VSS_IO CLK_I VDD_IO DGND_PLL AGND_PLL LFM AVDD_PLL DVDD_PLL TEST0 43 VDR1B Change 22uH(L504,L505) TO 15uH/6.3mm After DV1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 42 41 40 39 38 37 36 NC VDR2A BST2A C523 16V1uF C525 22000pF 50V D503 1N4148W 100V OPT R520 5.6 C533 1000pF 50V C534 1000pF 50V R521 5.6 L505 DA-8580 EAP38319001 2S 2F C546 C539 0.47uF 50V C542 0.1uF 50V R525 4.7K 0.01uF 50V R529 3.3 R530 C543 0.1uF 50V R526 4.7K 3.3 C547 0.01uF 50V SPK_R+ H3 PGND2A_2 PGND2A_1 OUT2A_2 OUT2A_1 PVDD2A_2 PVDD2A_1 PVDD2B_2 PVDD2B_1 OUT2B_2 OUT2B_1 PGND2B_2 C508 0.1uF L502 R501 0 C504 100pF 50V C507 1000pF 50V R503 3.3K IC501 NTP-3100L SPEAKER_R 35 34 33 32 31 L501 1S 22uH 1F 4 D504 1N4148W 100V OPT EAN60664001 30 29 SPK_R- H3 C501 10uF 10V C502 0.1uF 16V C503 10uF 6.3V C505 0.1uF 16V +1.8V_AMP +24V_AMP R522 3.3 C527 0.01uF 50V C524 22000pF 50V T_330uF_Capacitor H5 SPK_LL510 120-ohm R513 AMP_MUTE 12:F3 H4 SPK_RH4 SPK_R+ L509 120-ohm 1 P501 2 C528 0.1uF 50V C530 0.1uF 50V C535 0.01uF 50V H5 SPK_L+ L508 120-ohm 3 SDATA FAULT VDR2B BST2B WCK BCK SDA SCL MONITOR_0 MONITOR_1 MONITOR_2 PGND2B_1 DVSS_2 DVDD C529 330uF WAFER-ANGLE L507 120-ohm 4 5 C510 10uF 10V C513 0.1uF 16V C518 1uF 10V 11:F7 BCM_I2S_DATA_OUT BCM_I2S_WORD_CLK BCM_I2S_BIT_CLK SDA1_3.3V SCL1_3.3V R505 R506 R507 R508 R509 100 100 100 100 100 C512 33pF 50V 3 11:F6 11:F7 C517 33pF 50V OPT 100 9:I4;2:AH5 9:I4;2:AH5 2A => 5A C509 33pF 50V 2 MCLK SDATA WCK BCK TP is necessory Monitor0_1_2 TP is necessory 1 THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. BCM (BRAZIL VENUS) 2009.03.23 KIM JONG HYUN AUDIO 3 15 A * FROM LIPS & POWER B/D -->Apply changed Pin Map B +5V_ST L806 C E MLB-201209-0120P-N2 +3.3V_ST C D E +12V F G H I J OPT Q805 C820 15pF 50V OPT B R817 33K R820 33K R823 1K R829 0 R873 3.3K R859 330K 1/10W IC809 SC2621ASTRT L822 MLB-201209-0120P-N2 D3.3V C873 1uF 25V +3.3V_MEMC +12V L829 MLB-201209-0120P-N2 7 N.C GND GND 5.2V 5.2V +12V L808 MLB-201209-0120P-N2 C896 22uF 16V C828 0.1uF 50V C826 47uF 25V C824 0.1uF 50V OPT Q807 2SC3875S(ALY) E OPT B R828 10K OPT RL_ON 12:I5;14:E5 BST R875 0 P801 FM20020-24 RT1P141C-T112 C D803 1N4148W 100V DH A3.3V We’ll change SI4804 to KEC’s Product L828 100uF 16V C883 C1814 1 14 1 3 5 7 9 11 13 15 17 19 21 23 2 4 6 8 10 12 14 16 18 20 22 24 POWER_ON GND GND 5.2V 5.2V GND 12V GND 24V Inverter_On Error_Out PWM_Dim L805 CB4532UK121E +24V CB4532UK121E L807 220uF ==> 100uF*2 + 22uF for Depth +5V_ST OCS 2 13 PN L830 MLB-201209-0120P-N2 10uF C882 6.3V R876 A2[GN]1K 10uF C881 6.3V 0.01uF C884 Q812 SI4804BDY FB C827 100uF C899 100uF 16V C819 22uF 16V C842 22uF 16V LDOG 4 11 DL S1 R862 5.6K D1_2 R864 620 470pF C880 0.1uF 10uF 6.3V C878 33uF GND 12V GND 24V N.C A.Dim C1809 5 10 DRV 2 3 4 7 6 5 LDFB G2 D2_1 GND_1 C862 470pF C812 0.1uF 50V +5.0V 7 8 VCC C807 68uF 35V C804 1uF 50V 6 JP810 A_DIM 9:G6;9:I3 4.7K R801 C805 1uF 25V L804 BG2012B080TF N.C C802 68uF 35V C856 6800pF R854 10K C1806 1uF 25V OPT C1819 0.1uF 50V C872 1uF 25V 10uF 25V 0.1uF 6 9 NC S2 D2_2 3.3 SAM2333 C879 470pF 1K R863 must be placed with pin#8,#10 as close as possible. GND 25 R815 100 OPT R816 6.8K C R818 3.3K +3.3V_ST OPT R826 10K C C808 16V 0.1uF OPT C895 0.1uF 50V TruMotion_240Hz B R824 10K R830 0 R870 10K OPT R827 10K OPT * D1.8V D1.8V INV_ON/OFF 12:I5 +5.0V D3.3V IC802 AZ1085S-ADJTR/E1 INPUT OUTPUT C822 ADJ/GND 1% R857 56 R819 56 1% 1% R825 66.5 330uF C818 4V PGND 0.1uF L812 MLB-201209-0120P-N2 1 8 LX_2 R843 E Q806 2SC3052 Q813 2SC3875S(ALY) OPT E B 415 mA @85% efficiency +1.8V_MEMC 750 mA PWM_DIM 9:G7;9:I3;7:I5 5 R822 0 OPC_OUT1 7:I5 OPT C829 1uF 25V OPT R807 0 OPT C806 R802 0 0.1uF 16V OPT ERROR_OUT 12:F6 C876 100uF 16V 3 1 2 10K OPT R869 0 L826 BG2012B080TF IC805 AOZ1073AIL 400 mA + 600 mA C811 0.1uF L815 3.6uH C G1 D1_1 R861 0.1uF 1 8 LD1 C1816 10uF 6.3V A1[RD] 3 12 C887 COMP GND_2 C885 C886 2.2uH VIN 2 7 LX_1 C1817 10uF MLB-201209-0120P-N2 L813 +12V C855 10uF 6.3V C859 0.1uF 12:A3;A6;C4;F7;G7;I2;14:B2 AGND R2 R1 Vout = (1+R2/R1)*1.25 C840 0.1uF 1000pF 50V C841 10uF FB * +12V to +5.0V C838 1uF 25V D802 1N4148W 100V +12V 12:A3;A6;B5;F7;G7;I2;14:B2 0 3 6 EN 4 5 COMP 1/10W IC806 SC2621ASTRT BST 1 DH R844 11K R832 3.3K R834 150K 1.8V_BCM3556 C836 R871 20K R877 +5.0V 12:A3;2:Y20;2:Z10;B3;C6;H5;7:A3;14:I7;14:J1 C846 330pF 50V R845 15K 14 OCS 2 13 PN L819 2.2uH R853 300 R849 10K D1_2 * +1.8V_MEMC for FRC DDR 4 COMP 3 12 GND_2 Q810 SI4804BDY C853 C860 10uF 10uF 16V 16V C863 10uF 16V C1808 C1801 100uF 16V 0.01uF D3.3V MLB-201209-0120P-N2 L824 FB 4 11 DL S1 VOUT : 2.533V * +1.26V Core for FRC +1.8V_MEMC 600 mA IC807 SC4215ISTRT +1.26V_MEMC C845 1 2 3 4 8 7 6 5 LDOG C1802 5 10 DRV G1 S2 G2 D1_1 D2_2 D2_1 R837 3.3 470pF C851 D2.5V NC_2 4 VIN 3 0 EN 7 GND 8 R840 A2.5V NC_1 L827 MLB-201209-0120P-N2 R852 10K LDFB 0.1uF 50V 6 9 NC NC_3 5 VO 39K 10V GND_1 7 8 VCC C830 2200pF 6.3V 6.3V R846 1K ADJ 33uF 10V C888 A2[GN] C832 1uF 25V R874 OPT C1818 0.1uF 50V 1.1K C821 0.068uF R821 1.8K C837 1uF 25V 10uF 25V 1 8 GND C848 470pF EN 6 2 7 ADJ VIN A1[RD] 3 +5.0V MLB-201209-0120P-N2 L811 C1815 10uF 6.3V C858 33uF 10V C1803 C1812 C1813 R841 SC4215ISTRT IC803 18K SAM2333 R831 6.8K R833 390K 1/8W IC804 SC2621ASTRT BST 1 DH C835 1uF 25V D801 1N4148W 100V +5V_ST 0 * +5.0V to 1.2V +12V C D805 D1.2V A1.2V * +5v_ST to +3.3V_ST R878 14 CB3216PA501E L801 OCS 2 13 PN L817 1.2K 2.2uH R842 R872 6.3V L821 MLB-201209-0120P-N2 10uF 6.3V Q804 SI4925BDY S1 1 8 D1_2 3 12 4V 2 * +12v -> PANEL_POWER G1 2 7 D1_1 COMP GND_2 Q809 SI4804BDY 0.01uF 2K C852 0.1uF C854 10uF C865 4 11 C1807 C861 FB DL S1 +5V_ST IC801 AZ1117D-3.3TRE1 INPUT OUTPUT +3.3V_ST OPT R812 47K R810 22K C814 0.1uF 16V 16V 47K R813 OPT R806 10K C Q802 C B 22K Q803 2SC3052 E C817 4.7uF 25V S2 3 6 D2_2 7:I5;7:I7 12V_TCON 470pF C1804 C844 1 2 3 4 8 7 6 5 330uF D1_2 R836 3.3 G2 4 5 D2_1 R847 C839 25V C1811 LDFB 0.1uF 6 9 NC S2 D2_2 D2_1 3 1 2 C1800 1uF 25V G2 GND_1 C847 C825 220pF C1805 1uF 25V R848 1.5K C815 2200pF R814 15K 1% 470pF 22uF 7 8 VCC 22uF 16V C810 C801 10uF 16V C803 0.1uF 16V ADJ/GND 2SC3052 E 1 FLASH, A1.2, +1.8_DDR_BCM3556, VTT THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. BCM (BRAZIL VENUS) R811 12:I5 PANEL_CTL R805 10K B 2009.03.23 AN SO YOUNG POWER 4 C898 5 10 G1 D1_1 200 LDOG DRV 1uF 25V 1uF C833 22uF 25V 15 0.1uF 10uF 10uF C868 10uF 10V C870 0.1uF 16V 4 5 C875 C877 NC_2 NC_3 R856 22K C1810 10uF 10uF must be placed with pin#8,#10 as close as possible. 2 R835 NC_1 1 3 6 VO 6.3V 6.3V 16V 33uF R855 12.4K 1% A B C D E F G H I J D1.8V D1.8V C327 0.047uF C309 0.047uF C315 0.047uF C333 0.047uF C328 2700pF C332 0.01uF C325 0.1uF C352 0.1uF C353 0.1uF C330 10uF C326 0.01uF C334 2700pF C323 100uF C331 0.1uF C305 100uF C308 0.01uF C307 0.1uF C313 0.1uF C314 0.01uF C316 2700pF C349 0.1uF C311 470pF C317 470pF C350 0.1uF 7 A1.2V IC100 BCM3556 A6 DDR_BVDD0 DDR_BVDD1 DDR_BVSS0 DDR_BVSS1 DDR_PLL_TEST DDR_PLL_LDO DDR01_CKE DDR_COMP DDR01_ODT A24 B7 B24 F20 B23 B17 C22 E16 C23 B12 C12 A13 A12 B15 E14 A15 D15 E13 E12 F13 C14 F14 B14 D14 C13 D13 B13 F15 C15 D16 F16 B16 E15 A17 A8 B11 B8 D11 E11 C8 C11 C9 D8 E10 E9 F11 F12 E8 D10 F8 C18 C20 A18 B21 C21 B18 B20 D18 E18 D21 F18 E20 A22 F17 B22 E17 A10 C10 A20 F19 B10 B9 F10 F9 B19 C19 E19 D19 C16 A7 A23 C17 C7 C361 C343 C342 C360 C347 C344 C358 C359 D22 C355 0.1uF VDDL J1 0.1uF 0.1uF C345 C346 C310 2700pF C351 0.1uF C354 0.1uF C324 10uF C329 470pF C335 470pF C306 10uF C312 10uF DDR0_VREF0 DDR1_VREF0 Qimonda IC300 R312 0 OPT R313 240 R301 22 C300 DDR01_CKE DDR01_ODT DDR0_CLK DDR0_CLKb DDR1_CLK DDR1_CLKb DDR01_A[0] DDR01_A[1] DDR01_A[2] DDR01_A[3] DDR0_A[4] DDR0_A[5] DDR0_A[6] DDR01_A[7] DDR01_A[8] DDR01_A[9] DDR01_A[10] DDR01_A[11] DDR01_A[12] DDR01_A[13] DDR1_A[4] DDR1_A[5] DDR1_A[6] DDR01_BA0 DDR01_BA1 DDR01_BA2 DDR01_CASb DDR0_DQ[0] DDR0_DQ[1] DDR0_DQ[2] DDR0_DQ[3] DDR0_DQ[4] DDR0_DQ[5] DDR0_DQ[6] DDR0_DQ[7] DDR0_DQ[8] DDR0_DQ[9] DDR0_DQ[10] DDR0_DQ[11] DDR0_DQ[12] DDR0_DQ[13] DDR0_DQ[14] DDR0_DQ[15] BA0 L2 L3 L1 A1 E1 J9 CK CK CKE J8 K8 K2 M9 R1 VDD_5 VDD_4 VDD_3 VDD_2 VDD_1 CK CK CKE J8 K8 K2 BA0 BA1 BA2 L2 L3 L1 A1 E1 J9 M9 R1 VDD_5 VDD_4 VDD_3 VDD_2 VDD_1 Qimonda IC301 DDR0_DQ[0-15] B4 C321 C322 C301 HYB18TC1G160C2F-1.9 HYB18TC1G160C2F-1.9 DDR1_DQ[0-15] B4 E5;H5;I2 470pF 0.1uF E5;H5;I1 E5 E5 H5 H5 DDR01_A[0-3] E6;H6;H2 B6;H2 B6;H6;H2;B5 DDR01_A[0-3,7-13] VREF J2 G8 G2 DDR0_A[4-6] DDR01_A[0] DDR01_A[1] DDR01_A[2] DDR01_A[3] DDR0_A[4] DDR0_A[5] DDR0_A[6] DDR01_A[7] DDR0_A[4-6] D6;H2 DDR01_A[8] DDR01_A[9] DDR01_A[10] DDR01_A[11] DDR01_A[12] DDR01_A[7-13] E6;H6;H2 B5;H5;I1 B5;H5;I1 B5;H5;I1 DDR1_A[4-6] H6;H1 B6 DDR01_BA0 DDR01_BA1 DDR01_BA2 DDR0_CLK R300 100 B6 B6;H5;I2 DDR0_CLKb DDR01_CKE CK CK CKE J8 K8 K2 BA0 BA1 BA2 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DDR0_DQ[0] DDR0_DQ[1] DDR0_DQ[2] DDR0_DQ[3] DDR0_DQ[4] DDR0_DQ[5] DDR0_DQ[6] DDR0_DQ[7] DDR0_DQ[8] DDR0_DQ[9] DDR0_DQ[10] DDR0_DQ[11] DDR0_DQ[12] DDR0_DQ[13] DDR0_DQ[14] DDR0_DQ[15] D1.8V A1 E1 J9 M9 R1 VDD5 VDD4 VDD3 VDD2 VDD1 470pF 0.1uF B6;E6;H2;B5 DDR01_A[0-3,7-13] VREF J2 G8 G2 B5;H1 DDR1_A[4-6] DDR01_A[0] DDR01_A[1] DDR01_A[2] DDR01_A[3] DDR1_A[4] DDR1_A[5] DDR1_A[6] DDR01_A[7] DDR01_A[8] DDR01_A[9] DDR01_A[10] DDR01_A[11] DDR01_A[12] A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DDR1_DQ[0] DDR1_DQ[1] DDR1_DQ[2] DDR1_DQ[3] DDR1_DQ[4] DDR1_DQ[5] DDR1_DQ[6] DDR1_DQ[7] DDR1_DQ[8] DDR1_DQ[9] DDR1_DQ[10] DDR1_DQ[11] DDR1_DQ[12] DDR1_DQ[13] DDR1_DQ[14] DDR1_DQ[15] D1.8V A1 E1 J9 R303 100 B6 B6;E5;I2 DDR1_CLKb DDR01_CKE CK CK CKE J8 K8 K2 M9 R1 VDD5 VDD4 VDD3 VDD2 VDD1 6 DDR_EXT_CLK DDR0_CLK DDR0_CLKB DDR1_CLK DDR1_CLKB DDR01_A00 DDR01_A01 DDR01_A02 DDR01_A03 DDR0_A04 DDR0_A05 DDR0_A06 DDR01_A07 DDR01_A08 DDR01_A09 DDR01_A10 DDR01_A11 DDR01_A12 DDR01_A13 DDR1_A04 L2 L3 L1 B5;E5;I1 B5;E5;I1 B5;E5;I1 B6 DDR01_BA0 DDR01_BA1 DDR01_BA2 DDR1_CLK BA0 BA1 BA2 L2 L3 L1 5 DDR1_A05 DDR1_A06 DDR01_BA0 DDR01_BA1 DDR01_BA2 DDR01_CASB DDR0_DQ00 DDR0_DQ01 DDR0_DQ02 DDR0_DQ03 DDR0_DQ04 DDR0_DQ05 DDR0_DQ06 DDR0_DQ07 DDR0_DQ08 DDR0_DQ09 DDR0_DQ10 DDR0_DQ11 DDR0_DQ12 DDR0_DQ13 B6;H5;I1 B2;H5;I1 B5;H5;I1 B2;H5;I1 DDR01_ODT DDR01_RASb DDR01_CASb DDR01_WEb ODT CS RAS CAS WE K9 L8 K7 L7 K3 A9 C1 C3 C7 C9 E9 G1 G3 G7 G9 VDDQ10 VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1 B6;E5;I1 B2;E5;I1 B5;E5;I1 B2;E5;I1 DDR01_ODT DDR01_RASb DDR01_CASb DDR01_WEb ODT CS RAS CAS WE K9 L8 K7 L7 K3 A9 C1 C3 C7 C9 E9 G1 G3 G7 G9 VDDQ10 VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1 HYNIX IC300-*2 H5PS1G63EFR-20L ELPIDA IC300-*1 EDE1116ACBG-1J-E DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 VREF DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DDR0_DQ[0-15] G6 VREF J2 G8 G2 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9 J2 G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9 B3 B3 DDR0_DQS0 DDR0_DQS1 LDQS UDQS F7 B7 B3 B3 DDR1_DQS0 DDR1_DQS1 LDQS UDQS F7 B7 B3 B3 DDR0_DM0 DDR0_DM1 LDM UDM F3 B3 A3 VSS5 VSS4 VSS3 VSS2 VSS1 B3 B3 DDR1_DM0 DDR1_DM1 LDM UDM F3 B3 A3 VSS5 VSS4 VSS3 VSS2 VSS1 B3 B3 DDR0_DQS0b DDR0_DQS1b LDQS UDQS E8 A8 E3 J3 N1 P9 B3 B3 DDR1_DQS0b DDR1_DQS1b LDQS UDQS E8 A8 E3 J3 N1 P9 4 DDR0_DQ14 DDR0_DQ15 DDR1_DQ00 DDR1_DQ01 DDR1_DQ02 DDR1_DQ03 DDR1_DQ04 DDR1_DQ05 DDR1_DQ06 DDR1_DQ07 DDR1_DQ08 DDR1_DQ09 DDR1_DQ10 DDR1_DQ11 DDR1_DQ12 DDR1_DQ13 DDR1_DQ14 DDR1_DQ15 DDR0_DM0 DDR0_DM1 DDR1_DQ[0] DDR1_DQ[1] DDR1_DQ[2] DDR1_DQ[3] DDR1_DQ[4] DDR1_DQ[5] DDR1_DQ[6] DDR1_DQ[7] DDR1_DQ[8] DDR1_DQ[9] DDR1_DQ[10] DDR1_DQ[11] DDR1_DQ[12] DDR1_DQ[13] DDR1_DQ[14] DDR1_DQ[15] DDR0_DM0 DDR0_DM1 DDR1_DM0 DDR1_DM1 DDR0_DQS0 DDR0_DQS0b DDR0_DQS1 DDR0_DQS1b DDR1_DQS0 DDR1_DQS0b DDR1_DQS1 DDR1_DQS1b DDR01_RASb E5;H5;I1 D1.8V E4 E4 H4 H4 E4 E4 E4 E4 H4 H4 H4 H4 DDR0_VREF0 DDR1_VREF0 DDR1_DQ[0-15] J6 BA1 NC_4/BA2 NC4 NC5 R3 R7 NC4 NC5 R3 R7 NC1 ODT CS RAS CAS WE K9 L8 K7 L7 K3 A9 C1 C3 C7 C9 E9 LDQS UDQS F7 B7 G1 G3 G7 G9 LDM UDM F3 B3 A3 LDQS UDQS E8 A8 E3 J3 N1 NC_5/A14 NC_6/A15 R3 R7 B2 B8 A7 D2 D8 VSSDL J7 E7 F2 F8 H2 VDDL J1 H8 VSSQ_10 VSSQ_9 VSSQ_8 VSSQ_7 VSSQ_6 VSSQ_5 VSSQ_4 VSSQ_3 VSSQ_2 VSSQ_1 VDDL J1 VSSDL J7 P9 VSS_5 VSS_4 VSS_3 VSS_2 VSS_1 NC_5 NC_6 R3 R7 B2 B8 A7 D2 D8 E7 F2 F8 H2 H8 VSSQ_10 VSSQ_9 VSSQ_8 VSSQ_7 VSSQ_6 VSSQ_5 VSSQ_4 VSSQ_3 VSSQ_2 VSSQ_1 LDQS UDQS E8 A8 VDDQ_10 VDDQ_9 VDDQ_8 VDDQ_7 VDDQ_6 VDDQ_5 VDDQ_4 VDDQ_3 VDDQ_2 VDDQ_1 LDM UDM F3 B3 A3 E3 J3 N1 P9 VSS_5 VSS_4 VSS_3 VSS_2 VSS_1 LDQS UDQS F7 B7 ODT CS RAS CAS WE K9 L8 K7 L7 K3 A9 C1 C3 C7 C9 E9 G1 G3 G7 G9 VDDQ_10 VDDQ_9 VDDQ_8 VDDQ_7 VDDQ_6 VDDQ_5 VDDQ_4 VDDQ_3 VDDQ_2 VDDQ_1 A2 E2 R8 B2 B8 A7 D2 D8 E7 F2 F8 H2 VSSQ10 VSSQ9 VSSQ8 VSSQ7 VSSQ6 VSSQ5 VSSQ4 VSSQ3 VSSQ2 VSSQ1 VREF J2 HYNIX IC301-*2 H5PS1G63EFR-20L DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 ELPIDA IC301-*1 EDE1116ACBG-1J-E VREF DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 NC1 NC2 NC3 A2 E2 R8 B2 B8 A7 D2 D8 E7 F2 F8 H2 VSSQ10 VSSQ9 VSSQ8 VSSQ7 VSSQ6 VSSQ5 VSSQ4 VSSQ3 VSSQ2 VSSQ1 NC2 NC3 G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9 J2 G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 VSSDL J7 VSSDL J7 VDDL J1 H8 VDDL J1 H8 NC_1 NC_2 NC_3/A13 A2 E2 R8 NC_1 NC_2 NC_3 A2 E2 R8 BA0 BA1 NC_4/BA2 L2 L3 L1 A1 E1 J9 M9 R1 VDD_5 VDD_4 VDD_3 VDD_2 VDD_1 BA0 BA1 BA2 L2 L3 L1 A1 E1 J9 M9 R1 VDD_5 VDD_4 VDD_3 VDD_2 VDD_1 CK CK CKE J8 K8 K2 CK CK CKE J8 K8 K2 3 DDR1_DM0 DDR1_DM1 DDR0_DQS0 DDR0_DQS0B DDR0_DQS1 DDR0_DQS1B DDR1_DQS0 DDR1_DQS0B DDR1_DQS1 DDR1_DQS1B DDR01_RASB DDR_VREF0 DDR_VREF1 DDR01_WEB DDR_VDDP1P8_1 DDR_VDDP1P8_2 ODT CS RAS CAS WE K9 L8 K7 L7 K3 A9 C1 C3 C7 C9 E9 G1 G3 G7 G9 VDDQ_10 VDDQ_9 VDDQ_8 VDDQ_7 VDDQ_6 VDDQ_5 VDDQ_4 VDDQ_3 VDDQ_2 VDDQ_1 ODT CS RAS CAS WE K9 L8 K7 L7 K3 A9 C1 C3 C7 C9 E9 G1 G3 G7 G9 VDDQ_10 VDDQ_9 VDDQ_8 VDDQ_7 VDDQ_6 VDDQ_5 VDDQ_4 VDDQ_3 VDDQ_2 VDDQ_1 LDQS UDQS F7 B7 LDQS UDQS F7 B7 LDM UDM F3 B3 A3 VSS_5 VSS_4 VSS_3 VSS_2 VSS_1 LDM UDM F3 B3 A3 VSS_5 VSS_4 VSS_3 VSS_2 VSS_1 * DDR_VTT LDQS UDQS E8 A8 E3 J3 N1 P9 LDQS UDQS E8 A8 E3 J3 N1 P9 NC_5/A14 NC_6/A15 R3 R7 NC_5 NC_6 R3 R7 DDR_VTT D3.3V NC_1 NC_2 NC_3/A13 A2 E2 R8 B2 B8 A7 D2 D8 E7 F2 F8 H2 H8 VSSQ_10 VSSQ_9 VSSQ_8 VSSQ_7 VSSQ_6 VSSQ_5 VSSQ_4 VSSQ_3 VSSQ_2 VSSQ_1 VDDL J1 VSSDL J7 NC_1 NC_2 NC_3 A2 E2 R8 B2 B8 A7 D2 D8 E7 F2 F8 H2 H8 VSSQ_10 VSSQ_9 VSSQ_8 VSSQ_7 VSSQ_6 VSSQ_5 VSSQ_4 VSSQ_3 VSSQ_2 VSSQ_1 DDR01_WEb VSSDL J7 DDR_VTT 1uF 470pF 470pF 1uF 1uF 470pF 470pF 1uF C869 100uF 16V C874 10uF 10V C864 0.1uF 16V GND IC808 BD35331F-E2 VTT D1.8V DDR01_A[0-3,7-13] DDR1_A[4] DDR01_A[0] DDR0_A[4-6] DDR01_A[1] DDR01_A[2] R305 DDR0_A[4] 75 DDR0_A[5] DDR0_A[6] DDR01_A[3] R306 75 C339 0.01uF R307 75 C340 0.01uF C338 0.01uF R304 75 C336 0.01uF 2 EN 1 8 2 7 VTT_IN DDR1_VREF0 VTTS C337 0.01uF DDR0_VREF0 R850 0 VREF 3 6 VCC 4 5 VDDQ DDR01_A[7] DDR01_A[8] C871 1uF 6.3V DDR01_A[9] DDR01_A[10] DDR01_A[11] DDR01_A[12] DDR01_A[13] B6;E5;H5 DDR01_CKE OPT DDR1_A[5] DDR1_A[6] B5;E5;H5 B5;E5;H5 DDR1_A[4-6] B2;E5;H5 B5;E5;H5 B5;E5;H5 B2;E5;H5 B6;E5;H5 DDR01_BA1 DDR01_BA2 DDR01_RASb DDR01_BA0 DDR01_CASb DDR01_WEb DDR01_ODT 75 75 R851 0 16V C867 100uF 16V C897 0.1uF 16V C866 0.1uF C831 0.1uF 16V C834 0.1uF 16V 1M R858 BCM recommends to remove this R R310 R308 75 C341 0.01uF C362 0.1uF R309 75 1 THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. R311 BCM (BRAZIL VENUS) 2009.03.23 HONG YEON HYUK DDR Memory 6 15 A B R929 C LVDS_TX_1_DATA3_P LVDS_TX_1_DATA4_P LVDS_TX_1_DATA4_N D LVDS_TX_0_DATA2_N LVDS_TX_0_DATA3_P LVDS_TX_0_DATA1_P LVDS_TX_0_DATA4_P LVDS_TX_0_DATA4_N LVDS_TX_0_DATA3_N LVDS_TX_0_DATA2_P LVDS_TX_1_DATA3_N LVDS_TX_1_DATA2_P LVDS_TX_1_DATA2_N LVDS_TX_1_DATA1_P LVDS_TX_1_DATA1_N LVDS_TX_1_DATA0_P LVDS_TX_1_DATA0_N LVDS_TX_0_CLK_P LVDS_TX_1_CLK_P LVDS_TX_1_CLK_N LVDS_TX_0_CLK_N E LVDS_TX_0_DATA1_N LVDS_TX_0_DATA0_P LVDS_TX_0_DATA0_N F G H I J * XTAL 1M X901 M_XTALO C946 22pF 12MHz C947 22pF M_XTALI R917 100 R923 100 BLM18PG121SN1D +3.3V_MEMC BLM18PG121SN1D URSA_A3P URSA_A4P URSA_B0P URSA_B0M URSA_B1P URSA_A0P URSA_A0M URSA_A1P URSA_A1M URSA_A2M URSA_ACKP URSA_A2P URSA_A3M URSA_ACKM URSA_A4M URSA_B1M L909 CB3216PA501E R924 100 R925 100 R926 100 R927 0.1uF C944 C943 100 R928 100 1uF L907 +3.3V_MEMC 12V_TCON 7 +1.26V_MEMC +3.3V_MEMC BLM18PG121SN1D BLM18PG121SN1D L905 22uF/16 CST PROBLEM 6.3V 6.3V L906 R918 100 R919 100 R920 100 R921 100 R922 100 0.1uF C940 M_XTALO M_XTALI L908 P903 TF05-51S 10uF 10uF 1 0.1uF 50V C960 2 1000pF 50V C961 3 4 5 6 7 8 9 C952 0.1uF C914 0.1uF C3019 10uF 0.1uF 10uF 10uF 10uF 10V C933 0.1uF C942 C954 C915 0.1uF C937 0.1uF 0.1uF 0.1uF C916 10 C923 C926 AVDD_LVDS_1 AVDD_LVDS_2 PI Result R931 GPIO[25] AVDD_PLL GPIO_13 GPIO_14 GPIO_12 GPIO_2 GPIO_1 GPIO_9 GPIO_8 LVACKP LVACKM GPIO_6 GPIO_4 GND_5 GND_2 LVA0P LVA0M LVA1P LVA1M LVA2P LVA2M LVA3P LVA3M LVA4P LVA4M LVB0P LVB0M LVB1P LVB1M 820 REXT C955 0.1uF D8 D10 E10 E3 GPIO_5 GPIO_7 GPIO_11 GPIO_10 GPIO_3 LVB2P LVB2M LVBCKP LVBCKM LVB3P LVB3M LVB4P LVB4M AVDD_33_2 GND_4 LVC0P LVC0M LVC1P LVC1M LVC2P LVC2M LVCCKP LVCCKM LVC3P LVC3M LVC4P LVC4M LVD0P LVD0M LVD1P LVD1M 0.1uF URSA_C0P URSA_C0M URSA_C1P URSA_C1M URSA_C2P URSA_C2M C956 URSA_B2P URSA_B2M URSA_BCKP URSA_BCKM URSA_B3P URSA_B3M URSA_B4P URSA_B4M URSA_B4M URSA_B4P URSA_B3M URSA_B3P URSA_BCKM URSA_BCKP URSA_B2M URSA_B2P URSA_B1M URSA_B1P URSA_B0M URSA_B0P BIT_SEL URSA_A4M URSA_A4P URSA_A3M URSA_A3P URSA_ACKM URSA_ACKP URSA_A2M URSA_A2P URSA_A1M URSA_A1P URSA_A0M URSA_A0P OPT OPC_OUT1 PWM_DIM +3.3V_MEMC 12V_TCON 499 OPC_EN R948 R954 3.3K OPT R936 0 0 R937 OPC_EN 10uF C935 C948 C949 C931 11 12 13 14 15 16 17 18 19 20 21 22 23 RECKP RECKN GND_6 ROCKP RE4P RE4N RE3P RE3N RE2P RE2N RE1P RE1N RE0P RE0N RO4P RO4N RO3P RO3N RO2P RO2N RO1P RO1N RO0P RO0N XOUT SDAM A3 A3 ISP_RXD_TR ISP_TXD_TR R910 0 F11 G11 K15 K16 XIN R909 0 B14 A14 SCLM 6 ROCKN E11 D13 D11 F10 C10 A10 B10 B11 A11 C11 C12 A12 B12 B13 A13 C13 C14 9:I4 9:I4 SDA3_3.3V SCL3_3.3V R911 R912 100 100 0.1uF SDAS SCLS GPIO[8] GPIO[9] GND_14 VDDC_1 C929 GPIO[10] GPIO[11] GPIO[12] GPIO[13] +3.3V_MEMC GPIO[22] GPIO[23] GPIO[14] R915 1K GPIO[15] GPIO[16] GPIO[17] GPIO[18] R916 OPT 1K GPIO[19] GPIO[20] GPIO[21] C930 0.1uF 0.1uF VDDP_2 GND_7 E1 D1 F1 G1 K8 E5 E2 F2 F3 G2 M4 M5 G3 E4 F4 G4 H4 J4 K4 L4 J6 H9 [E1] [D1] D12 B1 A1 C1 C2 A2 B2 B3 A3 C3 C4 A4 B4 H8 B5 A5 C5 C6 A6 B6 B7 A7 C7 C8 A8 B8 H7 D4 D3 D5 D6 N7 G8 B9 A9 C9 D9 D7 OPT R953 0 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 D2 C15 B15 A15 A16 B16 C16 D15 D16 F9 G10 E15 E16 E14 F14 F16 F15 G15 G16 G14 H14 H16 H15 J15 J16 J14 K14 OPT LVDS_SEL 9:G6;I5 1/16W 5% R3029 0 +3.3V_MEMC BLM18PG121SN1D 5 L903 10uF C911 C910 C912 0.1uF 16V C913 0.1uF 16V 10uF URSA_CCKP URSA_CCKM URSA_C3P URSA_C3M URSA_C4P URSA_C4M URSA_D0P URSA_D0M URSA_D1P URSA_D1M OPC_EN LVDS_SEL PI Result URSA_DQ[0-31] GND_15 K9 VDDC_2 F6 H1 H2 H3 J1 J2 J3 K1 K2 K6 K3 L1 J8 L2 L3 L6 L8 H10 M1 M2 L7 M3 N1 J9 N2 N3 L10 P1 R1 T1 T2 R2 P2 G7 L9 N5 J10 L11 K10 T10 K11 R10 P10 T11 R11 J11 P11 T12 R12 P12 H11 T13 R13 P13 T14 R14 P14 T15 R15 P15 T16 R16 P16 N10 N11 M11 N4 T3 R3 P3 T4 R4 P4 T5 R5 P5 T6 R6 P6 T7 R7 P7 T8 R8 P8 N8 F7 T9 R9 K7 P9 N9 J7 G6 [N5] [N4] [L9] [N13] [N12] R941 R940 0 OPC_EN 0 URSA_DQ[20] URSA_DQ[19] URSA_DQ[17] URSA_DQ[22] URSA_DQ[27] URSA_DQ[28] C918 URSA_DQ[25] URSA_DQ[30] 0.1uF C927 MDATA[20] MDATA[19] MDATA[17] MDATA[22] MDATA[27] MDATA[28] MDATA[25] MDATA[30] AVDD_DDR_2 DQM[3] DQM[2] OPT R949 3.3K +1.8V_MEMC BLM18PG121SN1D IC901 LGE7329A 22uF/16 CST PROBLEM L904 C957 G9 L14 L15 L16 M16 F8 M15 M14 N16 N15 H6 N6 E12 D14 F12 E13 F13 G13 H13 J13 K12 L12 K13 M12 M13 L13 N14 N13 N12 GND_3 LVD2P LVD2M LVDCKP LVDCKM AVDD_33_1 LVD3P LVD3M LVD4P LVD4M VDDC_5 GPIO[24] GPIO[7] GPIO[6] GPIO[5] GPIO[4] GPIO[3] R938 1K R942 GPIO[2] GPIO[1] GPIO[0] PWM0 PWM1 CSZ SDO SDI SCK GPIO[30] GPIO[29] GPIO[28] M_SPI_CZ OPT R939 1K R943 M_SPI_DI M_SPI_CK 1K OPT M_SPI_DO 1K P904 TF05-41S 0.1uF URSA_D2P 0.1uF URSA_D2M URSA_DCKP URSA_DCKM URSA_D3P URSA_D3M URSA_D4P C953 URSA_D4M 0.1uF C3020 10uF C909 10uF C907 C901 4 * ISP Port for MEMC C904 URSA_DQM3 URSA_DQM2 C919 URSA_DQS2 URSA_DQSB2 0.1uF C928 URSA_DQS3 URSA_DQSB3 URSA_DQ[31] P902 TJC2508-4A +5.0V URSA_DQ[24] C920 URSA_DQ[26] URSA_DQ[29] +3.3V_MEMC BLM18PG121SN1D 1 2.2K R907 OPT 2.2K R908 OPT URSA_DQ[23] URSA_DQ[16] URSA_DQ[18] URSA_DQ[21] URSA_MCLK URSA_MCLKZ C925 0.1uF 0.1uF 0.1uF 10uF GND_10 DQS[2] DQSB[2] AVDD_DDR_4 VDDP_3 GND_8 DQS[3] DQSB[3] AVDD_DDR_5 MDATA[31] MDATA[24] GND_11 MDATA[26] MDATA[29] AVDD_DDR_6 MDATA[23] MDATA[16] MDATA[18] MDATA[21] MCLK[0] MCLKZ[0] GND_1 AVDD_MEMPLL MVREF ODT 0.1uF +3.3V_MEMC R955 3.3K 1 2 URSA_D4M URSA_D4P URSA_D3M URSA_D3P URSA_DCKM URSA_DCKP URSA_D2M URSA_D2P URSA_D1M URSA_D1P URSA_D0M URSA_D0P 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 ISP_RXD_TR 3 B6 ISP_TXD_TR 0.1uF 4 C906 10uF C908 B6 L902 3 2 URSA_ODT 0.1uF C921 0.1uF C922 AVDD_DDR_7 MCLKE AVDD_DDR_3 AVDD_DDR_1 GND_9 GND_12 GND_16 VDDC_3 GND_13 DQM[1] DQM[0] DQS[0] VDDP_1 DQS[1] GND_17 RESET MADR[0] MADR[2] MADR[4] MADR[6] MADR[8] BADR[1] BADR[0] MADR[1] MADR[5] MADR[9] MADR[7] MADR[3] DQSB[0] DQSB[1] MADR[11] MADR[10] MADR[12] MDATA[4] MDATA[3] MDATA[1] MDATA[6] MDATA[9] MDATA[8] MDATA[7] MDATA[0] MDATA[2] MDATA[5] MCLK[1] MCLKZ[1] GPIO[26] MDATA[11] MDATA[12] MDATA[14] MDATA[15] MDATA[10] MDATA[13] GPIO[27] VDDC_4 RASZ CASZ GPIO8 PWM1 PWM0 URSA_C4M URSA_C4P URSA_C3M URSA_C3P URSA_CCKM URSA_CCKP URSA_C2M URSA_C2P URSA_C1M URSA_C1P URSA_C0M URSA_C0P 19 20 21 22 23 WEZ I2C HIGH LOW HIGH 24 25 26 0.1uF 0.1uF C941 C950 EEPROM HIGH HIGH LOW 27 28 29 30 31 32 33 * SPI FLASH +3.3V_MEMC C932 C934 C936 C938 C939 10K R913 0.1uF 0.1uF C945 C951 SPI HIGH HIGH HIGH 2 0.1uF C958 IC902 W25X20AVSNIG +3.3V_MEMC 34 35 36 37 R930 0.1uF 0.1uF 0.1uF 0.1uF URSA_A[2] URSA_A[4] URSA_A[0] 0.1uF URSA_A[11] URSA_A[10] URSA_A[12] URSA_A[6] URSA_A[8] URSA_A[1] URSA_A[5] URSA_A[9] URSA_A[7] URSA_A[3] 0 38 4.7K R933 39 40 41 42 0.1uF 10K R914 C917 C924 1uF FRC_RESET URSA_DQ[11] URSA_DQ[12] URSA_DQ[14] URSA_DQ[15] URSA_DQ[10] URSA_DQ[13] URSA_DQ[3] URSA_DQ[1] URSA_DQ[6] URSA_DQ[9] URSA_DQ[8] URSA_DQ[7] URSA_DQ[0] URSA_DQ[2] URSA_DQ[4] URSA_DQ[5] M_SPI_CZ M_SPI_DO R945 R946 R947 56 56 10K CS 1 8 VCC DO 2 7 HOLD WP 3 6 CLK R951 R952 56 56 M_SPI_CK M_SPI_DI H3 H3 GND 4 5 DIO URSA_DQ[0-31] URSA_A[0-12] 1 THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. URSA_MCLKZ1 URSA_WEZ URSA_BA1 URSA_MCLKE URSA_DQSB0 URSA_DQSB1 URSA_DQM1 URSA_DQM0 URSA_DQS0 URSA_DQS1 URSA_MCLK1 URSA_RASZ URSA_CASZ URSA_BA0 BCM (BRAZIL VENUS) 2009.03.23 PARK.S.W LVDS / Mstar FRC 7 15 A 29 B C D E F G H I J K L M N O P Q R S T U V W X Y Z AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP DDR2 1.8V By CAP - Place these Caps near Memory +1.8V_MEMC +1.8V_FRC_DDR +1.8V_FRC_DDR +1.8V_FRC_DDR 28 0.1uF C1044 0.1uF 0.1uF 0.1uF C1043 C1045 C1042 BLM18PG121SN1D L1002 10V 10V 0.1uF C1017 0.1uF C1015 0.1uF C1019 10uF C1006 0.1uF C1008 0.1uF C1010 10uF C1011 0.1uF C1012 0.1uF C1013 0.1uF C1014 C1016 0.1uF C1018 0.1uF C1020 C1003 0.1uF C1009 0.1uF C1007 0.1uF 0.1uF C1021 0.1uF C1024 C1026 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF C1005 C1027 C1028 C1029 C1030 C1031 C1032 C1033 C1034 C1036 C1037 C1039 C1040 C1041 10uF C1035 C1025 PI Result 26 25 24 23 URSA_DQ[0-31] +1.8V_FRC_DDR +1.8V_FRC_DDR 10uF R1002 1K 1% 10uF 27 C1038 C1004 URSA_A[0-12] R1022 0.1uF 10uF 0.1uF 22 21 20 19 18 17 16 15 14 13 1K AR1018 DDR_DQ[15] DDR_DQ[8] 56 DDR_DQ[10] DDR_DQ[13] URSA_DQ[15] URSA_DQ[8] URSA_DQ[10] URSA_DQ[13] AR1017 56 URSA_DQ[7] URSA_DQ[0] URSA_DQ[2] URSA_DQ[5] AR1016 56 URSA_DQ[11] URSA_DQ[12] URSA_DQ[9] URSA_DQ[14] AR1015 56 URSA_DQ[6] URSA_DQ[1] URSA_DQ[3] URSA_DQ[4] URSA_DQ[0-31] 7:G1;C22 7:G1;AM22 AR1004 1000pF C1002 R1003 1K 1% URSA_DQ[28] URSA_DQ[25] URSA_DQ[30] URSA_DQ[22] URSA_DQ[17] URSA_DQ[19] URSA_DQ[20] URSA_DQ[31] URSA_DQ[24] URSA_DQ[26] URSA_DQ[29] URSA_DQ[23] URSA_DQ[16] URSA_DQ[18] URSA_DQ[21] 56 AR1001 56 AR1002 56 AR1003 56 DDR_DQ[28] DDR_DQ[25] DDR_DQ[30] DDR_DQ[22] DDR_DQ[17] DDR_DQ[19] DDR_DQ[20] DDR_DQ[16-31] DDR_DQ[31] DDR_DQ[24] DDR_DQ[26] DDR_DQ[29] DDR_DQ[23] DDR_DQ[16] DDR_DQ[18] DDR_DQ[21] DDR_DQ[16] DDR_DQ[17] DDR_DQ[18] DDR_DQ[19] DDR_DQ[20] DDR_DQ[21] DDR_DQ[22] DDR_DQ[23] DDR_DQ[24] DDR_DQ[25] DDR_DQ[26] DDR_DQ[27] DDR_DQ[28] DDR_DQ[29] DDR_DQ[30] DDR_DQ[31] DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9 J2 VREF R1023 IC1001 H5PS5162FFR-S6C C1001 1000pF 1K C1022 0.1uF 0.1uF C1023 URSA_DQ[27] DDR_DQ[27] IC1002 H5PS5162FFR-S6C VREF DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DDR_DQ[0] DDR_DQ[1] DDR_DQ[2] DDR_DQ[3] DDR_DQ[4] DDR_DQ[5] DDR_DQ[6] DDR_DQ[7] DDR_DQ[8] DDR_DQ[9] DDR_DQ[10] DDR_DQ[11] DDR_DQ[12] DDR_DQ[13] DDR_DQ[14] DDR_DQ[15] DDR_DQ[0-15] DDR_DQ[7] DDR_DQ[0] DDR_DQ[2] DDR_DQ[5] DDR_DQ[11] DDR_DQ[12] DDR_DQ[9] DDR_DQ[14] DDR_DQ[6] DDR_DQ[1] DDR_DQ[3] DDR_DQ[4] J2 G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9 URSA_A[3] M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 DDRB_A[0] DDRB_A[1] DDRB_A[2] DDRB_A[0-12] DDRB_A[3] DDRB_A[4] DDRB_A[5] DDRB_A[6] DDRB_A[7] DDRB_A[8] DDRB_A[9] DDRB_A[10] DDRB_A[11] DDRB_A[12] B_URSA_RASZ B_URSA_CASZ DDRB_A[11] L2 BA0 BA1 OPT R1001 B_URSA_BA0 B_URSA_BA1 R1004 150 22 DDRB_A[8] 22 URSA_MCLK 7:B3 7:G1 DDRB_A[10] DDRB_A[1] DDRB_A[3] DDRB_A[9] DDRB_A[12] DDRB_A[7] DDRB_A[5] DDRB_A[0] DDRB_A[2] DDRB_A[4] DDRB_A[6] AR1008 URSA_RASZ URSA_CASZ URSA_A[11] URSA_A[8] URSA_RASZ URSA_CASZ URSA_A[8] URSA_A[11] AR1007 22 AR1006 22 AR1005 22 URSA_A[10] URSA_A[1] URSA_A[3] URSA_A[9] URSA_A[12] URSA_A[7] URSA_A[5] URSA_A[0] URSA_A[2] URSA_A[4] URSA_A[6] URSA_A[9] URSA_A[1] URSA_A[10] AR1012 22 DDRA_A[3] DDRA_A[1] DDRA_A[10] DDRA_A[0-12] DDRA_A[9] DDRA_A[12] DDRA_A[7] DDRA_A[5] DDRA_A[2] DDRA_A[0] DDRA_A[1] DDRA_A[2] DDRA_A[3] DDRA_A[4] DDRA_A[5] DDRA_A[6] DDRA_A[7] DDRA_A[8] DDRA_A[9] DDRA_A[10] DDRA_A[11] A_URSA_RASZ A_URSA_CASZ DDRA_A[8] DDRA_A[11] R1013 A_URSA_BA0 A_URSA_BA1 22 R1024 OPT 150 BA0 BA1 L2 L3 DDRA_A[12] A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 URSA_A[12] AR1013 URSA_A[7] URSA_A[5] URSA_A[2] URSA_A[0] URSA_A[6] URSA_A[4] AR1011 22 AR1014 22 22 DDRA_A[0] DDRA_A[6] DDRA_A[4] +1.8V_FRC_DDR VDD5 VDD4 VDD3 VDD2 VDD1 A1 E1 J9 M9 R1 +1.8V_FRC_DDR A1 E1 J9 M9 R1 VDD5 VDD4 VDD3 VDD2 VDD1 L3 URSA_MCLK1 J8 K8 K2 CK CK CKE CK CK CKE J8 K8 K2 R1005 22 URSA_MCLKZ B_URSA_MCLKE 7:B3 T11 7:G1 URSA_MCLKZ1 U10 R1014 A_URSA_MCLKE 22 K9 VDDQ10 VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1 A9 C1 C3 C7 C9 E9 G1 G3 G7 G9 F3 B3 F7 B7 L8 K7 L7 K3 ODT CS RAS CAS WE R1006 22 URSA_ODT B_URSA_RASZ B_URSA_CASZ B_URSA_WEZ 7:B3;X15 R17 R17 T11 7:B3;Q15 X17 X17 U10 URSA_ODT A_URSA_RASZ A_URSA_CASZ A_URSA_WEZ R1015 22 ODT CS RAS CAS WE K9 L8 K7 L7 K3 A9 C1 C3 C7 C9 E9 G1 G3 G7 G9 VDDQ10 VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1 LDQS UDQS R1007 R1008 56 56 URSA_DQS2 URSA_DQS3 7:B4 7:B4 7:F1 7:F1 URSA_DQS0 URSA_DQS1 R1016 R1017 56 56 LDQS UDQS F7 B7 LDM UDM R1009 R1010 56 56 URSA_DQM2 URSA_DQM3 7:B4 7:B4 7:F1 7:F1 URSA_DQM0 URSA_DQM1 R1018 R1019 56 56 LDM UDM F3 B3 VSS5 VSS4 VSS3 A3 E3 J3 N1 P9 E8 A8 LDQS UDQS R1011 R1012 56 56 URSA_DQSB2 URSA_DQSB3 7:B4 7:B4 AR1009 B_URSA_BA0 B_URSA_BA1 7:F1 7:F1 URSA_DQSB0 URSA_DQSB1 R1020 R1021 56 56 LDQS UDQS E8 A8 A3 E3 J3 N1 P9 VSS5 VSS4 VSS3 VSS2 VSS1 12 11 10 9 8 7 6 VSS2 VSS1 L1 R3 R7 NC4 NC5 NC6 Q16 Q14 NC4 URSA_BA0 URSA_BA1 URSA_MCLKE URSA_WEZ 22 7:D1;T11 7:D1;T10 7:E1;T10 7:D1;T10 NC1 NC2 A_URSA_BA0 A_URSA_BA1 A_URSA_MCLKE A_URSA_WEZ AA17 AA17 Z16 X14 VSSDL +1.8V_FRC_DDR NC3 NC5 NC6 L1 R3 R7 B_URSA_MCLKE B_URSA_WEZ AR1010 VSSQ10 VSSQ9 VSSQ8 VSSQ7 VSSQ6 VSSQ5 VSSQ4 VSSQ3 VSSQ2 VSSQ1 B2 B8 A7 D2 D8 E7 F2 F8 H2 H8 A2 E2 R8 NC1 NC2 NC3 +1.8V_FRC_DDR 7:D1;U12 7:D1;U12 7:E1;U11 7:D1;U11 URSA_BA0 URSA_BA1 URSA_MCLKE URSA_WEZ A2 E2 R8 B2 B8 A7 D2 D8 E7 F2 F8 H2 VSSQ10 VSSQ9 VSSQ8 VSSQ7 VSSQ6 VSSQ5 VSSQ4 VSSQ3 VSSQ2 VSSQ1 J7 VSSDL 22 J7 J1 VDDL VDDL J1 H8 resonance Compensation 5 4 3 2 1 THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. +1.8V_MEMC +1.8V_FRC_DDR C1046 0.1uF 0.1uF C1047 C1048 0.1uF C1049 0.1uF C1050 0.1uF C1051 0.1uF C1052 0.1uF C1053 0.1uF BCM (BRAZIL VENUS) M-STAR FRC DDR 2009.03.23 HONG.Y.H 8 15 A B C D E F G H I J RESET D3.3V D3.3V R2003 0 POWER_DET 12:B3;12:I4 R409 910 R2025 0 Hot Plug input pin should be feeded over 5mA. BCM Recommend P100 D3.3V GIL-G-06-S3T2 OPT OPT R410 10K 1 J23 J24 H25 H24 G6 BCM_AVC_DEBUG_TX1 2 H23 J25 F26 H28 J26 G 4.7K R116 C400 10uF G5 BCM_AVC_DEBUG_TX2 4 H27 G26 J27 J28 F27 G5 BCM_AVC_DEBUG_RX2 6 R117 33 G24 H26 G27 G28 K23 G25 NAND_IO[0-7] D3.3V NAND_IO[0] NAND_IO[1] NAND_IO[2] 4.7K 4.7K 4.7K NAND_IO[3] NAND_IO[4] NAND_IO[5] R194 R193 R192 NAND_IO[6] NAND_IO[7] U24 T26 T27 U26 U27 V26 V27 V28 T24 R23 T23 T25 R24 U25 NAND_DATA0 NAND_DATA1 NAND_DATA2 NAND_DATA3 NAND_DATA4 NAND_DATA5 NAND_DATA6 NAND_DATA7 NAND_CS0B NAND_ALE NAND_REB NAND_CLE NAND_WEB NAND_RBB EBI_ADDR3 EBI_ADDR4 EBI_ADDR2 EBI_ADDR1 EBI_ADDR0 EBI_ADDR5 EBI_ADDR6 EBI_ADDR8 EBI_ADDR9 EBI_ADDR13 EBI_ADDR12 EBI_ADDR11 EBI_ADDR10 EBI_ADDR7 EBI_TAB EBI_WE1B EBI_CLK_IN EBI_CLK_OUT EBI_RWB EBI_CS0B GPIO_00 GPIO_01 GPIO_02 GPIO_03 GPIO_04 GPIO_05 GPIO_06 GPIO_07 GPIO_08 GPIO_09 GPIO_10 GPIO_11 GPIO_12 GPIO_13 GPIO_14 GPIO_15 GPIO_16 GPIO_17 GPIO_18 GPIO_19 GPIO_20 GPIO_21 GPIO_22 GPIO_23 GPIO_24 GPIO_25 GPIO_26 GPIO_27 GPIO_28 GPIO_29 GPIO_30 GPIO_31 GPIO_32 GPIO_33 GPIO_34 GPIO_35 GPIO_36 GAS5_6T W24 U23 V23 V24 SF_MISO SF_MOSI SF_SCK SF_CSB GPIO_37 GPIO_38 GPIO_39 GPIO_40 GPIO_41 GPIO_42 GPIO_43 GPIO_44 SCL2_3.3V I4;12:F3 GPIO_45 47 - 7T SMD Gasket GAS1-*1 MDS61887703 GAS1_7T GAS2-*1 GAS3-*1 MDS61887703 MDS61887703 GAS2_7T GAS3_7T GAS4-*1 GAS5-*1 MDS61887703 MDS61887703 GAS4_7T GAS5_7T GPIO_46 GPIO_47 GPIO_48 GPIO_49 GPIO_50 GPIO_51 GPIO_52 GPIO_53 GPIO_54 GPIO_55 GPIO_56 GPIO_57 SGPIO_00 SGPIO_01 SGPIO_02 SGPIO_03 N26 L26 N25 L25 K27 K28 K24 K26 K25 AA27 AA28 AA26 L1 L3 L2 Y25 Y26 M27 AA25 R25 N28 N27 AH18 P23 M23 AD19 AE19 M4 M5 L23 Y28 Y27 G2 G3 G5 G6 G4 L24 P25 L5 K4 K1 L27 M26 N23 R28 R27 R26 P28 P27 K6 K5 P26 M3 M2 M1 L4 L6 W27 W28 W26 W25 J2 J1 K3 K2 22 22 22 R2024 DDC_SCL R160 R102 HDMI_HPD_IN 4.7K R187 4.7K R184 4.7K R183 4.7K R180 4.7K R177 4.7K R176 4.7K R171 4.7K R170 SCL0_3.3V SDA0_3.3V SCL1_3.3V SDA1_3.3V SCL2_3.3V SDA2_3.3V SCL3_3.3V SDA3_3.3V COMP1_DET COMP2_DET 14:A6 14:A5 22 22 22 22 22 22 22 22 R186 R174 R175 R178 R179 R181 R182 R185 OPT OPT DDC_SDA I3;14:A6 I3;14:A6 D3.3V BCM_AVC_DEBUG_RX2 BCM_AVC_DEBUG_TX2 C6 C7 R103 100 0 R161 SF_SCK SF_MISO SF_MOSI SF_CSB 0 0 0 0 R198 R196 R197 R109 OPT OPT OPT OPT AV1_CVBS_DET BLUETOOTH_RESET FRC_RESET 14:A5 I3;14:I3 7:H2 R2018 OPT 100 R3030 OPT 100 BIT_SEL LVDS_SEL BCM_AVC_DEBUG_TX1 BCM_AVC_DEBUG_RX1 C7 C7 R105 22 0 R195 OPT 100 R2008 AUDIO_M_CLK A_DIM 3:C4 I3;4:A6 0 OPT R189 BCM_RX BCM_TX RF_SWITCH SIDE_CVBS_DET 14:A6 R2009 100 R199 R2001 R2002 OPT 22 22 22 OPT OPT TUNER_RESETb I3;14:A6 IC100 BCM3556 7 IC400 KIA7029AF I 1 2 3 O R408 330 RESET 10:I2;12:I5 SYS_RESETb 10:E4 G6 BCM_AVC_DEBUG_RX1 3 D3.3V 100 OPT R2005 100 R2004 AMP_RST VREG_CTRL PWM_DIM GAIN_SWITCH DSUB_DET I3;4:A5;7:I5 14:A6 5 6 NVRAM 4.7K D3.3V SMD Gasket Option 32/42/55 - 6T SMD Gasket GAS1 MDS61887702 GAS1_6T GAS2 MDS61887702 GAS2_6T GAS3 MDS61887702 GAS3_6T GAS4 MDS61887702 GAS4_6T GAS5 MDS61887702 C3 C2 C3 C2 C2 C3 NAND_CEb NAND_ALE NAND_REb NAND_CLE NAND_WEb NAND_RBb IC403 AT24C512BW-SH-T A0 VCC C416 0.1uF 4.7K R419 R422 1 8 5 R3016 4.7K A1 2 7 WP A2 3 6 SCL R411 22 R412 22 SDA2_3.3V I4;12:F3 GND 4 5 SDA 14:A6 14:A6 3:D3;2:AH5 3:D3;2:AH5 B5;12:F3 B5;12:F3 7:B6 7:B6 4 * NAND FLASH MEMORY 1Gbit (128M) SGPIO_04 SGPIO_05 SGPIO_06 SGPIO_07 Boot Strap D3.3V D3.3V D3.3V R2032 2.7K OPT 2.7K R314 R316 2.7K D3.3V D3.3V R2016 2.7K R2010 2.7K R2011 2.7K R2013 2.7K R2014 2.7K * I2C MAP NC_1 2.7K 2.7K NC_2 NC_3 NC_4 R2040 R191 NC_5 NC_6 NAND_RBb NAND_REb NAND_CEb C3024 4700pF C114 0.1uF Open Drain RB R E NC_7 NC_8 VDD_1 VSS_1 NC_9 NC_10 E5 NAND_CLE NAND_ALE E5 NAND_WEb D3.3V CL AL W WP NC_11 R136 4.7K NC_12 NC_13 C FLASH_WP_1 B Q101 KRC103S E NC_14 NC_15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 NC_29 NC_28 NC_27 NC_26 I/O7 I/O6 I/O5 I/O4 NC_25 NC_24 D3.3V C136 10uF 6.3V C115 0.1uF NAND_IO[0-7] NC_23 VDD_2 VSS_2 NC_22 NC_21 NC_20 I/O3 I/O2 I/O1 I/O0 NC_19 NC_18 NC_17 NC_16 NAND_IO[3] NAND_IO[2] NAND_IO[1] NAND_IO[0] NAND_IO[7] NAND_IO[0-7] R2015 2.7K NAND_IO[0] E3;E6 E3;E6 NAND_IO[3] R2029 2.7K NAND_IO[2] E3;E6 OPT 2.7K R317 * I2C_0 : TUNER * I2C_1 : Audio amp, HDMI S/W * I2C_2 : NVRAM,Micom G6;4:A6 G7;4:A5;7:I5 A_DIM PWM_DIM BLUETOOTH_RESET 3 G7;12:I4;3:C5 AMP_RST VREG_CTRL HDMI_HPD_IN * I2C_3 : FRC NAND_IO[6] NAND_IO[5] G7;14:A6 NAND_IO[4] E5 D3.3V R2033 2.7K D3.3V E6 E6 R321 2.7K OPT TUNER_RESETb R2031 2.7K 2 NAND_IO[0] : Flash Select (1) 0 : Boot From Serial Flash 1 : Boot From NAND Flash NAND_IO[1] : NAND Block 0 Write (DNS) 0 : Enable Block 0 Write 1 : Disable Block 0 Write NAND_IO[3:2] : NAND ECC (10) 00 : No ECC 01 : 1 ECC Bit 10 : 4 ECC Bit 11 : 8 ECC Bit NAND_IO[4] : CPU Endian (0) 0 : Little Endian 1 : Big Endian OPT R315 IF FUNDMENTAL IS USED => LOW IF DIP IS USED => HIGH 2.7K R2030 2.7K NAND_IO[4] E3;E6 NAND_IO[5] E3;E6 E3;E6 NAND_IO[6] E6 1 NAND_IO[6:5] : Xtal Bias Control (1, DNS) 00 : 1.2mA 01 : 1.8mA 10 : 2.4mA (Recommand) 11 : 3.0mA THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. BCM (BRAZIL VENUS) R131 2.7K IC101 NAND01GW3A2CN6E 2009.03.23 JANG.J.H BCM3556 & NAND FLASH 9 15 A B C D E IC100 BCM3556 D23 C24 B26 A25 B25 A26 PKT0_CLK PKT0_DATA PKT0_SYNC RMX0_CLK RMX0_DATA RMX0_SYNC LVDS_TX_0_DATA0_P LVDS_TX_0_DATA0_N LVDS_TX_0_DATA1_P LVDS_TX_0_DATA1_N LVDS_TX_0_DATA2_P LVDS_TX_0_DATA2_N LVDS_TX_0_DATA3_P G23 D25 D24 C25 E27 E26 D28 D27 D26 E23 E24 F25 C27 POD2CHIP_MCLKI POD2CHIP_MDI0 POD2CHIP_MDI1 POD2CHIP_MDI2 POD2CHIP_MDI3 POD2CHIP_MDI4 POD2CHIP_MDI5 POD2CHIP_MDI6 POD2CHIP_MDI7 POD2CHIP_MISTRT POD2CHIP_MIVAL CHIP2POD_MCLKO CHIP2POD_MDO0 CHIP2POD_MDO1 CHIP2POD_MDO2 CHIP2POD_MDO3 CHIP2POD_MDO4 CHIP2POD_MDO5 CHIP2POD_MDO6 CHIP2POD_MDO7 CHIP2POD_MOSTRT CHIP2POD_MOVAL 0 R236 R237 0 LVDS_TX_0_DATA3_N LVDS_TX_0_DATA4_P LVDS_TX_0_DATA4_N LVDS_TX_0_CLK_P LVDS_TX_0_CLK_N LVDS_TX_1_DATA0_P LVDS_TX_1_DATA0_N LVDS_TX_1_DATA1_P LVDS_TX_1_DATA1_N LVDS_TX_1_DATA2_P LVDS_TX_1_DATA2_N LVDS_TX_1_DATA3_P LVDS_TX_1_DATA3_N LVDS_TX_1_DATA4_P LVDS_TX_1_DATA4_N LVDS_TX_1_CLK_P LVDS_TX_1_CLK_N LVDS_PLL_VREG LVDS_TX_AVDDC1P2 LVDS_TX_AVDD2P5_1 LVDS_TX_AVDD2P5_2 LVDS_TX_AVSS_1 LVDS_TX_AVSS_2 LVDS_TX_AVSS_3 AC18 AF20 AG20 VDAC_AVDD2P5 VDAC_AVDD1P2 VDAC_AVDD3P3_1 VDAC_AVDD3P3_2 LVDS_TX_AVSS_4 LVDS_TX_AVSS_5 LVDS_TX_AVSS_6 LVDS_TX_AVSS_7 LVDS_TX_AVSS_8 LVDS_TX_AVSS_9 AF19 AD20 VDAC_AVSS_1 VDAC_AVSS_2 VDAC_AVSS_3 VDAC_RBIAS VDAC_1 VDAC_2 AH21 VDAC_VREG CLK54_AVDD1P2 CLK54_AVDD2P5 CLK54_AVSS CLK54_XTAL_N CLK54_XTAL_P CLK54_MONITOR PM_OVERRIDE BSC_S_SCL BSC_S_SDA VCXO_AGND_1 VCXO_AGND_2 USB_AVSS_1 USB_AVSS_2 USB_AVSS_3 USB_AVSS_4 USB_AVSS_5 USB_AVDD1P2 USB_AVDD1P2PLL USB_AVDD2P5 USB_AVDD2P5REF USB_AVDD3P3 USB_RREF USB_DM1 USB_DP1 USB_DM2 USB_DP2 USB_MONCDR USB_MONPLL USB_PWRFLT_1 USB_PWRFLT_2 USB_PWRON_1 USB_PWRON_2 EJTAG_TCK EJTAG_TDI EJTAG_TDO EJTAG_TMS EJTAG_TRSTB EJTAG_CE0 R218 240 P6 1K R219 P5 P3 P2 A1.2V A2.5V N3 N2 P1 P4 N4 N1 N5 P7 EPHY_VREF EPHY_RDAC EPHY_RDN EPHY_RDP EPHY_TDN EPHY_TDP EPHY_AVDD1P2 EPHY_AVDD2P5 EPHY_PLL_VDD1P2 EPHY_AGND_1 EPHY_AGND_2 EPHY_AGND_3 BYP_CPU_CLK BYP_DS_CLK BYP_SYS216_CLK BYP_SYS175_CLK AUDMX_LEFT1 AUDMX_RIGHT1 AUDMX_INCM1 AUDMX_LEFT2 AA24 Y24 AE24 AD25 1K 1K PLL_MAIN_AVDD1P2 PLL_MAIN_AGND PLL_MAIN_MIPS_EREF_TESTOUT PLL_RAP_AVD_TESTOUT PLL_RAP_AVD_AVDD1P2 PLL_RAP_AVD_AGND AB26 AC25 AB27 M6 N6 N7 C238 R240 390 OPT EJTAG_CE1 RESET_OUTB RESETB NMIB TMODE_0 TMODE_1 TMODE_2 TMODE_3 SPI_S_MISO POR_OTP_VDD2P5 POR_VDD1P2 H4 H3 H2 H1 G1 H6 H5 VCXO_AGND_3 VCXO_AVDD1P2 VCXO_PLL_AUDIO_TESTOUT AA23 AB24 AC24 AF25 AF24 C233 0.1uF AD27 AD28 AD26 AC26 AC27 AE25 Y23 LVDS_TX_AVSS_10 LVDS_TX_AVSS_11 B4 A4 C6 B6 B3 A3 A1 A2 D5 D6 C5 B5 B1 B2 C2 C3 D1 D2 E1 E2 E3 E4 D3 D4 F5 F1 F4 F2 C1 F3 C236 0.1uF C4 A5 E5 E6 D7 E7 F7 G7 H7 C228 10uF OPT F G H I 54MHz X-TAL J When usding FUNDMENTAl then series R = 0 ohm and CL = 8 pF When usding Dip-type X-tal then series R = 22 ohm and CL = 12 pF K TU_SCLK 1 LVDS_TX_1_DATA4_N LVDS_TX_1_DATA4_P LVDS_TX_1_DATA3_N LVDS_TX_1_DATA3_P LVDS_TX_1_DATA2_N LVDS_TX_1_DATA2_P LVDS_TX_1_DATA1_N LVDS_TX_1_DATA1_P LVDS_TX_1_DATA0_N LVDS_TX_1_DATA0_P LVDS_TX_1_CLK_N LVDS_TX_1_CLK_P LVDS_TX_0_DATA4_N LVDS_TX_0_DATA4_P LVDS_TX_0_DATA3_N LVDS_TX_0_DATA3_P LVDS_TX_0_DATA2_N LVDS_TX_0_DATA2_P LVDS_TX_0_DATA1_N LVDS_TX_0_DATA1_P LVDS_TX_0_DATA0_N LVDS_TX_0_DATA0_P LVDS_TX_0_CLK_N LVDS_TX_0_CLK_P 7:D7 7:D7 7:D7 7:D7 7:D7 7:D7 C3012 7:D7 7:D7 7:D7 7:D7 7:D7 7:D7 7:E7 7:E7 7:E7 7:E7 7:E7 7:E7 7:E7 7:E7 7:E7 7:E7 7:E7 7:E7 A1.2V A2.5V 22 R211 12pF C229 54MHz_XTAL_P R3027 604 54MHz_XTAL_N L8014 1008LS-272XJLC 33pF 22 R212 C230 12pF TU_SDATA TU_SYNC X903 54MHz 1 2 3 2 C26 B28 B27 A27 F24 F23 E25 A3.3V A1.2V A2.5V C28 A28 L202 BLM18PG121SN1D 4.7uF 0.1uF 0.1uF C214 C219 0.1uF AG21 C223 BROAD BAND STUDIO D3.3V C212 A1.2V A2.5V C218 0.1uF C3008 P200 TJC2508-4A JP200 C200 4.7uF R200 1.5K R241 0 OPT AH20 AG19 MNT OUT FOR BCM R201 1.5K C213 0.01uF 0.1uF 3 R220 : BCM recommened resistor 562 ohm C215 0.1uF R220 AE20 560AH22 C239 0.1uF C242 4.7uF C295 0.1uF C3005 4.7uF 54MHz_XTAL_N 54MHz_XTAL_P I2 I2 1 JP201 2 JP202 3 JP203 4 R242 0 OPT M25 M24 A1.2V L203 BLM18PG121SN1D C235 4.7uF D3.3V R6 T6 A3.3V A1.2V A2.5V R7 T7 T8 R3 U3 L200 BLM18PG121SN1D T4 T3 R4 U4 0.1uF 0.1uF 0.1uF 4.7uF 0.1uF P24 F6 N24 J5 J4 J6 J3 V25 AH3 AB8 D3.3V 4.7K R221 A2.5V L201 BLM18PG121SN1D C231 10uF C234 0.1uF A1.2V SYS_RESETb 9:B7 4 Route INCM between associated left and right signals of same channel The INCM trace ends at the same point where the connector ground connects to the board ground (thru-hole connector pin). Place test points, resistors near audio connector. Connect the other side of the resistor to GND as close as possible to the ground connection of the associated audio connector. C201 100pF R209 3.9K R210 120 USB_DM1 USB_DP1 USB_DM2 D3.3V C207 C202 C203 C209 C208 USB_DP2 V1 V2 U1 U2 T5 R5 R1 R2 T2 T1 R235 2.7K USB_OCD1 USB_CTL1 OPT R224 4.7K OPT R225 4.7K CONNECT NEAR BCM CHIP A1.2V L204 BLM18PG121SN1D R226 4.7K R227 4.7K INCM A1.2V L207 BLM18PG121SN1D 0.1uF C240 4.7uF 0.1uF 4.7uF C237 C241 C4001 0.1uF TU_CVBS_INCM 3:T25 5.1 R4009 0.15uF C4010 SIDE_INCM 3:T18 0.47uF C4014 5 C4002 R222 R223 0.1uF SIDE_CVBS_INCM 3:T19 5.1 AV1_INCM 3:T20 R4011 0.15uF C4011 0.47uF C4015 14:A5 14:A5 14:A5 14:A6 14:A6 14:A6 14:A5 14:A5 14:A5 14:A4 14:A4 14:A4 14:A3 14:A3 14:A3 AV1_L_IN AV1_R_IN AV1_INCM COMP1_L_IN COMP1_R_IN COMP1_INCM COMP2_L_IN COMP2_R_IN COMP2_INCM SIDE_L_IN SIDE_R_IN SIDE_INCM PC_L_IN PC_R_IN PC_INCM R204 R214 R215 R228 R229 R230 R231 R232 R233 R234 51 51 51 51 51 51 51 51 51 51 C206 C210 C211 C232 C220 C221 C224 C225 C226 C227 15nF 15nF 15nF 15nF 15nF 15nF 15nF 15nF 15nF 15nF AE6 AD7 AF6 AH4 AG5 AG4 AG6 AF7 AE7 AH5 AG7 AH6 AD8 AF8 AE8 AH7 AH8 AG8 AF5 AB9 AA10 47nF 47nF 47nF 47nF C3004 47nF C3007 47nF C3001 47nF C3002 47nF C3003 47nF 47nF AB10 AA11 C222 0.1uF AB11 AC8 AE5 C4003 0.1uF AV1_CVBS_INCM 3:T19 5.1 R4012 0.15uF C4008 R4000 34 R4004 34 AUDMX_RIGHT2 AUDMX_INCM2 AUDMX_LEFT3 AUDMX_RIGHT3 AUDMX_INCM3 AUDMX_LEFT4 AUDMX_RIGHT4 AUDMX_INCM4 AUDMX_LEFT5 AUDMX_RIGHT5 AUDMX_INCM5 AUDMX_LEFT6 R4006 34 COMP1_INCM 3:T24 C4016 0.47uF 6 C4004 0.1uF COMP1_VID_INCM 3:T23 5.1 R4010 0.15uF C4009 COMP2_INCM 3:T22 0.47uF C4013 C4005 R4001 34 R4005 34 0.1uF AUDMX_RIGHT6 AUDMX_INCM6 AUDMX_AVSS_1 AUDMX_AVSS_2 AUDMX_AVSS_3 AUDMX_AVSS_4 AUDMX_AVSS_5 AUDMX_AVSS_6 AUDMX_LDO_CAP AUDMX_AVDD2P5 COMP2_VID_INCM 3:T21 5.1 R4008 C4000 0.1uF R_VID_INCM 3:T15 0.15uF C4012 PC_INCM 3:T14 0.47uF C4017 C274 C277 C279 C296 C298 C4006 0.1uF G_VID_INCM 3:T15 B_VID_INCM 3:T15 C4007 R4002 34 R4003 34 R4007 34 0.1uF A2.5V 7 C217 10uF THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. BCM (BRAZIL VENUS) 2009.03.23 JANG.J.H BCM3556 AUD_IN/LVDS 10 15 A B C D E F G H I J 7 IC100 BCM3556 AG28 AH28 AA21 A2.5V A1.2V BLM18PG121SN1D L102 AB22 AF26 AF27 AF28 AG27 AE26 AE28 A1.2V C113 0.1uF L103 C116 4.7uF C144 0.1uF C122 4.7uF AE27 AD24 AB19 C119 0.1uF AB25 DS_AGCI_CTL DS_AGCT_CTL EDSAFE_AVSS_1 EDSAFE_AVSS_2 EDSAFE_AVSS_3 EDSAFE_AVSS_4 EDSAFE_AVSS_5 EDSAFE_AVDD2P5 EDSAFE_DVDD1P2 EDSAFE_IF_N EDSAFE_IF_P PLL_DS_AGND PLL_DS_AVDD1P2 PLL_DS_TESTOUT I2S_CLK_IN I2S_CLK_OUT I2S_DATA_IN I2S_DATA_OUT I2S_LR_IN I2S_LR_OUT AUD_LEFT0_N AUD_LEFT0_P AUD_AVDD2P5_0 AUD_AVSS_0_1 AUD_AVSS_0_2 AUD_AVSS_0_3 AUD_AVSS_0_4 AUD_AVSS_0_5 AUD_RIGHT0_N AB18 C111 0.1uF C112 0.1uF BLM18PG121SN1D L104 C120 1000pF BLM18PG121SN1D L105 C117 1000pF C123 0.01uF AC17 AB17 AD14 AD16 AB15 AC15 C118 0.01uF AD13 AE13 AC13 AB14 AC14 14:A4 14:A4 14:A4 14:A3 14:A3 14:A3 DSUB_R R_VID_INCM DSUB_G G_VID_INCM DSUB_B B_VID_INCM 75 10pF R118 75 C127 10pF R119 75 C102 C103 10pF C128 C129 C130 C131 C132 C133 C134 C135 OPT 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF AC12 AD12 AB13 AA14 AC11 AD11 AB12 14:A6 14:A5 14:A6 COMP1_Y_IN COMP1_Pr_IN R115 COMP1_Pb_IN OPT AD10 AC10 AE9 AF9 AH9 AG9 AG15 AE15 AF15 AH15 14:A5 14:A5 14:A5 COMP2_Y_IN COMP2_Pr_IN COMP2_Pb_IN R135 91 R138 91 AG16 AF16 AH17 AH16 AG14 R140 91 TP101 TP102 TP103 TP104 TP105 TP106 TP107 R142 91 TP108 TP109 TP110 TP111 TP112 C110 C124 C125 TP113 0.1uF 0.1uF 0.1uF OPT R143 91 OPT R141 75 OPT 14:A6 14:A5 14:A5 14:A6 14:A5 14:A5 TU_CVBS_IN AV1_CVBS_IN SIDE_CVBS_IN TU_CVBS_INCM AV1_CVBS_INCM SIDE_CVBS_INCM A2.5V A2.5V AE14 AF14 AH14 AH10 AG10 AE10 AE11 AF11 AH11 AH13 AE12 AF12 AD9 AG11 AG12 AF13 AC9 AF10 AH12 AG13 AF17 R137 10K R128 0 0.1uF C106 R4020 10K A1.2V L106 BLM18PG121SN1D R3055 240 R139 12K 12K R4021 C121 0.1uF C140 4.7uF AG17 AD15 AE16 AE17 AB16 AA15 AC16 AG3 120 R3056 C4020 0.1uF AF4 10pF SD_V5_AVDD1P2 SD_V5_AVDD2P5 SD_V5_AVSS SD_V1_AVDD1P2 SD_V1_AVDD2P5 SD_V1_AVSS_1 SD_V1_AVSS_2 SD_V2_AVDD1P2 SD_V2_AVDD2P5 SD_V2_AVSS_1 SD_V2_AVSS_2 SD_V2_AVSS_3 SD_V3_AVDD1P2 SD_V3_AVDD2P5 SD_V3_AVSS_1 SD_V3_AVSS_2 SD_V4_AVDD1P2 SD_V4_AVDD2P5 SD_V4_AVSS SD_R SD_INCM_R SD_G SD_INCM_G SD_B SD_INCM_B SD_Y1 SD_PR1 SD_PB1 SD_INCM_COMP1 SD_Y2 SD_PR2 SD_PB2 SD_INCM_COMP2 SD_Y3 SD_PR3 SD_PB3 SD_INCM_COMP3 SD_L1 SD_C1 SD_INCM_LC1 SD_L2 SD_C2 SD_INCM_LC2 SD_L3 SD_C3 SD_INCM_LC3 SD_CVBS1 SD_CVBS2 SD_CVBS3 SD_CVBS4 SD_INCM_CVBS1 HDMI_RX_1_CEC_DAT SD_INCM_CVBS2 HDMI_RX_1_HTPLG_IN SD_INCM_CVBS3 HDMI_RX_1_HTPLG_OUT AA3 V4 U6 V5 V3 W4 W2 W3 Y1 Y2 AA2 AA1 AB2 AB1 Y3 Y4 W5 W1 U5 W6 U7 V7 W7 U8 V8 Y5 V6 AA4 Y7 C159 1000pF C152 0.01uF C166 10uF C146 4.7uF C154 0.1uF C161 0.1uF BLM18PG121SN1D L108 BLM18PG121SN1D L110 A1.2V A2.5V A3.3V 499 R153 HDMI_RX_0_CEC_DAT HDMI_RX_0_HTPLG_IN HDMI_RX_0_HTPLG_OUT HDMI_RX_0_DDC_SCL HDMI_RX_0_DDC_SDA HDMI_RX_0_RESREF HDMI_RX_0_CLK_N HDMI_RX_0_CLK_P HDMI_RX_0_DATA0_N HDMI_RX_0_DATA0_P HDMI_RX_0_DATA1_N HDMI_RX_0_DATA1_P HDMI_RX_0_DATA2_N HDMI_RX_0_DATA2_P HDMI_RX_0_VDD3P3 HDMI_RX_0_VDD1P2 HDMI_RX_0_VDD2P5 HDMI_RX_0_AVSS_1 HDMI_RX_0_AVSS_2 HDMI_RX_0_AVSS_3 HDMI_RX_0_AVSS_4 HDMI_RX_0_AVSS_5 HDMI_RX_0_AVSS_6 HDMI_RX_0_PLL_AVSS HDMI_RX_0_PLL_DVSS R2037 OPT 10K 10K 10K 10K D3.3V HDMI_RX_0_PLL_DVDD1P2 AG1 AA6 AA5 AB3 Y6 AC4 AC1 AC2 AD1 AD2 AE1 AE2 AF1 AF2 AD3 AE3 AC3 AD4 AB5 AB6 AG2 AB4 AA7 Y8 AC5 W8 C158 1000pF C151 0.01uF C165 10uF C145 4.7uF C153 0.1uF C160 0.1uF BLM18PG121SN1D L107 499 R152 HDMI0_RXC-_BCM HDMI0_RXC+_BCM HDMI0_RX0-_BCM HDMI0_RX0+_BCM HDMI0_RX1-_BCM HDMI0_RX1+_BCM HDMI0_RX2-_BCM HDMI0_RX2+_BCM R188 10K 0 0 R157 R158 R2036 1K AUD_RIGHT0_P AUD_LEFT1_N AUD_LEFT1_P AUD_RIGHT1_N AUD_RIGHT1_P AUD_AVDD2P5_1 AUD_AVSS_1_1 AUD_AVSS_1_2 AUD_AVSS_1_3 AUD_LEFT2_N AUD_LEFT2_P AUD_RIGHT2_N AUD_RIGHT2_P AUD_AVDD2P5_2 AUD_AVSS_2_1 AUD_AVSS_2_2 AUD_SPDIF SPDIF_AVDD2P5 SPDIF_AVSS SPDIF_IN_N SPDIF_IN_P AE18 AF18 AD17 AH19 AD18 AG18 AG26 AH26 AF23 AA20 AB21 AC22 AC23 AD23 AH25 AG25 AH23 AG23 AG24 AH24 AE22 AB20 AC21 AE23 AF21 AE21 AF22 AG22 AD21 AC20 AD22 AH2 AC6 AE4 AF3 AH1 R2035 0 HDMI_HPD_IN_5MA C HDMI_HPD_IN_5MA HDMI_SCL HDMI_SDA 2:AA18 2:AB18 2:AB18 2:AB18 2:AC18 2:AC18 2:AC18 2:AD18 BLM18PG121SN1D L109 A1.2V A2.5V A3.3V Q906 ISA1530AC1 A2.5V E 2:AA19 2:AA19 C3006 0.1uF 16V B HDMI_HPD_IN 9:G4;9:I3 C150 0.1uF +5.0V OPT SPDIF_OUT14:A3 C149 0.01uF C157 0.1uF C164 10uF A2.5V 470 A2.5V 270 OPT R3041 R172 OPT R169 OPT 0 0 C148 0.01uF C156 0.1uF C163 10uF R167 OPT R166 OPT 0 R168 OPT 0 0 C147 0.01uF C155 0.1uF C162 10uF R165 OPT R164 OPT 0 R163 OPT 0 R162 OPT 0 BCM_I2S_DATA_OUT BCM_I2S_WORD_CLK 0 BCM_I2S_BIT_CLK 3:D3 3:D3 3:D3 A2.5V BLM18PG121SN1D 6 A1.2V A2.5V 5 14:A6 COMP1_VID_INCM R120 91 10pF R127 91 R129 91 C101 G5 C104 14:A5 COMP2_VID_INCM 4 C105 R146 SD_INCM_CVBS4 SD_SIF1 SD_INCM_SIF1 SD_FB SD_FS SD_FS2 HDMI_RX_1_DDC_SCL HDMI_RX_1_DDC_SDA HDMI_RX_1_RESREF HDMI_RX_1_CLK_N HDMI_RX_1_CLK_P 3 14:A6 TU_SIF HDMI_RX_1_DATA0_N HDMI_RX_1_DATA0_P PLL_VAFE_AVDD1P2 PLL_VAFE_AVSS HDMI_RX_1_DATA1_N HDMI_RX_1_DATA1_P PLL_VAFE_TESTOUT RGB_HSYNC HDMI_RX_1_DATA2_N RGB_VSYNC HDMI_RX_1_DATA2_P HDMI_RX_1_VDD3P3 HDMI_RX_1_VDD1P2 HDMI_RX_1_VDD2P5 HDMI_RX_1_AVSS_1 14:A3 CONNECT NEAR BCM CHIP 14:A3 RGB_HSYNC RGB_VSYNC HDMI_RX_1_AVSS_2 HDMI_RX_1_AVSS_3 HDMI_RX_1_AVSS_4 HDMI_RX_1_AVSS_5 HDMI_RX_1_AVSS_6 HDMI_RX_1_AVSS_7 HDMI_RX_1_AVSS_8 HDMI_RX_1_AVSS_9 HDMI_RX_1_PLL_AVSS HDMI_RX_1_PLL_DVDD1P2 2 HDMI_RX_1_PLL_DVSS 1 THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. R2038 R2039 R3042 BRAZIL VENUS 2009.03.23 JANG.J.H. BCM3556 VIDEO IN 11 15 A B C D E F G H I J 14:E7 14:E6 14:E5 UCOM_SCL_3.3V UCOM_SDA_3.3V LED_WARM_STBY LED_POWER_ON +3.3V_ST R435 : READY FO 1.2V BCM ENABLE ERROR_OUT 4:C5 7 14:E5 2:AD26 R454 R451 2K 2K 100 100 100 100 100 D3.3V OPT 4.7K 100 6 HDMI_CEC +3.3V_ST IC402 +3.3V_ST R489 33K R414 10K +3.3V_ST OPT R435 R464 R471 R470 R474 R440 R439 R442 R444 OPT +3.3V_ST 0 P1.4/DA3 P1.3/DA2 P1.2/DA1 P1.1/DA0 P1.0/ET2 KIA7029AF I O P4.2/AD2 R407 47K 0 R488 33K C B P5.0 P5.1 P5.2 1 2 3 C402 0.1uF 16V R401 1K G E C403 0.1uF 16V GND +3.3V_ST R430 100 P5.3 VDD C407 Q401 OPT OPT 2SC3875S(ALY) GND C410 0.1uF 16V C411 100uF 16V GND 44 43 42 41 40 39 38 37 36 35 5 OPT OPT R402 GND GND GND OPT 4.7K R427 HSYNC/P1.5 VSYNC/P1.6 P1.7/SOGI RST 34 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 IC406 MTV416GMF 33 32 31 30 29 28 27 26 25 24 23 P5.4 P5.5 P5.6 P5.7/CLKO2 P7.0/HBLANK P4.1/AD1 P7.1/VBLANK P7.2/HCLAMP P6.7 P6.6 P6.5 R450 OPT 100 R465 100 PANEL_CTL 4:H1 4:C5 4:C5 4:C7;14:E5 9:A7 M5V_ON R403 +3.3V_ST R466 OPT 100 R468 R467 R431 OPT 100 FLASH_WP_1 INV_ON/OFF 0 R416 0 22 100 RL_ON RESET R499 4.7K R406 GND 4.7K R494 4.7K R417 22 HSCL1/P3.0/RXD P4.3/AD3 HSDA1/P3.1/TXD P3.2/INT0 P3.3/INT1 ISDA/P3.4/T0 ISCL/P7.5 15K 9:G7;14:A4 DDC_SCL 9:G7;14:A4 14:A3;14:E6 14:H2 DDC_SDA IR R405 220 R420 R421 R423 OPT R424 R404 220 22 4.7K OPT R475 1K POWER_DET AMP_RST 9:C1 9:G7;9:I3;3:C5 UCOM_RX R449 100 OPT 22 22 +5.0V 4 14:I1 UCOM_TX R425 R460 HSDA2/P7.4 HSCL2/P7.3 P6.0/CLKO1 P4.0/AD0 VSS P6.1 P6.2 P6.3 P6.4 X2 X1 OPT R418 4.7K R428 C415 0.1uF 16V OPT R429 OPT OPT R461 68K C412 0.1uF 6.8K R472 4.7K EDID_WP C GND B Q402 RT1N141C-T112-1 E 14:A4 +3.3V_ST OPT R459 4.7K R447 4.7K OPT R452 47K R455 4.7K OPT GND POWER DETECT +5.0V +12V OPT R478 10K OPT R479 OPT B C 1K Q404 2SC3052 E E R480 2.2K OPT OPT B C Q405 2SC3052 OPT R481 0 +3.3V_ST +5V_ST +24V GND R462 100 KEY2 14:E6 R485 10K 9:A7;I4 POWER_DET R482 30K OPT IC405 R484 30K +3.3V_ST GND R456 100 KEY1 X401 24MHz R415 +3.3V_ST R413 22 22 1K R453 14:E6 100 22 R476 R441 R443 R445 R446 3 24LC16BT-I/SN R490 0 IC1003 NCP803SN293 RESET R487 100K OPT VCC OPT R486 0 R491 5.1K A2 3 6 SCL OPT A0 R432 47K 1 8 VCC C406 0.1uF WP 16V 15K R492 0 OPT R477 6.8K 0 0 OPT OPT A1 4.7K 2 1 GND 3 4.7K 2 7 READY FO 1.2V BCM ENABLE R434 4.7K R495 4.7K R496 R436 C408 22pF 50V C409 22pF 50V GND C413 0.1uF C414 0.1uF 16V GND SDA SDA2_3.3V SCL2_3.3V AMP_MUTE OPC_EN GND VSS 4 5 9:B5;9:I4 2 1 THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. 9:B5;9:I4 7:I5 R483 0 GND 3:E3 BCM (BRAZIL VENUS) 2009.03.23 LIM.K.R MICOM 12 15 A B C D E F G H I J 7 D1.2V C243 0.1uF C249 4.7uF C250 1000pF C251 0.01uF C252 0.1uF C253 10uF C254 10uF C286 33uF C287 33uF 6 D1.2V D1.2V IC100 BCM3556 IC100 BCM3556 H8 AD5 AD6 J7 K7 DVSS_1 DVSS_2 DVSS_3 DVSS_4 DVSS_5 DVSS_6 DVSS_7 DVSS_8 DVSS_9 DVSS_10 DVSS_11 DVSS_12 DVSS_13 DVSS_14 DVSS_15 DVSS_16 DVSS_17 DVSS_18 DVSS_19 DVSS_20 DVSS_21 DVSS_22 DVSS_23 DVSS_24 DVSS_25 DVSS_26 DVSS_27 DVSS_28 DVSS_29 DVSS_30 DVSS_31 DVSS_32 DVSS_33 DVSS_34 DVSS_35 DVSS_36 DVSS_37 DVSS_38 DVSS_39 DVSS_40 DVSS_41 DVSS_42 DVSS_43 DVSS_44 DVSS_45 DVSS_46 DVSS_47 DVSS_48 DVSS_49 DVSS_50 DVSS_51 DVSS_52 DVSS_53 DVSS_54 DVSS_55 DVSS_56 DVSS_57 DVSS_58 DVSS_59 DVSS_60 DVSS_61 DVSS_62 DVSS_63 DVSS_64 DVSS_65 DVSS_66 DVSS_67 DVSS_68 DVSS_69 DVSS_70 DVSS_71 DVSS_72 DVSS_73 DVSS_74 DVSS_75 DVSS_76 DVSS_77 DVSS_78 DVSS_79 DVSS_80 DVSS_81 DVSS_82 DVSS_83 DVSS_84 DVSS_85 DVSS_86 DVSS_87 DVSS_88 DVSS_89 DVSS_90 DVSS_91 DVSS_92 DVSS_93 DVSS_94 DVSS_95 DVSS_96 DVSS_97 DVSS_98 DVSS_99 DVSS_100 DVSS_101 DVSS_102 DVSS_103 DVSS_104 DVSS_105 DVSS_106 DVSS_107 DVSS_108 DVSS_109 DVSS_110 DVSS_111 DVSS_112 DVSS_113 DVSS_114 DVSS_115 DVSS_116 DVSS_117 P16 R16 T16 U16 V16 AA16 D17 L17 M17 N17 P17 R17 T17 U17 V17 AA17 AC19 G18 L18 M18 N18 P18 R18 T18 U18 V18 D20 G20 H20 A21 E21 F21 G21 E22 F22 G22 H22 J22 K22 L22 M22 N22 P22 R22 T22 U22 V22 W22 Y22 AA22 W23 AB23 F28 M28 T28 AC28 C244 1000pF C246 0.01uF C256 0.1uF C258 4.7uF C259 1000pF C262 0.01uF C265 0.1uF C266 4.7uF C288 1000pF C290 0.01uF J8 K8 L8 M8 N8 P8 R8 AA8 VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8 VDDC_9 VDDC_10 VDDC_11 VDDC_12 VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22 VDDC_23 VDDC_24 VDDC_25 VDDC_26 VDDC_27 VDDC_28 VDDC_29 VDDC_30 VDDC_31 VDDC_32 VDDC_33 L7 M7 AB7 AC7 G8 D9 AA9 G10 A11 L11 M11 N11 P11 R11 T11 U11 V11 D12 G12 L12 M12 N12 P12 R12 T12 U12 V12 L13 M13 N13 P13 R13 T13 U13 V13 D3.3V H9 H10 H11 H12 5 C245 4.7uF C255 1000pF C257 0.01uF C261 0.1uF C263 4.7uF C264 1000pF C267 0.01uF C289 0.1uF C291 10uF H13 H14 H15 H16 H17 H18 H19 D3.3V H21 J21 K21 L21 M21 C216 0.1uF C268 1000pF C269 0.01uF C270 0.1uF C271 4.7uF C292 1000pF C293 0.01uF C294 0.1uF N21 P21 R21 T21 A3.3V U21 V21 W21 R205 20 Y21 D1.8V 4 D3.3V C247 0.1uF C272 0.1uF C275 0.1uF C276 0.1uF C278 4.7uF C280 4.7uF C297 4.7uF C2004 33uF C2003 0.1uF AH27 AGC_VDDO G14 L14 M14 AA12 AA13 AA18 AA19 E28 L28 U28 AB28 VDDO_1 VDDO_2 VDDO_3 VDDO_4 VDDO_5 VDDO_6 VDDO_7 VDDO_8 D1.8V A9 G9 DDRV_1 DDRV_2 DDRV_3 DDRV_4 DDRV_5 DDRV_6 DDRV_7 DDRV_8 DDRV_9 N14 P14 R14 T14 U14 V14 L15 M15 N15 P15 R15 T15 U15 V15 A16 G16 L16 M16 N16 D1.8V C248 1000pF C281 1000pF C282 1000pF C283 1000pF C284 0.01uF C285 0.01uF C2005 0.01uF C2006 0.01uF G11 G13 A14 G15 3 D1.8V G17 A19 G19 C365 0.1uF 16V C364 0.1uF 16V C363 0.1uF 16V C357 10uF 10V C356 0.1uF 16V C348 0.1uF 16V C320 0.1uF 16V C319 0.1uF 16V C318 0.1uF 16V C304 0.1uF 16V 2 1 THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. BRAZIL DVR DV 2009.03.23 JANG.J.H BCM3549 POWER 13 15 A B C D E F G H I J 7 CONTROL IR & LED USB JACK & USB +5V Current Protection D3.3V BCM Tolerance +5V_ST MLB-201209-0120P-N2 +5.0V MLB-201209-0120P-N2 10:D4 10:D4 P701 12507WS-12L USB_POWER_OUT_2 IC701 MIC2009YM6-TR R718 2.7K R721 2.7K L709 USB_5VST L710 USB_+5V CDS3C05HDMI1 CDS3C05HDMI1 1 SCL UCOM_SCL_3.3V 12:F6 VOUT 6 1 VIN 2 SDA ILIMIT OPT C705 1000pF 50V OPT C707 1000pF 50V UCOM_SDA_3.3V 12:F6 FAULT/ R716 130 5 2 GND C716 0.1uF 16V 6 3 GND D701 D702 4 3 ENABLE USB_CTL1 10:D5 4 KEY1 KEY1 KEY2 L703 BG2012B080TF KEY2 5V_ST C704 0.1uF C706 0.1uF L704 BG2012B080TF L705 CB3216PA501E +5V_ST KJA-UB-4-0004 JK702 Make this trace minimum 12 mil L708 BLM18PG121SN1D 1 USB DOWN STREAM 12:H3 12:H3 R717 USB_OCD1 10:D4 47 USB_POWER_OUT_2 5 6 7 GND ZD701 WARM_ST R710 10K ZD703 C708 0.1uF +3.3V_ST R712 0 R711 0 LED_WARM_STBY R715 120K OPT OPT E 8 C 9 IR OPT 10 GND ZD702 C702 100pF L701 BG2012B080TF IR 12:D4;A3 C710 0.1uF 16V Q702 2SC3052 OPT B 2 USB_DM2 10:D4 C714 100uF C715 100uF 16V 3 USB_DP2 10:D4 +3.3V_ST R707 10K +3.3V_ST L702 CB3216PA501E C709 0.1uF 16V Q701 2SC3052 E 5 13 11 3.3V_ST 4 Not enough space D703 D704 CDS3C05GTA CDS3C05GTA 5.6V 5.6V OPT OPT 12 POWER_ON OPT 0 R708 B R709 4.7K OPT RL_ON 0 R714 LED_POWER_ON R713 0 C C701 0.1uF GND C703 1000pF 50V 4 CB3216PA501E C713 10uF 16V JP711 8 L706 MLB-201209-0120P-N2 D705 CDS3C05GTA 5.6V OPT R722 27 USB_DM1 5 RS232_SWITCHING Blue Tooth 11 D3.3V L707 JP712 R702 0 RS232_BYPASS 10 +5V_ST IC702 MC14053BDR2G 0ISTL00024A 9 3 R701 0 BCM_RX 9:G6 Y1 1 16 VDD 7 JP713 R723 27 D706 CDS3C05GTA 5.6V OPT USB_DP1 Y0 UCOM_RX 12:D4 Z1 2 15 Y A3 RS232C_RxD 16V RS232_BYPASS R705 0 RS232C_TxD A3 R703 0 C711 0.1uF C712 47uF 16V 6 3 14 X 5 JP715 R720 0 BLUETOOTH_RESET Z 4 13 X1 4 BCM_TX 9:G6 Z0 5 12 X0 UCOM_TX A R706 4.7K R_RS232_SWITCHING +5.0V 12:D4 3 JP716 R719 0 VREG_CTRL INH 2 6 11 VEE 7 10 B 1 R704 100K 12507WR-10L P702 VSS 8 9 C 2 1 THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. BRAZIL VENUS 2009.03.23 DO.J.G CONTROL IR/BT/USB 14 15 A B C D E F G H I J 7 TU_+5.0V D3.3V L5000 R5015 4.7K 0 C5005 2200pF 50V R5014 0 R5013 C5007 2200pF 50V C5012 L5005 GAIN_SWITCH LGIT OPT RF_SWITCH 1 2 3 4 LGIT 5 6 TU102 TDYR-H071F 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 CTR RF-GAIN_SW B0[+5V] VTU RF_AGC B1[+5V] NC_1 SIF VIDEO_OUT NC_2 NC_3 AIF R50000 7 LGIT 8 9 10 11 12 13 14 15 16 17 18 C5001 22pF 50V C5003 22pF 50V LGIT 19 R50010 LGIT R50020 LGIT 1 2 3 4 5 6 RF_SW GAIN_SW BB B1 AFT SIF VIDEO B2 B3 B4 RESET SDA SCL RSEORF SBYTE SPBVAL SRDT SRCK 16V 22uF C5000 LGIT C5002 0.1uF 50V LGIT C5005-*1 0.1uF 50V LGIT RF_SWITCH 3:T24 TU101 VA1G5BF8005 GAIN_SWITCH 3:T24 TU_+5.0V C5016 C5014 22uF 0.1uF Place close to Pin D2.5V 0.01uF 6 L5002 0 R5004 C5010 22uF C5011 0.1uF D3.3V L5004 C5015 22uF C5017 0.1uF D1.2V L5006 A1[RD] A2[GN] 330 B2[2.5V] B3[3.3V] B4[1.2V] C LD5000 SAM2333 R5025 RESET[SYRSTN] SDA SCL RSEORF SBYTE SPBVAL SRDT SRCK 22 22 22 R5005 R5006 R5007 TUNER_RESETb 3:T26 SDA0_3.3V SCL0_3.3V 3:T26 3:T26 C5018 22uF C5020 0.1uF SAM2333 LD5001 R5023 1K C A1[RD] A2[GN] D3.3V 22 R5008 0 TU_SYNC 3:T27 TU_+5.0V TU_SDATA TU_SCLK 3:T27 3:T27 L5007 5 24 22 23 22 22 R5012 R5009 R5010 R5020 12K SHIELD LGIT SHIELD SHARP R5024 470 R5022 0 OPT C5021 0.01uF TU_SIF E 2SA1530A-T112-1R Q5000 C 3:T25 C5019 0.01uF B R5021 10K 16V FI-C3216-103KJT R5018 56 R5019 56 OPT R5003 82 OPT 4 C5004 91pF 50V OPT L5001 OPT 10uF C5009 TU_CVBS_IN 3:T25 GND 3 +5V L5009 MLB-201209-0120P-N2 IC5001 KIA78R05F 6 R5026 100 C5031 0.1uF 16V OPT C5033 4.7uF 10V C5035 100uF 16V TU_+5.0V 1 VC VIN 2 VOUT 3 NC 4 GND1 5 L5010 MLB-201209-0120P-N2 D3.3V +12V IC5002 AS7809DTRE1 L5008 MLB-201209-0120P-N2 INPUT 1 2 GND C5022 0.1uF 16V C5023 100uF 16V C5024 0.1uF 50V C5025 100uF 16V C5026 0.33uF 16V C5027 0.1uF 50V C5028 47uF 16V C5029 0.1uF 50V C5030 0.01uF 50V 3 OUTPUT C5032 0.1uF 16V C5034 4.7uF 10V OPT C5036 100uF 16V 2 1 THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. GND2 BRAZIL VENUS 2009.03.23 DO.J.G TUNER 15 15 Block Diagram Overall Block Diagram for Brazil DTV (LH70) VA1G5BF8005 AV1 AV2 Component 1 Component 2 D-sub RGB Audio L/R (for RGB) JACK BACK at REAR HDMI 1 HDMI 2 HDMI 3 3x1 HDMI Switch Audio L/R Addr.[0:13], ctrl. data TU_SCLK, TU_SDATA, TU_SYNC TU_CVBS_IN TU_SIF SDA0/SCL0_3.3V LVDS RF_Switch, Gain_Switch DDR2(256Mbit) Qimonda/Hynix FRC IC (MST7323S) FRC Block X-tal 12MHz LCD Module (FHD, 120Hz) CVBS, L/R, AV_DET SIDE_CVBS, SIDE_L/R, SIDE_DET Y Pb Pr, L/R, DET Y Pb Pr, L/R, DET DDR_Data[0:15], DQS, DM … RGB/H/V DDR2 (1Gbit) Elpida/Hynix BCM3556 (Brazil) Data[16:31] DDR2 (1Gbit) Elpida/Hynix Data [0 … 7] CS ,RE,WE…… NAND Flash (512Mbit) Digital Audio (Optic) SPDIF RS-232C (Ctrl./SVC) Bluetooth Module USB Reset Switch RX/TX RX/TX MAX3232 DP1/DM1 DP2/DM2 +5V USB_DM1 USB_DP1 USB_DM2 USB_DP2 +5V SCL, SDA_3.3V I2S Digital AMP NTP3100L O.C. Protector Reset IC NVRAM MICOM (MTV416GMF) JTAG X-tal 24MHz SCL, SDA_3.3V Copyright ⓒ 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes X-tal 54MHz CLK,TDI,TDO,MS,RST LGE Internal Use Only Block Diagram I2C & RS232 Communication I2C & RS232 Communication Sub B/D 4.7k ohm D3.3V Main B/D D3.3V +3.3V_HDMI 4.7k ohm 4.7k ohm 2.7k ohm 4.7k ohm 22 ohm 22 ohm P 7 0 1 22 ohm 22 ohm SCL0 SDA0 SCL1 SDA1 22 ohm 22 ohm 2.7k ohm 0 ohm 0 ohm 4.7k ohm +5V_ST BCM3556 SCL3 P 7 0 2 SDA3 100 ohm 100 ohm 22 ohm 22 ohm 4.7k ohm 4.7k ohm 4.7k ohm MAX3232 RS232C_TxD 4.7k ohm SCL2 SDA2 22 ohm 22 ohm 4.7k ohm VA1G5BF8005 HDMI S/W 47PF 47PF 100 ohm 100 ohm NTP3100L 33PF D3.3V 33PF 22 ohm 22 ohm MICOM RS232C_RxD D3.3V 100 ohm 100 ohm MST7323 Copyright ⓒ 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes LGE Internal Use Only Block Diagram • I2C channel [LH70] CH0 (+3.3V) TUNER 1 TUNER 1 0xC2 0xC2 Demod(0x30) Demod(0x30) QPSK(0x32) QPSK(0x32) CH0 CH1 AMP AMP NTP3100L NTP3100L 0x54 0x54 BCM3556 BCM3556 HDMI SW HDMI SW TDA9996 TDA9996 CH1 (+ 3.3V) CH2 EEPROM EEPROM AT24C512 AT24C512 0xA6 0xA6 Micom Micom MTV416 MTV416 0x50 0x50 CH2 (+3.3V) CH3 FRC FRC MST7323 MST7323 CH3 (+3.3V) Copyright ⓒ 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes LGE Internal Use Only Block Diagram D1.2V, D2.5V, +3.3V, +5.0V_ST SPDIF , EDID_WP …. SCL0_3.3V, SDA0_3.3V, DDC_SCL, DDC_SDA Jack Board MAIN Board CVBS, SIF, AV, RGB ,COMPONENT, R/L, TU_SCLK, TU_DATA, TU_SYNK’’.. < Signal Interface > Copyright ⓒ 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes LGE Internal Use Only 1. Power-Up Boot Fail Trouble Shooting Overall Block Diagram for Brazil DTV (LH70) VA1G5BF8005 AV1 AV2 Component 1 Component 2 D-sub RGB Audio L/R (for RGB) JACK BACK at REAR HDMI 1 HDMI 2 HDMI 3 3x1 HDMI Switch Audio L/R Addr.[0:13], ctrl. data TU_SCLK, TU_SDATA, TU_SYNC TU_CVBS_IN TU_SIF SDA0/SCL0_3.3V LVDS RF_Switch, Gain_Switch DDR2(256Mbit) Qimonda/Hynix FRC IC (MST7323S) FRC Block X-tal 12MHz LCD Module (FHD, 120Hz) CVBS, L/R, AV_DET SIDE_CVBS, SIDE_L/R, SIDE_DET Y Pb Pr, L/R, DET Y Pb Pr, L/R, DET DDR_Data[0:15], DQS, DM … RGB/H/V DDR2 (1Gbit) Elpida/Hynix BCM3556 (Brazil) Data[16:31] DDR2 (1Gbit) Elpida/Hynix Data [0 … 7] CS ,RE,WE…… NAND Flash (512Mbit) Digital Audio (Optic) SPDIF RS-232C (Ctrl./SVC) Bluetooth Module USB Reset Switch RX/TX RX/TX MAX3232 DP1/DM1 DP2/DM2 +5V USB_DM1 USB_DP1 USB_DM2 USB_DP2 +5V SCL, SDA_3.3V I2S Digital AMP NTP3100L O.C. Protector Reset IC NVRAM MICOM (MTV416GMF) JTAG X-tal 24MHz SCL, SDA_3.3V Copyright ⓒ 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes X-tal 54MHz CLK,TDI,TDO,MS,RST LGE Internal Use Only 1. Power-Up Boot Fail Trouble Shooting Check P801 All Voltage Level (24V, 12V, 5V_ST) Y Check All Voltage Level at L805/L807/L808 Y Check Voltage Level 3.3V at L830 Y Check Voltage Level 2.5V at L827 Y Check Voltage Level 1.8V at IC802 #2 pin or L815 Y Check Voltage Level 1.2V at L821 Y Check X903 Clock 54MHz Y Check signal transition at IC101 #9 pin Y Replace IC101 Flash Memory N Maybe BCM3556 has troubles N Replace X903 N Replace one of IC804/Q809/L811/L817/L821 & Recheck N N Replace one of IC802/IC805/L815 & Recheck N N Replace one of IC803/L824/L827 & Recheck N N Replace one of IC809/Q812/L828/L829/L830/L822 & Recheck N N Replace one of L805/L807/L808 & Recheck N Check Power connector Y Replace Power board Check Micom IC406 Redownload or replace Copyright ⓒ 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes LGE Internal Use Only 2. No OSD Trouble Shooting Overall Block Diagram for Brazil DTV (LH70) VA1G5BF8005 AV1 AV2 Component 1 Component 2 D-sub RGB Audio L/R (for RGB) JACK BACK at REAR HDMI 1 HDMI 2 HDMI 3 3x1 HDMI Switch Audio L/R Addr.[0:13], ctrl. data TU_SCLK, TU_SDATA, TU_SYNC TU_CVBS_IN TU_SIF SDA0/SCL0_3.3V LVDS RF_Switch, Gain_Switch DDR2(256Mbit) Qimonda/Hynix FRC IC (MST7323S) FRC Block X-tal 12MHz LCD Module (FHD, 120Hz) CVBS, L/R, AV_DET SIDE_CVBS, SIDE_L/R, SIDE_DET Y Pb Pr, L/R, DET Y Pb Pr, L/R, DET DDR_Data[0:15], DQS, DM … RGB/H/V DDR2 (1Gbit) Elpida/Hynix BCM3556 (Brazil) Data[16:31] DDR2 (1Gbit) Elpida/Hynix Data [0 … 7] CS ,RE,WE…… NAND Flash (512Mbit) Digital Audio (Optic) SPDIF RS-232C (Ctrl./SVC) Bluetooth Module USB Reset Switch RX/TX RX/TX MAX3232 DP1/DM1 DP2/DM2 +5V USB_DM1 USB_DP1 USB_DM2 USB_DP2 +5V SCL, SDA_3.3V I2S Digital AMP NTP3100L O.C. Protector Reset IC NVRAM MICOM (MTV416GMF) JTAG X-tal 24MHz SCL, SDA_3.3V Copyright ⓒ 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes X-tal 54MHz CLK,TDI,TDO,MS,RST LGE Internal Use Only 2. No OSD Trouble Shooting Check 12V Voltage Level at P801 #13 Pin Y Check 12V Voltage Level at L801 Y Check 12V Voltage Level at L909 Y Check Voltage Level 2.5V at L827 Y Check Voltage Level 1.8V at IC802 #2 pin or L815 Y Check Voltage Level 1.26V at IC807 #6 pin Y Check P903 #16(TXAC-), #17(TXAC+), #32(TXBC-), #33(TXBC+) Y Check LVDS Cable Y Check Voltage LCD Module N Replace Cable N Maybe BCM3556(IC100) or 7329A(IC901) has troubles N Replace IC807 & Recheck N Replace one of IC802/IC805/L815 & Recheck N Replace one of IC803/L824/L827 & Recheck N Replace one of Q802/Q803/Q804/L801 & Recheck N Replace one of L801/Q804 & Recheck N Check Power connector Y Replace Power board Copyright ⓒ 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes LGE Internal Use Only 3. Digital TV Video Trouble Shooting Overall Block Diagram for Brazil DTV (LH70) VA1G5BF8005 AV1 AV2 Component 1 Component 2 D-sub RGB Audio L/R (for RGB) JACK BACK at REAR HDMI 1 HDMI 2 HDMI 3 3x1 HDMI Switch Audio L/R Addr.[0:13], ctrl. data TU_SCLK, TU_SDATA, TU_SYNC TU_CVBS_IN TU_SIF SDA0/SCL0_3.3V LVDS RF_Switch, Gain_Switch DDR2(256Mbit) Qimonda/Hynix FRC IC (MST7323S) FRC Block X-tal 12MHz LCD Module (FHD, 120Hz) CVBS, L/R, AV_DET SIDE_CVBS, SIDE_L/R, SIDE_DET Y Pb Pr, L/R, DET Y Pb Pr, L/R, DET DDR_Data[0:15], DQS, DM … RGB/H/V DDR2 (1Gbit) Elpida/Hynix BCM3556 (Brazil) Data[16:31] DDR2 (1Gbit) Elpida/Hynix Data [0 … 7] CS ,RE,WE…… NAND Flash (512Mbit) Digital Audio (Optic) SPDIF RS-232C (Ctrl./SVC) Bluetooth Module USB Reset Switch RX/TX RX/TX MAX3232 DP1/DM1 DP2/DM2 +5V USB_DM1 USB_DP1 USB_DM2 USB_DP2 +5V SCL, SDA_3.3V I2S Digital AMP NTP3100L O.C. Protector Reset IC NVRAM MICOM (MTV416GMF) JTAG X-tal 24MHz SCL, SDA_3.3V Copyright ⓒ 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes X-tal 54MHz CLK,TDI,TDO,MS,RST LGE Internal Use Only 3. Digital TV Video Trouble Shooting Check RF Cable Y Check Tuner(TU101) Power (5.0V, 2.5V, 3.3V, 1.2V) Y Check TP Clock, Data, Sync R107, R108, R109 Y Check cable between P203 at Jack Board and P701 at Main Baord Y Maybe BCM3556(IC100) has problems N Maybe Cable Pin has problems N Maybe Tuner(TU101) has problems N Replace one of IC101, IC102 at Jack Board or IC803/ IQ812/ C804/ Q809/+5V_ST and +12V of P801 at Main Board& Recheck Copyright ⓒ 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes LGE Internal Use Only 4. Analog TV Video Trouble Shooting Overall Block Diagram for Brazil DTV (LH70) VA1G5BF8005 AV1 AV2 Component 1 Component 2 D-sub RGB Audio L/R (for RGB) JACK BACK at REAR HDMI 1 HDMI 2 HDMI 3 3x1 HDMI Switch Audio L/R Addr.[0:13], ctrl. data TU_SCLK, TU_SDATA, TU_SYNC TU_CVBS_IN TU_SIF SDA0/SCL0_3.3V LVDS RF_Switch, Gain_Switch DDR2(256Mbit) Qimonda/Hynix FRC IC (MST7323S) FRC Block X-tal 12MHz LCD Module (FHD, 120Hz) CVBS, L/R, AV_DET SIDE_CVBS, SIDE_L/R, SIDE_DET Y Pb Pr, L/R, DET Y Pb Pr, L/R, DET DDR_Data[0:15], DQS, DM … RGB/H/V DDR2 (1Gbit) Elpida/Hynix BCM3556 (Brazil) Data[16:31] DDR2 (1Gbit) Elpida/Hynix Data [0 … 7] CS ,RE,WE…… NAND Flash (512Mbit) Digital Audio (Optic) SPDIF RS-232C (Ctrl./SVC) Bluetooth Module USB Reset Switch RX/TX RX/TX MAX3232 DP1/DM1 DP2/DM2 +5V USB_DM1 USB_DP1 USB_DM2 USB_DP2 +5V SCL, SDA_3.3V I2S Digital AMP NTP3100L O.C. Protector Reset IC NVRAM MICOM (MTV416GMF) JTAG X-tal 24MHz SCL, SDA_3.3V Copyright ⓒ 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes X-tal 54MHz CLK,TDI,TDO,MS,RST LGE Internal Use Only 4. Analog TV Video Trouble Shooting Check RF Cable Y Check Tuner(TU101) Power (5.0V, 2.5V, 3.3V, 1.2V) Y Check CVBS Signal TU101 #7 Pin and R118 Y Check cable between P203 at Jack Board and P701 at Main Baord Y Check CVBS Signal R703 and C110 at Main Baord Y Maybe BCM3556(IC100) has problems N Replace one of R703 and C110 & Recheck N Maybe Cable Pin has problems N Maybe Tuner(TU101) has problems N Replace one of IC101, IC102 at Jack Board or IC803/ Q812/ IC804/ IC809/Q809/+5V_ST and +12V of P801 at Main Board& Recheck Copyright ⓒ 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes LGE Internal Use Only 5. Component Video Trouble Shooting Overall Block Diagram for Brazil DTV (LH70) ) ( VA1G5BF8005 AV1 AV2 Component 1 Component 2 D-sub RGB Audio L/R (for RGB) JACK BACK at REAR HDMI 1 HDMI 2 HDMI 3 3x1 HDMI Switch Audio L/R Addr.[0:13], ctrl. data TU_SCLK, TU_SDATA, TU_SYNC TU_CVBS_IN TU_SIF SDA0/SCL0_3.3V LVDS RF_Switch, Gain_Switch DDR2(256Mbit) Qimonda/Hynix FRC IC (MST7323S) FRC Block X-tal 12MHz LCD Module (FHD, 120Hz) CVBS, L/R, AV_DET SIDE_CVBS, SIDE_L/R, SIDE_DET Y Pb Pr, L/R, DET Y Pb Pr, L/R, DET DDR_Data[0:15], DQS, DM … RGB/H/V DDR2 (1Gbit) Elpida/Hynix BCM3556 (Brazil) Data[16:31] DDR2 (1Gbit) Elpida/Hynix Data [0 … 7] CS ,RE,WE…… NAND Flash (512Mbit) Digital Audio (Optic) SPDIF RS-232C (Ctrl./SVC) Bluetooth Module USB Reset Switch RX/TX RX/TX MAX3232 DP1/DM1 DP2/DM2 +5V USB_DM1 USB_DP1 USB_DM2 USB_DP2 +5V SCL, SDA_3.3V I2S Digital AMP NTP3100L O.C. Protector Reset IC NVRAM MICOM (MTV416GMF) JTAG X-tal 24MHz SCL, SDA_3.3V Copyright ⓒ 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes X-tal 54MHz CLK,TDI,TDO,MS,RST LGE Internal Use Only 5. Component Video Trouble Shooting Check Signal Format Is it supported signal? Y Check Component Cable Y Check Component Jack JK209 at Jack Board Y Check Component Signal R292, R293, R294 R295, R296, R297 at Jack Board Y Check cable between P203 at Jack Board and P701 at Main Baord Y Check Component Signal C130, C131, C132 C133, C134. C135 Y Maybe BCM3556(IC100) has problems N Replace it N Maybe Cable Pin has problems N Replace one of R292, R293, R294, R295, R296, R297 L212, L213, L214, L215, L216, L217 & Recheck N Replace Jack at Jack board Copyright ⓒ 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes LGE Internal Use Only 6. RGB Video Trouble Shooting Overall Block Diagram for Brazil DTV (LH70) VA1G5BF8005 AV1 AV2 Component 1 Component 2 D-sub RGB Audio L/R (for RGB) JACK BACK at REAR HDMI 1 HDMI 2 HDMI 3 3x1 HDMI Switch Audio L/R Addr.[0:13], ctrl. data TU_SCLK, TU_SDATA, TU_SYNC TU_CVBS_IN TU_SIF SDA0/SCL0_3.3V LVDS RF_Switch, Gain_Switch DDR2(256Mbit) Qimonda/Hynix FRC IC (MST7323S) FRC Block X-tal 12MHz LCD Module (FHD, 120Hz) CVBS, L/R, AV_DET SIDE_CVBS, SIDE_L/R, SIDE_DET Y Pb Pr, L/R, DET Y Pb Pr, L/R, DET DDR_Data[0:15], DQS, DM … RGB/H/V DDR2 (1Gbit) Elpida/Hynix BCM3556 (Brazil) Data[16:31] DDR2 (1Gbit) Elpida/Hynix Data [0 … 7] CS ,RE,WE…… NAND Flash (512Mbit) Digital Audio (Optic) SPDIF RS-232C (Ctrl./SVC) Bluetooth Module USB Reset Switch RX/TX RX/TX MAX3232 DP1/DM1 DP2/DM2 +5V USB_DM1 USB_DP1 USB_DM2 USB_DP2 +5V SCL, SDA_3.3V I2S Digital AMP NTP3100L O.C. Protector Reset IC NVRAM MICOM (MTV416GMF) JTAG X-tal 24MHz SCL, SDA_3.3V Copyright ⓒ 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes X-tal 54MHz CLK,TDI,TDO,MS,RST LGE Internal Use Only 6. RGB Video Trouble Shooting Check Signal Format Is it supported signal? Y Check RGB Cable Y Check RGB Jack JK208 at Jack Board Y Check RGB Signal L207, L208, L209 at Jack Board Y Check cable between P203 at Jack Board and P701 at Main Board Y Check RGB Signal C127, C128, C129 at Main Board Y Maybe BCM3556(IC100) has problems N Replace it N Maybe Cable Pin has problems N Replace one of L207, L208, L209 at Jack Board & Recheck N Replace JK208 at Jack board Copyright ⓒ 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes LGE Internal Use Only 7. AV Video Trouble Shooting Overall Block Diagram for Brazil DTV (LH70) VA1G5BF8005 AV1 AV2 Component 1 Component 2 D-sub RGB Audio L/R (for RGB) JACK BACK at REAR HDMI 1 HDMI 2 HDMI 3 3x1 HDMI Switch Audio L/R Addr.[0:13], ctrl. data TU_SCLK, TU_SDATA, TU_SYNC TU_CVBS_IN TU_SIF SDA0/SCL0_3.3V LVDS RF_Switch, Gain_Switch DDR2(256Mbit) Qimonda/Hynix FRC IC (MST7323S) FRC Block X-tal 12MHz LCD Module (FHD, 120Hz) CVBS, L/R, AV_DET SIDE_CVBS, SIDE_L/R, SIDE_DET Y Pb Pr, L/R, DET Y Pb Pr, L/R, DET DDR_Data[0:15], DQS, DM … RGB/H/V DDR2 (1Gbit) Elpida/Hynix BCM3556 (Brazil) Data[16:31] DDR2 (1Gbit) Elpida/Hynix Data [0 … 7] CS ,RE,WE…… NAND Flash (512Mbit) Digital Audio (Optic) SPDIF RS-232C (Ctrl./SVC) Bluetooth Module USB Reset Switch RX/TX RX/TX MAX3232 DP1/DM1 DP2/DM2 +5V USB_DM1 USB_DP1 USB_DM2 USB_DP2 +5V SCL, SDA_3.3V I2S Digital AMP NTP3100L O.C. Protector Reset IC NVRAM MICOM (MTV416GMF) JTAG X-tal 24MHz SCL, SDA_3.3V Copyright ⓒ 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes X-tal 54MHz CLK,TDI,TDO,MS,RST LGE Internal Use Only 7. AV Video Trouble Shooting Check Signal Format Is it supported signal? Y Check AV Cable Y Check AV Jack JK209 at Jack Board Y Check AV Signal R203, R204, R214, R215 at Jack Board Y Check cable between P203 at Jack Board and P701 at Main Board Y Check AV Signal C124, C125 at Main Board Y Maybe BCM3556(IC100) has problems N Replace it N Maybe Cable Pin has problems N Replace one of R203, R204, R214, R215 at Jack Board & Recheck N Replace JK209 at Jack board Copyright ⓒ 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes LGE Internal Use Only 8. HDMI Video Trouble Shooting Overall Block Diagram for Brazil DTV (LH70) VA1G5BF8005 AV1 AV2 Component 1 Component 2 D-sub RGB Audio L/R (for RGB) JACK BACK at REAR HDMI 1 HDMI 2 HDMI 3 3x1 HDMI Switch Audio L/R Addr.[0:13], ctrl. data TU_SCLK, TU_SDATA, TU_SYNC TU_CVBS_IN TU_SIF SDA0/SCL0_3.3V LVDS RF_Switch, Gain_Switch DDR2(256Mbit) Qimonda/Hynix FRC IC (MST7323S) FRC Block X-tal 12MHz LCD Module (FHD, 120Hz) CVBS, L/R, AV_DET SIDE_CVBS, SIDE_L/R, SIDE_DET Y Pb Pr, L/R, DET Y Pb Pr, L/R, DET DDR_Data[0:15], DQS, DM … RGB/H/V DDR2 (1Gbit) Elpida/Hynix BCM3556 (Brazil) Data[16:31] DDR2 (1Gbit) Elpida/Hynix Data [0 … 7] CS ,RE,WE…… NAND Flash (512Mbit) Digital Audio (Optic) SPDIF RS-232C (Ctrl./SVC) Bluetooth Module USB Reset Switch RX/TX RX/TX MAX3232 DP1/DM1 DP2/DM2 +5V USB_DM1 USB_DP1 USB_DM2 USB_DP2 +5V SCL, SDA_3.3V I2S Digital AMP NTP3100L O.C. Protector Reset IC NVRAM MICOM (MTV416GMF) JTAG X-tal 24MHz SCL, SDA_3.3V Copyright ⓒ 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes X-tal 54MHz CLK,TDI,TDO,MS,RST LGE Internal Use Only 8. HDMI Video Trouble Shooting Check Signal Format Is it supported signal? Y Check HDMI Cable Y Check HDMI Jack JK600, JK601, JK602 Y Check IC601 Voltage Level +1.8V_HDMI, +5.0V_HDMI Y Check I2C Signal R624/R625/R157/R158 Y Maybe BCM3556(IC100) has problems N Replace It & Recheck N Replace one of L601/L602/R619/R615 N Replace Jack Copyright ⓒ 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes LGE Internal Use Only 9. All Source Audio Trouble Shooting Overall Block Diagram for Brazil DTV (LH70) VA1G5BF8005 AV1 AV2 Component 1 Component 2 D-sub RGB Audio L/R (for RGB) JACK BACK at REAR HDMI 1 HDMI 2 HDMI 3 3x1 HDMI Switch Audio L/R Addr.[0:13], ctrl. data TU_SCLK, TU_SDATA, TU_SYNC TU_CVBS_IN TU_SIF SDA0/SCL0_3.3V LVDS RF_Switch, Gain_Switch DDR2(256Mbit) Qimonda/Hynix FRC IC (MST7323S) FRC Block X-tal 12MHz LCD Module (FHD, 120Hz) CVBS, L/R, AV_DET SIDE_CVBS, SIDE_L/R, SIDE_DET Y Pb Pr, L/R, DET Y Pb Pr, L/R, DET DDR_Data[0:15], DQS, DM … RGB/H/V DDR2 (1Gbit) Elpida/Hynix BCM3556 (Brazil) Data[16:31] DDR2 (1Gbit) Elpida/Hynix Data [0 … 7] CS ,RE,WE…… NAND Flash (512Mbit) Digital Audio (Optic) SPDIF RS-232C (Ctrl./SVC) Bluetooth Module USB Reset Switch RX/TX RX/TX MAX3232 DP1/DM1 DP2/DM2 +5V USB_DM1 USB_DP1 USB_DM2 USB_DP2 +5V SCL, SDA_3.3V I2S Digital AMP NTP3100L O.C. Protector Reset IC NVRAM MICOM (MTV416GMF) JTAG X-tal 24MHz SCL, SDA_3.3V Copyright ⓒ 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes X-tal 54MHz CLK,TDI,TDO,MS,RST LGE Internal Use Only 9. All Source Audio Trouble Shooting Make sure you can’t hear any audio Y Check Speaker Y Check Connector P501 Y Check Signal L504, L505 Y Check IC501 Power 24V, 3.3V, 1.8V L511, L503, L501 Y Check BCM3556 I2S Output R505, R506, R507 Y Maybe BCM3556(IC100) has problems N N N Replace It & Recheck N Replace one of L511L503/L501 and IC503 & Recheck N Maybe NTP3100 has problems. Replace It N Replace one of L508/L509/L510/L507/L504/L505 & Recheck N N Replace Connector N Replace Speaker Copyright ⓒ 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes LGE Internal Use Only 10. Digital TV Audio Trouble Shooting Overall Block Diagram for Brazil DTV (LH70) VA1G5BF8005 AV1 AV2 Component 1 Component 2 D-sub RGB Audio L/R (for RGB) JACK BACK at REAR HDMI 1 HDMI 2 HDMI 3 3x1 HDMI Switch Audio L/R Addr.[0:13], ctrl. data TU_SCLK, TU_SDATA, TU_SYNC TU_CVBS_IN TU_SIF SDA0/SCL0_3.3V LVDS RF_Switch, Gain_Switch DDR2(256Mbit) Qimonda/Hynix FRC IC (MST7323S) FRC Block X-tal 12MHz LCD Module (FHD, 120Hz) CVBS, L/R, AV_DET SIDE_CVBS, SIDE_L/R, SIDE_DET Y Pb Pr, L/R, DET Y Pb Pr, L/R, DET DDR_Data[0:15], DQS, DM … RGB/H/V DDR2 (1Gbit) Elpida/Hynix BCM3556 (Brazil) Data[16:31] DDR2 (1Gbit) Elpida/Hynix Data [0 … 7] CS ,RE,WE…… NAND Flash (512Mbit) Digital Audio (Optic) SPDIF RS-232C (Ctrl./SVC) Bluetooth Module USB Reset Switch RX/TX RX/TX MAX3232 DP1/DM1 DP2/DM2 +5V USB_DM1 USB_DP1 USB_DM2 USB_DP2 +5V SCL, SDA_3.3V I2S Digital AMP NTP3100L O.C. Protector Reset IC NVRAM MICOM (MTV416GMF) JTAG X-tal 24MHz SCL, SDA_3.3V Copyright ⓒ 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes X-tal 54MHz CLK,TDI,TDO,MS,RST LGE Internal Use Only 10. Digital TV Audio Trouble Shooting N Follow procedure digital TV video trouble shooting Check video output Y Follow procedure All source audio trouble shooting N Maybe BCM3556 internal audio DSP has problems. Replace It Copyright ⓒ 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes LGE Internal Use Only 11. Analog TV Audio Trouble Shooting Overall Block Diagram for Brazil DTV (LH70) VA1G5BF8005 AV1 AV2 Component 1 Component 2 D-sub RGB Audio L/R (for RGB) JACK BACK at REAR HDMI 1 HDMI 2 HDMI 3 3x1 HDMI Switch Audio L/R Addr.[0:13], ctrl. data TU_SCLK, TU_SDATA, TU_SYNC TU_CVBS_IN TU_SIF SDA0/SCL0_3.3V LVDS RF_Switch, Gain_Switch DDR2(256Mbit) Qimonda/Hynix FRC IC (MST7323S) FRC Block X-tal 12MHz LCD Module (FHD, 120Hz) CVBS, L/R, AV_DET SIDE_CVBS, SIDE_L/R, SIDE_DET Y Pb Pr, L/R, DET Y Pb Pr, L/R, DET DDR_Data[0:15], DQS, DM … RGB/H/V DDR2 (1Gbit) Elpida/Hynix BCM3556 (Brazil) Data[16:31] DDR2 (1Gbit) Elpida/Hynix Data [0 … 7] CS ,RE,WE…… NAND Flash (512Mbit) Digital Audio (Optic) SPDIF RS-232C (Ctrl./SVC) Bluetooth Module USB Reset Switch RX/TX RX/TX MAX3232 DP1/DM1 DP2/DM2 +5V USB_DM1 USB_DP1 USB_DM2 USB_DP2 +5V SCL, SDA_3.3V I2S Digital AMP NTP3100L O.C. Protector Reset IC NVRAM MICOM (MTV416GMF) JTAG X-tal 24MHz SCL, SDA_3.3V Copyright ⓒ 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes X-tal 54MHz CLK,TDI,TDO,MS,RST LGE Internal Use Only 11. Analog TV Audio Trouble Shooting N Follow procedure analog TV video trouble shooting Replace one of IC101, IC102 at Jack Board or IC803/ Q812/ IC804/ IC809/Q809/+5V_ST and +12V of P801 at Main Board& Recheck Check video output Y Check Tuner(TU101) Power (5.0V, 2.5V, 3.3V, 1.2V) Y Check SIF Signal TU101 #6 Pin and R118 at Jack Board Y Check SIF Signal IC501 #4 Pin Y Check SIF Signal C128 at Jack Board Y Check cable between P203 at Jack Board and P701 at Main Baord Y Check SIF Signal R704 and C106 at Main Board Y Follow procedure All source audio trouble shooting N N Maybe Tuner(TU101) has problems N Replace one of L505/L514/C502/C511/Q500/Q502 IC501 & Recheck N Replace one of C123, R120, R121, R124, L109, Q101, C128 & Recheck N Maybe Cable Pin has problems N Replace one of R704/R128/C106 & Recheck N Maybe BCM3556 audio block has problems. Replace It Copyright ⓒ 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes LGE Internal Use Only 12. Component / RGB / AV Audio Trouble Shooting Overall Block Diagram for Brazil DTV (LH70) VA1G5BF8005 AV1 AV2 Component 1 Component 2 D-sub RGB Audio L/R (for RGB) JACK BACK at REAR HDMI 1 HDMI 2 HDMI 3 3x1 HDMI Switch Audio L/R Addr.[0:13], ctrl. data TU_SCLK, TU_SDATA, TU_SYNC TU_CVBS_IN TU_SIF SDA0/SCL0_3.3V LVDS RF_Switch, Gain_Switch DDR2(256Mbit) Qimonda/Hynix FRC IC (MST7323S) FRC Block X-tal 12MHz LCD Module (FHD, 120Hz) CVBS, L/R, AV_DET SIDE_CVBS, SIDE_L/R, SIDE_DET Y Pb Pr, L/R, DET Y Pb Pr, L/R, DET DDR_Data[0:15], DQS, DM … RGB/H/V DDR2 (1Gbit) Elpida/Hynix BCM3556 (Brazil) Data[16:31] DDR2 (1Gbit) Elpida/Hynix Data [0 … 7] CS ,RE,WE…… NAND Flash (512Mbit) Digital Audio (Optic) SPDIF RS-232C (Ctrl./SVC) Bluetooth Module USB Reset Switch RX/TX RX/TX MAX3232 DP1/DM1 DP2/DM2 +5V USB_DM1 USB_DP1 USB_DM2 USB_DP2 +5V SCL, SDA_3.3V I2S Digital AMP NTP3100L O.C. Protector Reset IC NVRAM MICOM (MTV416GMF) JTAG X-tal 24MHz SCL, SDA_3.3V Copyright ⓒ 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes X-tal 54MHz CLK,TDI,TDO,MS,RST LGE Internal Use Only 12. Component / RGB / AV Audio Trouble Shooting N Follow procedure external input video trouble shooting Check Video Output Y Check Jack JK208/JK209 Y Check Signal R235, R236 (Comp1) R216, R217 (Comp2) R249, R250 (RGB) R219, R221 (AV1) R218, R220 (AV2) at Jack Board Y Check cable between P203 at Jack Board and P701 at Main Baord Y Check Signal C206, C210, C211, C232, C220, C221, C224, C225, C226, C227 at Main Board Y Follow procedure All source audio trouble shooting N Replace Jack N Replace one of R235/R236/C231/C232 (Comp1) R216/R217/C207/C208 (Comp2) R219/R221/C210/C212 (AV1) R218/R220/C209/C211 (AV2) R249/R250/C246/C247 (RGB) & Recheck at Jack Board N Maybe Cable Pin has problems N Replace one of R215/R228/C211/C232 (Comp1) R229/R230/C220/C221 (Comp2) R204/R214/C206/C210 (AV1) R231/R232/C224/C225 (AV2) R233/R234/C226/C227 (RGB) & Recheck at Main Board N Maybe BCM3556 audio block has problems. Replace It Copyright ⓒ 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes LGE Internal Use Only 13. HDMI Audio Trouble Shooting Overall Block Diagram for Brazil DTV (LH70) VA1G5BF8005 AV1 AV2 Component 1 Component 2 D-sub RGB Audio L/R (for RGB) JACK BACK at REAR HDMI 1 HDMI 2 HDMI 3 3x1 HDMI Switch Audio L/R Addr.[0:13], ctrl. data TU_SCLK, TU_SDATA, TU_SYNC TU_CVBS_IN TU_SIF SDA0/SCL0_3.3V LVDS RF_Switch, Gain_Switch DDR2(256Mbit) Qimonda/Hynix FRC IC (MST7323S) FRC Block X-tal 12MHz LCD Module (FHD, 120Hz) CVBS, L/R, AV_DET SIDE_CVBS, SIDE_L/R, SIDE_DET Y Pb Pr, L/R, DET Y Pb Pr, L/R, DET DDR_Data[0:15], DQS, DM … RGB/H/V DDR2 (1Gbit) Elpida/Hynix BCM3556 (Brazil) Data[16:31] DDR2 (1Gbit) Elpida/Hynix Data [0 … 7] CS ,RE,WE…… NAND Flash (512Mbit) Digital Audio (Optic) SPDIF RS-232C (Ctrl./SVC) Bluetooth Module USB Reset Switch RX/TX RX/TX MAX3232 DP1/DM1 DP2/DM2 +5V USB_DM1 USB_DP1 USB_DM2 USB_DP2 +5V SCL, SDA_3.3V I2S Digital AMP NTP3100L O.C. Protector Reset IC NVRAM MICOM (MTV416GMF) JTAG X-tal 24MHz SCL, SDA_3.3V Copyright ⓒ 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes X-tal 54MHz CLK,TDI,TDO,MS,RST LGE Internal Use Only 13. HDMI Audio Trouble Shooting N Check video output Y Re-download EDID data Y Follow procedure All source audio trouble shooting N Maybe BCM3556 audio block has problems. Replace it N Replace IC601 Follow procedure HDMI video trouble shooting Copyright ⓒ 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes LGE Internal Use Only 14. USB Trouble Shooting Overall Block Diagram for Brazil DTV (LH70) VA1G5BF8005 AV1 AV2 Component 1 Component 2 D-sub RGB Audio L/R (for RGB) JACK BACK at REAR HDMI 1 HDMI 2 HDMI 3 3x1 HDMI Switch Audio L/R Addr.[0:13], ctrl. data TU_SCLK, TU_SDATA, TU_SYNC TU_CVBS_IN TU_SIF SDA0/SCL0_3.3V LVDS RF_Switch, Gain_Switch DDR2(256Mbit) Qimonda/Hynix FRC IC (MST7323S) FRC Block X-tal 12MHz LCD Module (FHD, 120Hz) CVBS, L/R, AV_DET SIDE_CVBS, SIDE_L/R, SIDE_DET Y Pb Pr, L/R, DET Y Pb Pr, L/R, DET DDR_Data[0:15], DQS, DM … RGB/H/V DDR2 (1Gbit) Elpida/Hynix BCM3556 (Brazil) Data[16:31] DDR2 (1Gbit) Elpida/Hynix Data [0 … 7] CS ,RE,WE…… NAND Flash (512Mbit) Digital Audio (Optic) SPDIF RS-232C (Ctrl./SVC) Bluetooth Module USB Reset Switch RX/TX RX/TX MAX3232 DP1/DM1 DP2/DM2 +5V USB_DM1 USB_DP1 USB_DM2 USB_DP2 +5V SCL, SDA_3.3V I2S Digital AMP NTP3100L O.C. Protector Reset IC NVRAM MICOM (MTV416GMF) JTAG X-tal 24MHz SCL, SDA_3.3V Copyright ⓒ 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes X-tal 54MHz CLK,TDI,TDO,MS,RST LGE Internal Use Only 14. USB Trouble Shooting Check USB 2.0 Cable Y Check USB device If devuce is 2.5 inch HDD, Check power adaptor Y Check P704 Y Check 5V voltage level at L703 Y Maybe BCM3556(IC100) has problems. Replace It. N Replace one of IC701/L703/IC806/Q810/L819 & Recheck N Replace Jack • Exception - USB power could be disabled by inrushing current - In this case, remove the device and try to reboot the TV (AC power off/on) Copyright ⓒ 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes LGE Internal Use Only 14. Bluetooth Trouble Shooting Overall Block Diagram for Brazil DTV (LH70) VA1G5BF8005 AV1 AV2 Component 1 Component 2 D-sub RGB Audio L/R (for RGB) JACK BACK at REAR HDMI 1 HDMI 2 HDMI 3 3x1 HDMI Switch Audio L/R Addr.[0:13], ctrl. data TU_SCLK, TU_SDATA, TU_SYNC TU_CVBS_IN TU_SIF SDA0/SCL0_3.3V LVDS RF_Switch, Gain_Switch DDR2(256Mbit) Qimonda/Hynix FRC IC (MST7323S) FRC Block X-tal 12MHz LCD Module (FHD, 120Hz) CVBS, L/R, AV_DET SIDE_CVBS, SIDE_L/R, SIDE_DET Y Pb Pr, L/R, DET Y Pb Pr, L/R, DET DDR_Data[0:15], DQS, DM … RGB/H/V DDR2 (1Gbit) Elpida/Hynix BCM3556 (Brazil) Data[16:31] DDR2 (1Gbit) Elpida/Hynix Data [0 … 7] CS ,RE,WE…… NAND Flash (512Mbit) Digital Audio (Optic) SPDIF RS-232C (Ctrl./SVC) Bluetooth Module USB Reset Switch RX/TX RX/TX MAX3232 DP1/DM1 DP2/DM2 +5V USB_DM1 USB_DP1 USB_DM2 USB_DP2 +5V SCL, SDA_3.3V I2S Digital AMP NTP3100L O.C. Protector Reset IC NVRAM MICOM (MTV416GMF) JTAG X-tal 24MHz SCL, SDA_3.3V Copyright ⓒ 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes X-tal 54MHz CLK,TDI,TDO,MS,RST LGE Internal Use Only 14. USB Trouble Shooting N Check Bluetooth Module Y Check Cable between Bluetooth and Main Board Y Check P705 Y Check Signal R3022, R3023 Y Maybe BCM3556(IC100) has problems. Replace It. Replace Bluetooth N Replace cable N Replace Jack N Replace one of R3022, R3023 & Recheck Copyright ⓒ 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes LGE Internal Use Only 15. Digital TV Recording Fail Trouble Shooting Overall Block Diagram for Brazil DTV (LH70) VA1G5BF8005 AV1 AV2 Component 1 Component 2 D-sub RGB Audio L/R (for RGB) JACK BACK at REAR HDMI 1 HDMI 2 HDMI 3 3x1 HDMI Switch Audio L/R Addr.[0:13], ctrl. data TU_SCLK, TU_SDATA, TU_SYNC TU_CVBS_IN TU_SIF SDA0/SCL0_3.3V LVDS RF_Switch, Gain_Switch DDR2(256Mbit) Qimonda/Hynix FRC IC (MST7323S) FRC Block X-tal 12MHz LCD Module (FHD, 120Hz) CVBS, L/R, AV_DET SIDE_CVBS, SIDE_L/R, SIDE_DET Y Pb Pr, L/R, DET Y Pb Pr, L/R, DET DDR_Data[0:15], DQS, DM … RGB/H/V DDR2 (1Gbit) Elpida/Hynix BCM3556 (Brazil) Data[16:31] DDR2 (1Gbit) Elpida/Hynix Data [0 … 7] CS ,RE,WE…… NAND Flash (512Mbit) Digital Audio (Optic) SPDIF RS-232C (Ctrl./SVC) Bluetooth Module USB Reset Switch RX/TX RX/TX MAX3232 DP1/DM1 DP2/DM2 +5V USB_DM1 USB_DP1 USB_DM2 USB_DP2 +5V SCL, SDA_3.3V I2S Digital AMP NTP3100L O.C. Protector Reset IC NVRAM MICOM (MTV416GMF) JTAG X-tal 24MHz SCL, SDA_3.3V Copyright ⓒ 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes X-tal 54MHz CLK,TDI,TDO,MS,RST LGE Internal Use Only 15. Digital TV Recording Fail Trouble Shooting N Check video/audio output Y Check USB N Follow procedure USB trouble shooting Follow procedure digital TV video/audio trouble shooting Copyright ⓒ 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes LGE Internal Use Only 18. Digital TV Video Trouble Shooting while recording (Watch & Record) Overall Block Diagram for Brazil DTV (LH70) VA1G5BF8005 AV1 AV2 Component 1 Component 2 D-sub RGB Audio L/R (for RGB) JACK BACK at REAR HDMI 1 HDMI 2 HDMI 3 3x1 HDMI Switch Audio L/R Addr.[0:13], ctrl. data TU_SCLK, TU_SDATA, TU_SYNC TU_CVBS_IN TU_SIF SDA0/SCL0_3.3V LVDS RF_Switch, Gain_Switch DDR2(256Mbit) Qimonda/Hynix FRC IC (MST7323S) FRC Block X-tal 12MHz LCD Module (FHD, 120Hz) CVBS, L/R, AV_DET SIDE_CVBS, SIDE_L/R, SIDE_DET Y Pb Pr, L/R, DET Y Pb Pr, L/R, DET DDR_Data[0:15], DQS, DM … RGB/H/V DDR2 (1Gbit) Elpida/Hynix BCM3556 (Brazil) Data[16:31] DDR2 (1Gbit) Elpida/Hynix Data [0 … 7] CS ,RE,WE…… NAND Flash (512Mbit) Digital Audio (Optic) SPDIF RS-232C (Ctrl./SVC) Bluetooth Module USB Reset Switch RX/TX RX/TX MAX3232 DP1/DM1 DP2/DM2 +5V USB_DM1 USB_DP1 USB_DM2 USB_DP2 +5V SCL, SDA_3.3V I2S Digital AMP NTP3100L O.C. Protector Reset IC NVRAM MICOM (MTV416GMF) JTAG X-tal 24MHz SCL, SDA_3.3V Copyright ⓒ 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes X-tal 54MHz CLK,TDI,TDO,MS,RST LGE Internal Use Only 18. Digital TV Video Trouble Shooting while recording (Watch & Record) Check RF Cable Y N Check video/audio output Y Check USB Y Check Watch N Follow procedure OSD trouble shooting N Follow procedure USB trouble shooting Follow procedure digital TV video/audio trouble shooting Y Check HDD (User) N Replace Jack Copyright ⓒ 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes LGE Internal Use Only 19. Digital TV Audio Trouble Shooting while recording (Watch & Record) Overall Block Diagram for Brazil DTV (LH70) VA1G5BF8005 AV1 AV2 Component 1 Component 2 D-sub RGB Audio L/R (for RGB) JACK BACK at REAR HDMI 1 HDMI 2 HDMI 3 3x1 HDMI Switch Audio L/R Addr.[0:13], ctrl. data TU_SCLK, TU_SDATA, TU_SYNC TU_CVBS_IN TU_SIF SDA0/SCL0_3.3V LVDS RF_Switch, Gain_Switch DDR2(256Mbit) Qimonda/Hynix FRC IC (MST7323S) FRC Block X-tal 12MHz LCD Module (FHD, 120Hz) CVBS, L/R, AV_DET SIDE_CVBS, SIDE_L/R, SIDE_DET Y Pb Pr, L/R, DET Y Pb Pr, L/R, DET DDR_Data[0:15], DQS, DM … RGB/H/V DDR2 (1Gbit) Elpida/Hynix BCM3556 (Brazil) Data[16:31] DDR2 (1Gbit) Elpida/Hynix Data [0 … 7] CS ,RE,WE…… NAND Flash (512Mbit) Digital Audio (Optic) SPDIF RS-232C (Ctrl./SVC) Bluetooth Module USB Reset Switch RX/TX RX/TX MAX3232 DP1/DM1 DP2/DM2 +5V USB_DM1 USB_DP1 USB_DM2 USB_DP2 +5V SCL, SDA_3.3V I2S Digital AMP NTP3100L O.C. Protector Reset IC NVRAM MICOM (MTV416GMF) JTAG X-tal 24MHz SCL, SDA_3.3V Copyright ⓒ 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes X-tal 54MHz CLK,TDI,TDO,MS,RST LGE Internal Use Only 19. Digital TV Audio Trouble Shooting while recording (Watch & Record) N Follow procedure digital TV video trouble shooting while recording (watch & record) Check video output Y Follow procedure All source audio trouble shooting N Maybe BCM3556 internal audio DSP has problems. Replace It Copyright ⓒ 2009 LG Electronics. Inc. All right reserved. Only for training and service purposes LGE Internal Use Only
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