Samsung Foundry 14nm

Samsung FoundryStrong 14nm FinFET Logic Process and Design Infrastructure for Advanced Mobile SOC Applications Samsung Foundry’s advanced 14-nanometer (nm) FinFET process technology offers a robust design infrastructure to drive future mobile application markets. As mobile applications continue to demand a more PC-like user experience, Samsung’s FinFET process technology enables system-on-chip (SOC) designers to reap all of the advantages for the latest energy-efficient processors: die-size reductions, faster frequencies, and lower power consumption. POWER GAP POWER CONSUMPTION POWER 200% 100% POWER BUDGET Fig. 1 Samsung 14nm FinFET process technology addresses the power reduction breakthrough that is needed to meet mobile power requirements. Samsung and Samsung Semiconductor. increase a chip’s reliability and power at a small node process. Sub. Drain Wg Source Lg Gate Drain Wfin Hfin Field Ox. are trademarks of Samsung Electronics Co.com www. and advanced routing rules. Samsung’s 14nm FinFET PDK includes: design flows. Lg Source Gate Field Ox. Samsung’s 14nm FinFET technology process taped out multiple test chips ranging from a full ARM Cortex™-A7 processor implementation to a SRAM-based chip capable of operating near threshold voltage levels. as well as an array of analog IP. routers and other design enablement features to support new device structures. and in turn. Inc. Solid Design Ecosystem Samsung’s 14nm FinFET process node is supported by an ecosystem of partners including ARM®. 2 Advantages of FinFET design allows 3D-structured design for significantly reduced leakage. With their collaboration. Ltd. 3D-structured design to minimize leakage. diagrams and tables is subject to change at any time without notice. Inc. Silicon-based Process Development Kits Samsung Foundry’s 14nm FinFET process design kits (PDKs) provide customers with models. design rule manuals and technology files that have been developed based on silicon results from previous 14nm FinFET test chips run. multi-layer designs. (Planar Structure) (3D Structure.com/foundry DS-14nm-Foundry Printed 3/13 . Samsung Foundry continues to lead the industry in providing its customers with early access to all elements of the design infrastructure to enable accelerated chip development. 3655 North First Street. FinFET) Fig.samsung. Samsung Semiconductor. Additionally. local interconnects. © 2013. Advantages of 3 Dimensional Design Samsung’s FinFET technology. The challenges of the FinFET structure include: control of the fin width and height dimensions. dates. uses a tall wall-like gate.. CA 95134-1713 TEL: 408-544-4000 EMAIL: foundry@ssi. as less heat is generated and the power supply lasts longer. Sub. The appearance of all products.Estimated groundbreaking and completion dates Characteristics of FinFET transistor performance are closely correlated to the high aspect ratio (AR) of fin height/fin width. clock frequencies can be tuned for system critical components without overstepping system power requirements. Cadence® Design Systems.samsung. figures. unlike planar transistors with flat. Mentor Graphics® and Synopsys®. San Jose. the ability to scale the fin width down to sub-20nm nodes and gate length dimension control over a high AR while precisely controlling all of these parameters during manufacturing.