Quadro Tft 32dt1

March 26, 2018 | Author: BoKi PoKi | Category: Detector (Radio), Microcontroller, Digital To Analog Converter, Power Supply, Amplifier
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SERVICE MANUALBrown goods TFT TV MODEL: TFT-32DT1 Product code: 10040823 TABLE OF CONTENTS 1. INTRODUCTION ...................................................................................................................................... 1 2. TUNER...................................................................................................................................................... 1 3. IF PART (T DA9886) ................................................................................................................................. 1 4. MULTI STANDARD SO UND PROCESSOR ............................................................................................ 2 5. VIDEO SWITCH TEA6415 ....................................................................................................................... 2 6. AUDIO AMPLIFIER STAGE WITH T PA3002D2 ...................................................................................... 2 7. MICROCONTROLLER ............................................................................................................................. 3 8. EEPROM 24C32....................................................................................................................................... 3 9. CLASS AB STEREO HEADPHONE DRIVER TDA1308 ......................................................................... 3 10. SAW FILTERS.................................................................................................................... ...................... 3 11. IC DESCRIPTIONS .................................................................................................................................. 4 11.1. TEA6415C ......................................................................................................................................... 5 11.1.1. General Description ................................................................................................................. 5 11.1.2. Features .................................................................................................................................... 5 11.1.3. Pinning ...................................................................................................................................... 5 11.2. 24LC02 .............................................................................................................................................. 6 11.2.1. Description................................................................................................................................ 6 11.2.2. Features .................................................................................................................................... 6 11.2.3. Pinning ...................................................................................................................................... 6 11.3. TCET1102G Optocoupler.................................................................................................................. 7 11.3.1. General Description ................................................................................................................. 7 11.3.2. General Features...................................................................................................................... 7 11.3.3. Applications.............................................................................................................................. 8 11.4. SVP-EX 52 ........................................................................................................................................ 8 11.4.1. General Description ................................................................................................................. 8 11.5. TL431 ................................................................................................................................................ 8 11.5.1. General Description ................................................................................................................. 8 11.5.2. Features..................................................................................................................................... 8 11.6. 24C32 ................................................................................................................................................ 8 11.6.1. General Description ................................................................................................................. 8 11.6.2. Features .................................................................................................................................... 8 11.6.3. Pinning ...................................................................................................................................... 9 11.7. 74LVC14A ....................................................................................................................................... 10 11.7.1. Description.............................................................................................................................. 10 11.7.2. Features .................................................................................................................................. 10 11.7.3. Pinning .................................................................................................................................... 10 11.8. TEA6420.......................................................................................................................................... 11 11.8.1. Features .................................................................................................................................. 11 11.8.2. Description.............................................................................................................................. 11 11.8.3. Pin Connections..................................................................................................................... 11 11.9. CS4334............................................................................................................................................ 11 11.9.1. Features .................................................................................................................................. 11 11.9.2. General Description ............................................................................................................... 11 11.9.3. Pin Descriptions ..................................................................................................................... 12 11.10. GAL16LV8 ....................................................................................................................................... 12 11.10.1. Description.............................................................................................................................. 12 11.10.2. Features .................................................................................................................................. 12 11.10.3. Pin connections...................................................................................................................... 13 11.11. K6R4008V1D................................................................................................................................... 13 11.11.1. Description.............................................................................................................................. 13 11.11.2. Features .................................................................................................................................. 13 11.11.3. Pin Description ....................................................................................................................... 14 11.12. L6562............................................................................................................................................... 14 11.12.1. Features .................................................................................................................................. 14 11.12.2. Description.............................................................................................................................. 14 11.12.3. Pin Connections and Descriptions ...................................................................................... 15 11.13. LM1117......................................................................................................................... ................... 15 i TFT TV Service Manual 11/04/2006 11.13.1. General Description ............................................................................................................... 15 11.13.2. Features .................................................................................................................................. 15 11.13.3. Applications............................................................................................................................ 15 11.13.4. Connection Diagrams ............................................................................................................ 16 11.14. LM317.............................................................................................................................................. 16 11.14.1. General Description ............................................................................................................... 16 11.14.2. Features .................................................................................................................................. 16 11.14.3. Pin Description ....................................................................................................................... 16 11.15. LM809.............................................................................................................................................. 16 11.15.1. General Description ............................................................................................................... 16 11.15.2. Features .................................................................................................................................. 16 11.15.3. Pinning .................................................................................................................................... 17 11.16. MSP34X1G...................................................................................................................................... 17 11.16.1. Introduction ............................................................................................................................ 17 11.16.2. Features .................................................................................................................................. 18 11.16.3. Pin connections...................................................................................................................... 18 11.17. M29W040B...................................................................................................................................... 20 11.17.1. Description.............................................................................................................................. 20 11.17.2. Features .................................................................................................................................. 20 11.17.3. Pin Descriptions ..................................................................................................................... 21 11.18. MC33202 ......................................................................................................................................... 21 11.18.1. General Description ............................................................................................................... 21 11.18.2. Features .................................................................................................................................. 21 11.18.3. Pin Connections..................................................................................................................... 21 11.19. PCF8574 ......................................................................................................................................... 22 11.19.1. General Description ............................................................................................................... 22 11.19.2. Features .................................................................................................................................. 22 11.19.3. Pinning .................................................................................................................................... 22 11.20. PI5V330........................................................................................................................................... 23 11.20.1. General Description ............................................................................................................... 23 11.21. SDA55XX (SDA5550)...................................................................................................................... 23 11.21.1. General description ............................................................................................................... 23 11.22. Sil 9993............................................................................................................................................ 23 11.22.1. General Description ............................................................................................................... 23 11.22.2. Features .................................................................................................................................. 24 11.23. NCP1014 ......................................................................................................................................... 24 11.23.1. General Description ............................................................................................................... 24 11.23.2. Features .................................................................................................................................. 24 11.23.3. Pin Connections and Descriptions ...................................................................................... 25 11.24. SN74CB3Q3305.............................................................................................................................. 25 11.24.1. General Description ............................................................................................................... 25 11.24.2. Features .................................................................................................................................. 25 11.24.3. Pin Connections..................................................................................................................... 26 11.25. ST24LC21 ....................................................................................................................................... 26 11.25.1. Description.............................................................................................................................. 26 11.25.2. Features .................................................................................................................................. 26 11.25.3. Pin connections...................................................................................................................... 26 11.26. LM2576............................................................................................................................................ 27 11.26.1. General Description ............................................................................................................... 27 11.26.2. Features .................................................................................................................................. 27 11.26.3. Pin description ....................................................................................................................... 27 11.27. TDA1308 ......................................................................................................................................... 27 11.27.1. General Description ............................................................................................................... 27 11.27.2. Features .................................................................................................................................. 27 11.27.3. Pinning .................................................................................................................................... 28 11.28. TDA9886 ......................................................................................................................................... 28 11.28.1. General Description ............................................................................................................... 28 11.28.2. Features .................................................................................................................................. 28 11.28.3. Pinning .................................................................................................................................... 28 11.29. TPA3002D2 ..................................................................................................................................... 29 ii TFT TV Service Manual 11/04/2006 .......................................................................................31.................. 29 11................................................................................. SOUND1................................... 3 iii TFT TV Service Manual 11/04/2006 .............................................................11..... 34 12..........................................29................................................... 31 11...........................1............ 34 12.......1...................................................................29...................................................2..............................................9.................................. General Description ................................................................................................................ 35 12............... Options ...................2..3................................................ 1 14....................... 31 11..................... VPC3230D..........30........................................ 31 11............................................................................................ 33 12............................................................................................................................................. 30 11.... TV Norm ........................... 29 11...............................................30........................ 35 12....................................... 34 12............ Menu Languages 1 & 2 ..........4......... Features ................................... Features .......1............3....... 32 12....................................... Pin Connections and Short Descriptions ...... BLOCK DIAGRAM.....................5............................................................................................6............................... µPA672T...............30.................................................................................. CIRCUIT DIAGRAM .......................................... 31 11............... Source ................................... 35 12............... Teletext........31........2........ Pinning ........................... Features ..................................................30...... SERVICE MENU SETTINGS ..................................................................................................................................................................................................... CIRCUIT DIAGRAMS ............ 31 11..................................................31................................. General Description ..................................................................................................................1.......... 35 13...........................7................ 35 12............................................ 31 11..................................... General Description ........ Pin Connection...........................................................................29..................................................................................................... SOUND 2..................... Picture Adjust ..........................................................................................2.............................. ........................3.................................................. 1 15......................................8............................................................... 33 12.......................................... The following figure shows the simplified block diagram of the integrated circuit. NTSC (playback) colour standards and multiple transmission standards as B/G. Max: 35V 3. UHF tuner suitable for CCIR systems B/G. Symmetrical IF output 1 11. Compact size 7. General description of UV1316: The UV1316 tuner belongs to the UV 1300 family of tuners. World standardised mechanical dimensions and world standard pinning 6. L’. I²C-bus serial clock 5. The tuning is available through the digitally controlled I2C bus (PLL). PLL supply voltage 8. Not connected 7. Max: 5. Sound system output is supplying 2x8W (10%THD) for stereo 8 speakers.5V Min:-0. Tuner supply voltage 10. Min: 30V. It is a combined VHF.5V : 5. Max: 5. I²C-bus serial data 6. L’. Member of the UV1300 family small sized UHF/VHF tuners 2.0V.0V. L’. Tuning voltage 3. Complies to “CENELEC EN55020” and “EN55013” Pinning: 1. Below you will find info on one of the Tuners in use. ADC input 9. SIF-AGC detector. Video demodulator and amplifier. It supports following peripherals: 2 SCART sockets 1 AV input (CVBS + Stereo Audio) 1 SVHS input 1 Stereo Headphone input 1 Component input (YPbPr + Stereo Audio) 1 D-Sub 15 PC input 1 HDMI input 1 Stereo audio input for PC Audio line out is taken from the scart with given scart-to-line out connector 2. which are designed to meet a wide range of applications. L. SECAM and NTSC) vision and sound IF signal PLL. VIF-AGC detecto r. Max: 4. VCO and divider. The low IF output impedance has been designed for direct drive of a wide variety of SAW filters with sufficient suppression of triple transient. H. INTRODUCTION 32” TFT TV is a progressive TV control system with built-in de-interlacer and scaler. Digitally controlled (PLL) tuning via I2C-bus 4. L. L. The chassis is equipped with many inputs and outputs allowing it to be used as a center of a media system. Off-air channels. It uses a 1366*768 panel with 16:9 aspect ratio. Digital acquisition help and AFC.5V : 33V. UHF tuners suitable for CCIR systems B/G. IF PART (TDA9886) The TDA9886 is an alignment-free multistandard (PAL. Sound carrier trap. Gain control voltage (AGC) 2. TUNER The tuners used in the design are combined VHF. I²C-bus address select 4.1.5V : : : Max: 5. I and I’. I and I’. Frequency Phase-Locked Loop (FPLL) detector. and D/K. Single reference QSS mixer. H. S-cable channels and Hyper band 5. Tuner and VIF-AGC. Features of UV1316: 1.5V Min:-0.3V. Min: 4. H. Symmetrical IF output 2 : 4. SECAM. D/K.3V. The TV is capable of operation in PAL. AM demodulator. The integrated circuit comprises the following functional blocks: VIF amplifier. I/I’. Max: 5. SIF amplifier. Systems CCIR: B/G. and L/L’ including German and NICAM stereo. FM demodulator and 1 TFT TV Service Manual 11/04/2006 . OIRT: D/K 3. I/I’.75V. starting with analog sound IF signal-in. MULTI STANDARD SOUND PROCESSOR The MSP34x1G family of single-chip Multistandard Sound Processors covers the sound processing of all analog TV-Standards worldwide. 5. I²C-bus transceivers and MAD (module address). Stereo speaker volume is controlled with a dc voltage applied to the volume control terminal offering a range of gain from –40 dB to 36 dB. 5VDC on the input. Audio amplifier and mute time constant. Each input can be used as a normal input or as a MAC or Chroma input (with external Resistor Bridge). Class-D audio amplifier for driving bridged-tied stereo speakers. top for CVBS or black level for RGB signals). AUDIO AMPLIFIER STAGE WITH TPA3002D2 The TPA3004D2 is a 9-W (per channel) efficient. as well as the NICAM digital sound standards. The main function of this device is to switch 8 video-input sources on the 6 outputs. Each output can be switched on only one of each input. are also dc voltage controlled with a range of gain from –56 dB to 20 dB. Each nominal gain between any input and output is 6.5dB. for driving external headphone amplifier inputs. On each input an alignment of the lowest level of the signal is made (bottom of sync. Driving 75ohm load needs an external resistor. The MSP34x1G has optimum stereo performance without any adjustments. It is possible to have the same input connected to several outputs. Micronas Noise Reduction (MNR) is performed alignment free. VIDEO SWITCH TEA6415 In case of three or more external sources are used. with an external resistor bridge. The DBX noise reduction. The TPA3004D2 can drive stereo speakers as low as 8 . Line outputs. Current ICs have to perform adjustment procedures in order to achieve good stereo separation for BTSC and EIA-J. 6. the video switch IC TEA6415 is used. down to processed analog AF-out. These TV sound processing ICs include versions for processing the multichannel television sound (MTS) signal conforming to the standard recommended by the Broadcast Television Systems Committee (BTSC). The high efficiency of the TPA3004D2 eliminates the need for external heatsinks when playing music. 4. Other processed standards are the Japanese FM-FM multiplex standard (EIA-J) and the FM Stereo Radio standard. An integrated 5-V regulated supply is provided for powering an external headphone amplifier.acquisition help.For D2MAC or Chroma signal the alignment is switched off by forcing. or alternatively. 2 TFT TV Service Manual 11/04/2006 . All the switching possibilities are changed through the BUS. Internal voltage stabilizer. is performed on a single chip. The full TV sound processing. The 24C32 features an input cache for fast write loads with a capacity of eight 8-byte pages.35 MHz and 33. the Keil C51 Compiler and TEDIpro OSD development SW by Tara Systems.ground 4 Output 5 Output K3958M: Standard: • B/G • D/K •I • L/L’ 3 TFT TV Service Manual 11/04/2006 . This device has been developed for advanced. Advanced CMOS technology makes this device ideal for low-power non-volatile code and data applications. The SDA 55xx is also supported with powerful design tools like emulators from Hitex. D/K. CLASS AB STEREO HEADPHONE DRIVER TDA1308 The TDA1308 is an integrated class AB stereo headphone driver contained in a DIP8 plastic package.5 V supply voltage for the core and 3. or 64 bytes. EEPROM 24C32 The Microchip Technology Inc. 24C32 is a 4Kx8 (32 Kbit) Electrically Erasable PROM.3 V for the I/O port pins to make them TTL compatible. data pointers and additional interrupts. Kleinhenz.25 micron technology with 2. etc. L.NICAM) • Channel 2 (B/G. SDA 55xx is realized in 0. 8. for up to 256K bits address space.40 MHz (L’) and 39. I) with one pass band for sound carriers between 32. SAW FILTERS K9656M: Standard: • B/G • D/K •I • L/L’ Features • TV IF audio filter with two channels • Channel 1 (L’) with one pass band for sound carriers at 40. ROMless versions can access up to 1 MByte of external RAM and ROM. 9. low power applications such as personal communications or data acquisition. iSystems. The SDA 55xx provides also an integrated general purposefully 8051-compatible microcontroller with specific hardware features especially suitable in TV sets.7. Based on the SDA 55xx microcontroller the MINTS software package was developed and provides dedicated device drivers for many Micronas video & audio products and includes a full blown TV control SW for the PEPER application chassis. 10. It also features a fixed 4K-bit block of ultra-high endurance memory for data that changes frequently. The internal XRAM consists of up to 16 kBytes. The microcontroller core has been enhanced to provide powerful features such as memory banking.75 MHz (L’. The 8-bit microcontroller runs at 33. The microcontroller provides an internal ROM of up to 128 kBytes. The 24C32 is capable of both random and sequential reads up to the 32K boundary. MICROCONTROLLER The Micronas SDA 55xx TV microcontroller is dedicated to 8 bit applications for TV control and provides dedicated graphic features designed for modern low class to mid range TV sets.24C32 devices on the same bus. The device is fabricated in a 1 mm CMOS process and has been primarily developed for portable digital audio applications.33 MHz internal clock. Functional address lines allow up to 8 .40 MHz Terminals • Tinned CuFe alloy Pin configuration 1 Input 2 Switching input 3 Chip carrier . IC DESCRIPTIONS TEA6415C 24LC02 4MX32 DDR SDRAM (128M) TCET1102G OPTOCOUPLER SVP-EX 52 TL431 24C32 74LVC14A TEA6420D CS4334 GAL16LV8 K6R4008V1 L6562D LM1086 LM1117 LM317T LM809 MSP3410G M29W040B MC33202 PCF8574 PI5V330 SDA5550 SG3525 SII9993 NCP1014 SN74CB3Q3305 ST24LC21 LM2576 MC34063 TDA1308 TDA9886T TPA3002D2 µPA672T VPC3230D 4 TFT TV Service Manual 11/04/2006 .ground 4 Output 5 Output 11.ground 3 Chip carrier .Features • TV IF video filter with Nyquist slopes at 33.90 MHz and 38.90 MHz • Constant group delay Terminals Tinned CuFe alloy Pin configuration 1 Input 2 Input . 1.5V. Min : 4. 12. Features • 20MHz Bandwidth • Cascadable with another TEA6415C (Internal address can be changed by pin 7 voltage) • 8 Inputs (CVBS. CHROMA. 19. Input Current : 1mA. All the switching possibilities are changed through the BUS. 5. : 5. 16. : 5. Input Current: 1mA. Input Current: 1mA. 5 VDC on the input.5Vpp.) • 6 Outputs • Possibility of MAC or chroma signal for each input by switching-off the clamp with an external resistor bridge • Bus controlled • 6.11.0V Max : Vcc+0. TEA6415C 11. Max: 3mA Max Max : 2Vpp. 17. Input 2.5Vpp : Min : 4. 15. Data Pinning : : 3.. 4..5V : 2Vpp. 13.1.3V Max: 1.5Vpp Min : 4.3. Input Clock : : 5. In other case.1. General Description The main function of the IC is to switch 8 video input sources on 6 outputs. 10. Each input can be used as a normal input or as a MAC or Chroma input (with external resistor bridge). : 5. 1 word of 16 bits is necessary to determine one configuration. 18. Max : 3mA : 2Vpp. : 5. In this case. with an external resistor bridge. MAC. Input Input Prog Input Vcc : Input Input Ground Output Output Output Output Output Output : Ground Input : : Max Low level High level Max Low level High level Max Max : : 2Vpp. Max : 3mA Max : 2Vpp. Max : 3mA : 2Vpp. The starting configuration upon power on (power supply: 0 to 10V) is undetermined. 6 words of 16 bits are necessary to determine one configuration.1.5Vpp Max : 2Vpp. For D2MAC or Chroma signal the alignment is switched off by forcing.5V.5Vpp.0V Max : Vcc+0. : 3.5dB gain between any input and output • 55dB crosstalk at 5mHz • Fully ESD protected 11. Input Current: 1mA.5Vpp Min : 4. Input Current: 1mA. top for CVBS or black level for RGB signals).5Vpp. Input Current: 1mA..1.5Vpp. 20. 8. : 3. Max : 3mA 5 TFT TV Service Manual 11/04/2006 . Driving 75 load needs an external transistor. Each output can be switched on only one of each input.2.3V Max: 1.5Vpp Min : 4. Max : 3mA : -0. 11. 9. 7.5dB. Max : 3mA : -0. On each input an alignment of the lowest level of the signal is made (bottom of synch. 6.5Vpp. It is possible to have the same input connected to several outputs.5V : 2Vpp.5Vpp Min : 4.5Vpp. 1. Input Current: 1mA. 14. Max : 3mA 12V : : : 5. Input Current: 1mA. RGB. Each nominal gain between any input and output is 6. 11. with standby and active currents of only 1µA and 1mA. 24LC02 11. 11. Pinning 6 TFT TV Service Manual 11/04/2006 .2.8V. Description The Microchip Technology Inc.000. respectively.2.8V • Low-power CMOS technology -1mA active current typical -1µA standby current typical (I-temp) • Organized as 1 block of 256 bytes (1 x 256 x 8) • 2-wire serial interface bus.2. Low-voltage design permits operation down to 1. The 24XX02 also has a page write capability for up to 8 bytes of data.11. I2C™ compatible • Schmitt Trigger inputs for noise suppression • Output slope control to eliminate ground bounce • 100 kHz (24AA02) and 400 kHz (24LC02B) compatibility • Self-timed write cycle (including auto-erase) • Page write buffer for up to 8 bytes • 2ms typical write cycle time for page write • Hardware write-protect for entire memory • Can be operated as a serial ROM • Factory programming (QTP) available • ESD protection > 4. SOIC. The device is organized as one block of 256 x 8-bit memory with a 2-wire serial interface.1. 24AA02/24LC02B (24XX 02*) is a 2 Kbit Electrically Erasable PROM. TSSOP and MSOP packages • 5-lead SOT-23 package • Pb-free finish available • Available for extended temperature ranges: -Industrial (I): -40°C to +85°C -Automotive (E): -40°C to +125°C 11.2.2. Features • Single supply with operation down to 1.3.000V • 1.000 erase/write cycles • Data retention > 200 years • 8-lead PDIP. 2 pF. providing a fixed distance between input and output for highest safety requirements. / TCET2100/ TCET4100 consist of a phototransistor optically coupled to a gallium arsenide infrared-emitting diode in a 4-lead up to 16-lead plastic dual inline package. General Features CTR offered in 9 groups Isolation materials according to UL94-VO Pollution degree (DIN/VDE 0110 / resp. TCET1102G Optocoupler 11. General Description The TCET110. high Common Mode Rejection Low temperature coefficient of CTR G=Leadform10.3.3. provides creepage distance > 8 for TCET2100/ TCET4100 optional. 7 TFT TV Service Manual 11/04/2006 . extra low coupling capacity of typical 0.2.1.16mm. suffix letter 'G' is not marked on the optocoupler Coupling System U 2 mm.11. The elements are mounted on one lead frame using a coplanar technique. IEC 664) Climatic classification 55/100/21 (IEC 68 part 1) Special construction: Therefore. 11.3. LVDS "single" port is built-in.11.two HD YPbPr component or PC RGB input and one 24-bit digital input ports. Applications Circuits for safe protective separation against electrical shock according to safety class II (reinforced isolation): For appl. I2C™ compatible -Including 100 kHz and 400 kHz modes • Self-timed write cycle (including auto-erase) • Power on/off data protection circuitry • Endurance: 8 TFT TV Service Manual 11/04/2006 . low power applications such as personal communications or data acquisition.24C32 devices on the same bus.Peak write current 3 mA at 5. or 64 bytes. class I – IV at mains voltage 300 V For appl. 24C32 is a 4K x 8 (32K bit) Serial Electrically Erasable PROM. The 24C32 is capable of both random and sequential reads up to the 32K boundary.Standby current 1µA typical • Industry standard two-wire bus protocol. line receiver.6.4. 11.5V to 5. 24C32 11.0 to 100mA Equivalent Full-Range Temperature Coefficient of 50ppm/°C Typical Temperature Compensated For Operation Over Full Rated Operating Temperature Range Low Output Noise Voltage Fast Turn-on Response 11. making these devices excel lent replacement for zener diodes in many applications.5V .5V .1.5. 11. microprocessor system interface. SVP-EX 52 11.3. 11.5V .20 Typical Sink Current Capability of 1. Features Programmable Output Voltage to 36 Volts Low Dynamic Output Impedance 0.1. Advanced CMOS technology makes this device ideal for low-power non-volatile code and data applications.4. It also features a fixed 4K-bit block of ultra-high endurance memory for data that changes frequently.2. Features • Voltage operating range: 4.5. 1280x1024x60P.6. class I – III at mains voltage 600 V According to VDE 0884. General Description The TL431/TL431Aare three-terminal adjustable regulator series with a guaranteed thermal stability over applicable temperature ranges. General Description SVP EX52 supports two CVBS and one Svideo. General Description The Microchip Technology Inc. computer peripheral interface. suitable for: Switch-mode power supplies. supporting output resolution up to SXGA. table 2. TL431 11.5 volts) and 36 volts with two external resistors These devices have a typical dynamic output impedance of 0.Maximum read current 150µA at 5. Functional address lines allow up to 8 .2W Active output circuitry provides a very sharp turn-on characteristic. The output voltage may be set to any value between Vref (approximately 2.6.1.3.Supports HD YPbPr de-interlacing mode and 3D-comb video mode.2. for up to 256K bits address space.5. 11. The 24C32 features an input cache for fast write loads with a capacity of eight 8-byte pages. This device has been developed for advanced. . and A0) in the control byte.000 Erase/Write cycles guaranteed for High Endurance Block . byte or page • Up to 8 chips may be connected to the same bus for up to 256K bits total memory • Electrostatic discharge protection > 4000V • Data retention > 200 years • Temperature ranges: -Commercial (C): 0°C to +70°C -Industrial (I): -40°C to +85°C 11. SDA Serial Address/Data Input/Output This is a bidirectional pin used to transfer addresses and data into and data out of the device. A2 Chip Address Inputs The A0. 9 TFT TV Service Manual 11/04/2006 . A1.A2 inputs are used by the 24C32 for multiple device operation and conform to the two-wire bus standard. filtered inputs for noise suppression • Output slope control to eliminate ground bounce • 2 ms typical write cycle time.3.10. A particular device is selected by tran smitting the corresponding bits (A2. or byte modes available • 1 page x 8 line input cache (64 bytes) for fast write loads • Schmitt trigger.6. It is an open drain terminal. A1. therefore the SDA bus requires a pull-up resistor to VCC (typical 10KQ for 100 kHz.. 1KQ for 400 kHz).000..000 E/W cycles guaranteed for Standard Endurance Block • 8 byte page.10. Pinning PIN Function Table PIN DESCRIPTIONS A0. The levels applied to these pins define the address block occupied by the device in the address map.000. The 74LVC14A provides six inverting buffers with Schmitt. jitter-free output signals. 74LVC14A 11. 11. 11.7.7. This feature allows the use of these devices as translators in a mixed 3.2 to 3.trigger action. Inputs can be driven from either 3.3 and 5V environment. superior to most advanced CMOS compatible TTL families.7. • Specified from -40 to +85C and -40 to +125C. Features • Wide supply voltage range from 1.6 V • CMOS low power consumption • Direct interface with TTL levels • Inputs accept voltages up to 5. lo w-voltage. Si-gate CMOS device. Pinning 10 TFT TV Service Manual 11/04/2006 .5 V • Complies with JEDEC standard no. Description The 74LVC14A is a high-performance.3.2.For normal data transfer SDA is allowed to change only during SCL low. Changes during SCL high are reserved for indicating the START and STOP conditions. It is capable of transforming slowly changing input signals into sharply defined. SCL Serial Clock This input is used to synchronize the data transfer from and to the device.7.3 or 5V devices. 11.1. low-power.8-1A • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000V MM EIA/JESD22-A115-A exceeds 200V. 8. where the modulator output controls the reference voltage input to an ultra-linear analog low-pass filter.2. SVCD players. General Description The CS4334 family members are complete. The CS4334 family contains on-chip digital de-emphasis. and the individual devices differ only in the supported interface format.8. Features • Complete Stereo DAC System: Interpolation.1. All the switching possibilities are changed through the I2C bus.3.1. 11. The CS4334/5/6/7/8/9 support all major audio data interface formats. 1-bitD/A conversion and output analog filtering in an 8-pinpackage. Features • 5 Stereo Inputs • 4 Stereo Outputs • Gain Control 0/2/4/6dB/Mute for each Output • Cascadable (2 different addresses) • Serial Bus Controlled • Very low Noise • Very low Distortion 11. These f eatures are ideal for set-top boxes. stereo digital-to-analog output systems including interpolation. Output Analog Filtering • 24-Bit Conversion • 96 dB Dynamic Range • -88 dB THD+N • Low Clock Jitter Sensitivity • Single +5V Power Supply • Filtered Line Level Outputs • On-Chip Digital De-emphasis • Popgaurd® Technology • Functionally Compatible with CS4330/31/33 11. TEA6420 11. The CS4334 family is based on delta-sigma modulation. and requires minimal support circuitry. and A/V receivers. operates from a single +5V power supply. Pin Connections CS4334 11. 11 TFT TV Service Manual 11/04/2006 . 11. DVD players.8.8.2.9. D/A.9. This architecture allows for infinite adjustment of sample rate between 2 kHz and 100 kHz simply by changing the master clock frequency.11.9. Description The TEA6420 switches 5 stereo audio inputs on4stereo outputs. at 3.High Speed Electrical Erasure (<100ms) .3V GAL16LV8 uses the same industry standard 16V8 architecture as its 5V counterpart and supports all architectural features such as combinatorial or registered macrocell operations.Reconfigurable Logic .I/O Interfaces with Standard 5V TTL Devices (GAL16LV8C) • ACTIVE PULL-UPS ON ALL PINS (GAL16LV8D Only) • E2 CELL TECHNOLOGY . which combines CMOS with Electrically Erasable (E2) floating gate technology.2.5 ns maximum propagation delay time. 100 erase/write cycles and data retention in excess of 20 years are specified.3V E 2CMOS process.3.JEDEC-Compatible 3.3V Interface Standard . The GAL16LV8C can interface with both 3. GAL16LV8 11. Description The GAL16LV8D.5 ns Maximum Propagation Delay .UltraMOS® Advanced CMOS Technology • 3.3V LOW VOLTAGE 16V8 ARCHITECTURE .Fmax = 250 MHz . High speed erase times (<100ms) allow the devices to be reprogrammed quickly and efficiently. The GAL16LV8 is manufactured using Lattice Semiconductor's advanced 3.2.10.Reprogrammable Cells .Maximum Flexibility for Complex Logic Designs .11. DC. The 3.9. provides the highest speed performance available in the PLD market.3.1. Lattice Semiconductor de livers 100% field programmability and functionality of all GAL products.5V Compatible Inputs . and functional testing during manufacture. Pin Descriptions 11. In addition.3V and 5Vsignal levels. Unique test circuitry and reprogrammable cells allow complete AC. 11. Features • HIGH PERFORMANCE E2CMOS® TECHNOLOGY . As a result.Programmable Output Polarity 12 TFT TV Service Manual 11/04/2006 .20 Year Data Retention • EIGHT OUTPUT LOGIC MACROCELLS .100% Tested/100% Yields .5 ns Maximum from Clock Input to Data Output .10.10. 3V Systems .11.Glue Logic for 3.11.High Speed Graphics Processing .Standard Logic Speed Upgrade • ELECTRONIC SIGNATURE FOR IDENTIFICATION • LEAD-FREE PACKAGE OPTIONS 11.DMA Control .Standby (TTL) : 20mA(Max. K6R4008V1D 11.) • Low Power Dissipation .2.) (CMOS) : 5mA(Max.Operating K6R4008V1D-08 : 80mA(Max.1.100% Functional Testability • APPLICATIONS INCLUDE: . The K6R4008V1D is packaged in a 400 mil 36-pin plastic SOJ and 44-pin plastic TSOP type II.194.3.288 words by 8 bits. Description The K6R4008V1D is a 4. It is particularly well suited for use in high-density high-speed system applications. 11. The device is fabricated using SAMSUNG• s advanced CMOS process and designed for high-speed circuit technology.304-bit high-speed Static Random Access Memory organized as 524.3 ±0.• PRELOAD AND POWER-ON RESET OF ALL REGISTERS .State Machine Control .) K6R4008V1D-10 : 65mA(Max.No Clock or Refresh required • Three State Outputs • Center Power/Ground Pin Configuration • Standard Pin Configuration K6R4008V1D-J : 36-SOJ-400 K6R4008V1D-K : 36-SOJ-400(Lead-Free) K6R4008V1D-T : 44-TSOP2-400BF K6R4008V1D-U : 44-TSOP2-400BF(Lead-Free) • Operating in Commercial and Industrial Temperature range. 13 TFT TV Service Manual 11/04/2006 . Features • Fast Access Time 8. Pin connections 11. TheK6R4008V1D uses 8 common input and output lines and has an output enable pin which operates faster than address access time at read cycle.11. 10ns(Max.10.) .) • Single 3.3V Power Supply • TTL Compatible Inputs and Outputs • Fully Static Operation . Pin Description 11. able to reduce AC input current distortion.12.2. it offers improved performance. L6562 11.3.11. Pin-to-pin compatible with the predecessor L6561. that allows wide-range-mains operation with an extremely low THD.12. Description The L6562 is a current-mode PFC controller operating in Transition Mode (TM).1. Features • TRANSITION-MODE CONTROL OF PFC PRE-REGULATORS • PROPRIETARY MULTIPLIER DESIGN FOR MINIMUM THD OF AC INPUT CURRENT • VERY PRECISE ADJUSTABLE OUTPUT OVERVOLTAGE PROTECTION • ULTRA-LOW ( 70µA) START-UP CURRENT • LOW ( 4 mA) QUIESCENT CURRENT • EXTENDED IC SUPPLY VOLTAGE RANGE • ON-CHIP FILTER ON CURRENT SENSE • DISABLE FUNCTION • 1% (@ Tj = 25 °C) INTERNAL REFERENCE VOLTAGE 11. The highly linear multiplier includes a special circuit.12.11. 14 TFT TV Service Manual 11/04/2006 . even over a large load range. 3V. Features • Available in 1. 3. It has the same pin-out as National Semiconductor’s industry standard LM317.85V. 2. A minimum of 10µF tantal um capacitor is required at the output to improve the transient response and stability. 2. 5V.2% (Max) • Load Regulation 0.3. General Description The LM1117 is a series of low dropout voltage regul ators with a dropout of 1.4% (Max) • Temperature Range — LM1117 0°C to 125°C — LM1117I -40°C to 125°C 11. Its circuit includes a zener trimmed bandgap reference to as-sure output voltage accuracy to within ±1%.13. and TO-252 D-PAK packages.2.85V Model for SCSI-2 Active Termination • Post Regulator for Switching DC/DC Converter • High Efficiency Linear Regulators • Battery Charger • Battery Powered Instrumentation 15 TFT TV Service Manual 11/04/2006 .11. 1.13. 2. which can set the output voltage from 1.12. LM1117 11. and 5V. The LM1117 series is available in SOT223. 3.3.1. 11. In addition.13. 2.2V at 800mA of load current. it is also available in five fixed voltages. and Adjustable Versions • Space Saving SOT-223 Package • Current Limiting and Thermal Protection • Output Current 800mA • Line Regulation 0.25V to 13. Applications • 2. The LM1117 offers current limiting and thermal shut down.3V.5V.85V. Pin Connections and Descriptions 11.8V with only two external resistors. The LM1117 is available in an adjustable version.5V. TO-220.8V.8V.13. LM317 11. The function of the LM809/810 is to monitor the VCC supply voltage. Features • Precise monitoring of 3V. thermal shut-down and safe area compensation. Seven standard reset voltage options are available. suitable for monitoring 5V. and assert a reset signal whenever this voltage declines below the factory-programmed reset threshold. They provide a reset to the microprocessor during power-up.15.14. Power-On Reset pulse width.15.5A of load current with an output voltage adjustable over a 1. General Description The LM809/810 microprocessor supervisory circuits can be used to monitor the power supplies in microprocessor and digital systems.13.5A • Output Adjustable Between 1.3V. 11.3.11. 3. LM809 11.1. The LM809 has an active-low RESET output. 3.14. 11. It employs internal current limiting. With a low supply current of only 15µA. and 5V supply voltages • Superior upgrade to MAX809/810 • Fully specified overtemperature • 140 ms min. General Description This monolithic integrated circuit is an adjustable 3-terminal positive voltage regulator designed to supply more than 1. the LM809/810 are ideal for use in portable equipment. 240 ms typical Active-low RESET Output(LM809) Active-high RESET Output(LM810) 16 TFT TV Service Manual 11/04/2006 .2 to 37V. and 3V supply voltages.2V and 37V • Internal Thermal Overload Protection • Internal Short Circuit Current Limiting • Output Transistor Safe Operating Area Compensation • TO-220 Package 11.2. while the LM810 has an active-high RESET output.2. Pin Description 11.1.14.15. The reset signal remains asserted for 240 ms after VCC rises above the threshold.14. Features • Output Current In Excess of 1.3V. Connection Diagrams 11. power-down and brown-out conditions.4. 3. is performed on a single chip.16. The MSP 34x1G has optimum stereo performance without any adjustments. The full TV sound processing. 15µAtyp • Power supply transient immunity 11.1. down to processed analog AF-out. Figure shows a simplified functional block diagram of the MSP 34x1G. the MSP 34x1G includes the “PAN-ORAMA” algorithm. Introduction The MSP 34x1G family of single-chip Multistandard Sound Processors covers the sound processing of all analog TV-Standards worldwide. The DBX noise reduction. Surround sound can be reproduced to a certain extent with two loudspeakers. or alternatively.• Guaranteed RESET Output valid for VCC 1V • Low Supply Current. Pinning 11.15. as well as the NICAM digital sound standards. Other processed standards are the Japanese FM-FM multiplex standard (EIA-J) and the FM Stereo Radio standard. The MSP 34x1G includes the Micronas virtualizer algorithm “3D-PANORAMA” which has been approved by the Dolby 1) Laboratories for with the "Virtual Dolby Surround" technology. starting with analog sound IF signal-in. Micronas Noise Reduction (MNR) is performed alignment free. no I 2 C interaction is necessary (Automatic Sound Selection). The MSP 34x1G has built-in automatic functions: The IC is able to detect the actual sound standard automat-ically (Automatic Standard Detection).16. pilot levels and identification signals can be evaluated internally with subsequent switching between mono/stereo/bilingual. MSP34X1G Multistandard Sound Processor Family 11. These TV sound processing ICs include versions for processing the multichannel television sound (MTS) signal conforming to the standard recommended by the Broadcast Television Systems Committee (BTSC). The MSP 34x1G has all functions of the MSP 34x0G with the addition of a virtual surround sound feature. Furthermore. In addition. Current ICs have to perform adjustment procedures in order to achieve good stereo separation for BTSC and EIA-J. 17 TFT TV Service Manual 11/04/2006 . two channels (2*16 bi ts) per sampling cycle (32 kHz) are transmitted.Source Select I2S bus interface consists of five pins: 1. leave vacant LV = if not used. treble. 3.024 MHz). I2S_DA_OUT: For output. 4.3. bass. one Mono input. 2*16 bits) per sampling cycle (32 kHz) are transmitted. I2S_CL: Gives the timing for the transmission of I2S serial data (1. two Stereo SCART outputs • Complete SCART in/out switching matrix • Two I 2S inputs. new registers MODUS. I2S_DA_IN1. 11. loudness • AVC: Automatic Volume Correction • Subwoofer output with programmable low-pass and complementary high-pass filter • 5-band graphic equalizer for loudspeaker channel • Spatial effect for loudspeaker channel • Four Stereo SCART (line) inputs. to ASTRA specification) • ASTRA Digital Radio (ADR) together with DRP 3510A • All NICAM standards • Korean FM-Stereo A2 standard 11. STATUS • Two selectable sound IF (SIF) inputs • Automatic Carrier Mute function • Interrupt output programmable (indicating status change) • Loudspeaker / Headphone channel with volume. Features • Standard Selection with single I2C transmission • Automatic Standard Detection of terrestrial TV standards • Automatic Sound Selection (mono/stereo/bilingual). I2S_DA_IN2: For input.16. Pin connections NC = not connected. acc. connect as described in circuit diagram DVSS: if not used. leave vacant OBL = obligatory. AM-SECAM L standard • Simultaneous demodulation of (very) high-deviation FM-Mono and NICAM • Adaptive deemphasis for satellite (Wegener-Panda. balance.2. connect to DVSS AHVSS: connect to AHVSS 18 TFT TV Service Manual 11/04/2006 . I2S_WS: The I2S_WS word strobe line defines the left and right sample. four channels (two channels per line.16. 2. one I2S output • Dolby Pro Logic with DPL 351xA coprocessor • All analog FM-Stereo A2 and satellite standards. 432 MHz) Test pin Crystal oscillator Crystal oscillator Test pin IF Input 2 (can be left vacant. rig ht Reference ground 1 SCART output 2. right SCART 2 input. left Analog Shield Ground 2 SCART 3 input. left Analog Shield Ground 4 SCART 4 input. only if IF input 1 is also not in use) IF common (can be left vacant. right SCART 4 input. left Not connected Analog reference voltage Analog ground Analog ground Not connected Not connected Volume capacitor MAIN Analog power supply 8V Volume capacitor AUX SCART output 1. Pin Name Type OUT Connection (if not used) PLCC 68-pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 PSDIP 64-pin 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 - PSDIP 52-pin 14 13 12 11 10 9 8 7 6 5 4 3 - PQFP 80-pin 9 8 7 6 5 4 3 2 1 80 79 78 77 76 75 - PLQFP 64-pin 8 7 6 5 4 3 2 1 64 63 62 61 60 59 58 - ADR_WS NC ADR_DA I2S_DA_IN1 I2S_DA_OUT I2S_WS I2S_CL I2C_DA I2C_CL NC STANDBYQ ADR_SEL D_CTR_I/O_0 D_CTR_I/O_1 NC NC NC 18 1 2 74 57 AUD_CL_OUT OUT LV 19 20 21 22 64 63 62 61 1 52 51 50 73 72 71 70 56 55 54 53 TP XTAL_OUT XTAL_IN TESTEN OUT IN IN LV OBL OBL OBL 23 60 49 69 52 ANA_IN2+ IN AVSS via 56 pF/LV 24 59 48 68 51 ANA_IN- IN AVSS via 56 pF/LV 25 26 27 28 - 58 57 56 55 - 47 46 45 44 - 67 66 65 64 63 62 61 60 59 50 49 48 47 - ANA_IN1+ AVSUP AVSUP NC NC AVSS AVSS MONO_IN NC IN 29 54 43 58 46 VREFTOP 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 SC1_IN_R SC1_IN_L ASG1 SC2_IN_R SC2_IN_L ASG2 SC3_IN_R SC3_IN_L ASG4 SC4_IN_R SC4_IN_L NC AGNDC AHVSS AHVSS NC NC CAPL_M AHVSUP CAPL_A SC1_OUT_L SC1_OUT_R VREF1 SC2_OUT_L SC2_OUT_R NC NC DACM_SUB OUT IN OUT IN/OUT IN/OUT IN/OUT IN/OUT IN IN IN/OUT IN/OUT IN LV LV LV LV LV LV LV OBL OBL LV OBL OBL LV LV LV LV LV LV OBL OBL LV LV OBL OBL LV LV OBL IN IN IN IN IN IN IN IN OUT OUT OUT OUT OUT LV LV AHVSS LV LV AHVSS LV LV AHVSS LV LV LV or AHVSS OBL OBL OBL LV LV OBL OBL OBL LV LV OBL LV LV LV LV LV Short Description ADR word strobe Not connected ADR Data Output 2 I S1 data input 2 I S data output 2 I S word strobe 2 I S clock 2 I C data 2 I C clock Not connected Stand-by (low-active) 2 I C bus address select D_CTR_I/O_0 D_CTR_I/O_1 Not connected Not connected Not connected Audio clock output (18.Pin No. rig ht Not connected Not connected Subwoofer output 19 TFT TV Service Manual 11/04/2006 . lef t SCART output 1. right SCART 1 input. left Analog Shield Ground 1 SCART 2 input. lef t SCART output 2. right SCART 3 input. only if IF input 1 is also not in use) IF input 1 Analog power supply 5V Analog power supply 5V Not connected Not connected Analog ground Analog ground Mono input Not connected Reference voltage IF A/D converter SCART 1 input. 55 56 57 58 59 60 61 62 63 64 65 66 67 68 30 29 28 27 26 25 24 23 22 21 20 19 18 17 25 24 23 22 21 20 19 18 17 16 15 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 22 21 20 19 18 17 16 15 14 13 12 11 10 9 NC DACM_L DACM_R VREF2 DACA_L DACA_R NC NC RESETQ NC NC NC I2S_DA_IN2 DVSS DVSS DVSS DVSUP DVSUP DVSUP ADR_CL OUT OUT OUT OUT IN IN OUT LV LV LV OBL LV LV LV LV OBL LV LV LV LV OBL OBL OBL OBL OBL OBL LV Not connected Loudspeaker out, left Loudspeaker out, right Reference ground 2 Headphone out, left Headphone out, right Not connected Not connected Power-on-reset Not connected Not connected Not connected 2 I S2-data input Digital ground Digital ground Digital ground Digital power supply 5V Digital power supply 5V Digital power supply 5V ADR clock 11.17. M29W040B 11.17.1. Description The M29W040B is a 4 Mbit (512Kb x8) non-volatile memory that can be read, erased and reprogrammed. These operations can be performed using a single low voltage (2.7 to 3.6V) supply. On power-up the memory defaults to its Read mode where it can be read in the same way as a ROM or EPROM. The M29W040B is fully backward compatible with the M29W040.The memory is divided into blocks that can be erased independently so it is possible to preserve valid data while old data is erased. Each block can be protected independently to prevent accidental Program or Erase commands from modifying the memory. Program and Erase commands are writ-ten to the Command Interface of the memory. An on-chip Program/Erase Controller simplif ies the process of programming or erasing the memory by taking care of all of the special operations that are required to update the memory contents. The end of a program or erase operation can be detected and any error conditions identified. The command set required to control the memory is consistent with JEDEC standards. Chip Enable, Output Enable and Write Enable signals control the bus operation of the memory. They allow simple connection to most microprocessors, often without additional logic. 11.17.2. Features •SINGLE 2.7 to 3.6V SUPPLY VOLTAGE for PROGRAM, ERASE and READ OPERATIONS •ACCESS TIME: 55ns •PROGRAMMING TIME - 10µs per Byte typical8 •UNIFORM 64 Kbytes MEMORY BLOCKS •PROGRAM/ERASE CONTROLLER - Embedded Byte Program algorithm - Embedded Multi-Block/Chip Erase algorithm - Status Register Polling and Toggle Bits •ERASE SUSPEND and RESUME MODES - Read and Program another Block during Erase Suspend •UNLOCK BYPASS PROGRAM COMMAND - Faster Production/Batch Programming •LOW POWER CONSUMPTION - Standby and Automatic Standby •100,000 PROGRAM/ERASE CYCLES per BLOCK •20 YEARS DATA RETENTION - Defectivity below 1 ppm/year •ELECTRONIC SIGNATURE - Manufacturer Code: 20h - Device Code: E3h 20 TFT TV Service Manual 11/04/2006 11.17.3. Pin Descriptions 11.18. MC33202 11.18.1. General Description The MC33201/2/4 family of operational amplifiers provide rail to rail operation on both the input and output. The inputs can be driven as high as 200mV beyond the supply rails without phase reversal on the outputs, and the output can swing within 50 mV of each rail. This rail to rail operation enables the user to make full use of the supply voltage range available. It is designed to work at very low supply voltages (±0.9 V) yet can operate with a supply of up to +12V and ground. Output current boosting techniques provide a high output current capability while keeping the drain current of the amplifier to a minimum. Also, the combination of low noise and distortion with a high slew rate and drive capability make this an ideal amplifier for audio applications. 11.18.2. Features • Low Voltage, Single Supply Operation (+1.8 V and Ground to +12 V and Ground) • Input Voltage Range Includes both Supply Rails • Output Voltage Swings within 50 mV of both Rails • No Phase Reversal on the Output for Over driven Input Signals • High Output Current (ISC = 80 mA, Typ) • Low Supply Current (ID = 0.9 mA, Typ) • 600 Output Drive Capability • Extended Operating Temperature Ranges ( 40° to +105°C and 55° to +125°C) • Typical Gain Bandwidth Product = 2.2 MHz • Pb Free Packages are Available 11.18.3. Pin Connections 21 TFT TV Service Manual 11/04/2006 11.19. PCF8574 11.19.1. General Description The PCF8574 is a silicon CMOS circuit. It provides general purpose remote I/O expansion for most microcontroller families via the two-line bidirectional bus (I2C).The device consists of an 8-bit quasibidirectional port and an I2C-bus interface. The PCF8574 has a low current consumption and includes latched outputs with high current drive capability for directly driving LEDs. It also possesses an interrupt line (INT) which can be connected to the interrupt logic of the microcontroller. By sending an interrupt signal on this line, the remote I/O can inform the microcontroller if there is incoming data on its ports without having to communicate via the I2C-bus. This means that the PCF8574 can remain a simple slave device. 11.19.2. Features • Operating supply voltage 2.5 to 6V • Low standby current consumption of 10 µA maximum • I2C to parallel port expander • Open-drain interrupt output • 8-bit remote I/O port for the I2C-bus • Compatible with most microcontrollers • Latched outputs with high current drive capability for directly driving LEDs • Address by 3 hardware address pins for use of up to 8 devices (up to 16 with PCF8574A) • DIP16, or space-saving SO16 or SSOP20 packages. 11.19.3. Pinning 22 TFT TV Service Manual 11/04/2006 and additional interrupts etc. DTS and all other formats capable of being sent over S/PDIF.1. It improves the TV controller software quality in following aspects: – Shorter time to market – Re-usability – Target independent development – Verification and validation before targeting – General test concept – Graphical interface design requiring minimum programming and controller know how.21.). DTVs.20. SDA55XX (SDA5550) 11. and interfaces to all major video processors. The receiver can connect to RGB input and output YCbCr using an integrated color space converter. TTX and Closed Caption. FLOF. The 8-bit Microcontroller runs at 360 ns. 11. PI5V330 11. General Description The PI5V330 is well suited for video applications when switching composite or RGB analogue. Device has an internal ROM of up to 128 KBytes. Controller with dedicated hardware does most of the internal TTX acquisition processing. The interface to user software is optimized for minimal overhead. The pixel-rate creates video overlays so two or more pictures can be viewed at the same time.5 TTX data and powerful On screen Display capabilities based on parallel attributes.22.0 host (DVD players. TEAM stands for TVT Expert Application Maker. HD set top boxes. Internal XRAM consists of up to16 Kbytes. The SiI 9993 comes pre-programmed with HDCP keys. D-VHS players and receivers. A S/PDIF port can output PCM encoded data as well as Dolby Digital. Silicon Image’s PanelLink 23 TFT TV Service Manual 11/04/2006 . page search and evaluation of header control bits) once per field. Program Delivery Control (PDC). SDA 55XX is realized in 0. configurable by customer. and Pixel oriented characters (DRCS). The slicer combined with dedicated hardware stores TTX data in a VBI buffer of 1 Kilobyte. Microcontroller has been enhanced to provide powerful features such as memory banking.25 micron technology with 2. an accelerating acquisition hardware module. – Modular and open tool chain. LCD TVs and projectors can now provide the purest level of protected digital audio/video over a simple. TOP and list-pages. A picture-in-picture application will be described in this brief.20.0 (High Definition Multimedia Interface) specification. fully 8051-compatible Microcontroller with television specific hardware features. The on-chip display unit for displaying Level 1. The device provides an integrated general-purpose. lowering costs.5 V supply voltage and 3. ROMless versions can access up to 1 MByte of external RAM and ROM. cycle time (min.0 allows HDMI systems to connect to any DVI 1. This allows full backward compatibility to DVI. Backwards compatibility with DVI 1. PC).21. The device also supports Closed caption acquisition and decoding. the firmware can provide high-end Telete xt features like Packet-26-handling. data pointers. Sil 9993 11. WSS. transfers data to/from external memory interface and receives/ transmits data via I2C-firmware user-interface. The Microcontroller firmware performs all the acquisition tasks (hamming and parity-checks. A 2-channel I2S port outputs data converted from S/PDIF. General description The SDA55XX is a single chip teletext decoder for decoding World System Teletext data as well as Video Programming System (VPS). all the while providing the highest level of HDCP key security.1.11. The SDA 55XX supports a wide range of standards including PAL. The SiI 9993 incorporates a flexible audio and video interface. greatly simplifying the manufacturing process. 11. An inexpensive NTSC titler can be implemented by superimposing the output of a character generator on a standard composite video background. plasma displays.3 V I/O (TTL compatible). and Wide Screen Signalling (WSS) data used for PAL plus transmissions (Line 23). low cost cable. The software and hardware development environment (TEAM) is available to simplify and speed up the development of the software and On Screen Display. Additionally. PDC.1. General Description The SiI 9993 is the first generation of PanelLink receivers that are designed for the HDMI 1.5 teletext data can also be used for customer defined on screen displays. a display generator for Level 1. NTSC and contains a digital slicer for VPS.22. Finally soft start and frequency jittering further ease the designer task to quickly develop low cost and robust offline power supplies.23. External disabling is easily done either simply by pulling the feedback pin down or latching it to ground through an inexpensive SCR for complete latched off. the NCP101X is quiet by nature: during nominal load operation. the connection of an auxiliary winding stops the DSS operation and helps to consume less than100 mW at high line. the output power demand diminishes.2. 11. standby power is reduced to the minimum without acoustic noise generation. Because this occurs at typically 1/4 of the maximum peak value. • Integrated HDCP decryption engine for receiving protected audio and video content • Pre-programmed HDCP keys provide highest level of key security. When the current setpoint falls below a given value. No Need for an Auxiliary Winding • Internal 1. frequency jittering. In this mode.23.g. 11. the NCP101X offers everything needed to build a rugged and low cost power supply. Features • Built in 700 V MOSFET with Typical R DSon of 11 and 22 • Large Creepage Distance Between High Voltage Pins • Current Mode Fixed Frequency Operation: 65 kHz–100 kHz 130 kHz • Skip Cycle Operation at Low Peak Currents Only: No Acoustic Noise! • Dynamic Self Supply. Unlike other monolithic solutions. Features • HDMI 1.2. For improved standby performance. a maximum peak current setpoint and a Dynamic Self Supply (no need for an auxiliary winding). DTS digital audio transmission (32-48kHz Fs) using IEC 60958 and IEC 61937.23.g. NCP1014 11. the part switches at one of the available frequencies (65 100 130 kHz). a built in latched overvoltage protection prevents from lethal voltage runaways in case the Optocoupler would brake. Short circuit detection takes place when the feedback signal fades away. short circuit protection.0 ms Soft Start • Latched Overvoltage Protection with Auxiliary Winding Operation • Frequency Jittering for Better EMI Signature • Auto Recovery Internal Output Short Circuit Protection • Below 100 mW Standby Power if Auxiliary Winding is Used • Internal Temperature Shutdown • Direct Optocoupler Connection • SPICE Models Available for TRANsient Analysis 24 TFT TV Service Manual 11/04/2006 . • Programmable I2S interface for connection to low-cost audio DACs. General Description The NCP101X series integrates a fixed frequency current modecontroller and a 700 V MOSFET. Dolby Digital. These PanelLink cores pass all HDMI compliancy tests. e. no acoustic noise takes place. in true short circuit conditions or in broken Optocoupler cases.0 compliant receiver • Integrated PanelLink core supports DTV resolutions (480i/576i/480p/576p/720p/1080i) • Digital video interface supports video processors: o 24-bit RGB 4:4:4 o 24-bit YCbCr 4:4:4 o 16/20/24-bit YCbCr 4:2:2 o 8/10/12-bit YCbCr 4:2:2 embedded syncs • Analog RGB and YPbPr output: o 10-bit DAC o Separate or Composite Syncs (Sync on G) • S/PDIF output supports PCM. simplifies manufacturing • Programmable registers via slave I2C interface • 3.22. As a result. Housed in a PDIP 7 or SOT 223package.1.receivers use the latest generation of PanelLink TMDS core technology.0 and DVI 1. including soft start. e. skip cycle.3V operation in 100-pin TQFP package • Flexible power management 11. the IC automatically enters the so called skip cycle mode and provides excellent efficiency at light loads. providing a low and flat ON-state resistance (ron).24.5 pF Typical) • Fast Switching Frequency (fOE = 20 MHz Max) • Data and Control Inputs Provide Undershoot Clamp Diodes • Low Power Consumption (ICC = 0.3-V Switching With 2. the SN74CB3Q3305 provides an optimized interface solution ideally suited for broadband communications. 2.3-V VCC 0. The device also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus.3-V.3 V to 3.23.5-V.8-V.11. and data-intensive computing systems.5-V.to 5-V Switching With 3.24. Class II • ESD Performance Tested Per JESD 22 2000-V Human-Body Model (A114-B. With Near-Zero Propagation Delay • Low Input/Output Capacitance Minimizes Loading and Signal Distortion (Cio(OFF) = 3. Pin Connections and Descriptions 11. 11. networking.5-V VCC • Bidirectional Data Flow.3-V CMOS Outputs • Ioff Supports Partial-Power-Down Mode Operation • Latch-Up Performance Exceeds 100 mA PerJESD 78.2.6 V • Data I/Os Support 0 to 5-V Signaling Levels (0. General Description The SN74CB3Q3305 is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of the pass transistor.24.3.2-V. SN74CB3Q3305 11. Specifically designed to support high-bandwidth applications. 5-V) • Control Inputs Can be Driven by TTL or 5-V/3.8-V.25 mA Typical) • VCC Operating Range From 2. 1. 3. 1. The low and flat ONstate resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. 1. Class II) 25 TFT TV Service Manual 11/04/2006 .to 3.1. Features • High-Bandwidth Data Path (Up To 500 MHz) • 5-V Tolerant I/Os with Device Powered-Up or Powered-Down • Low and Flat ON-State Resistance (ron) Characteristics Over Operating Range (ron = 3 Typical) • Rail-to-Rail Switching on Data I/O Ports 0. The device will switch to the I2C bidirectional mode upon the falling edge of the signal applied on SCL pin. 11.5V single supply voltage • 400k Hz compatibility over the full range of supply voltage • Two wire serial interface I 2C bus compatible • Page Write (Up To 8 Bytes) • Byte. Bus Isolation. Differential Signal Interface. Low-Distortion Signal Gating 11.2. The device operates with a power supply value as low as 2.5V. Pin Connections 11.1.24.25.25. Features • 1 million Erase/Write cycles • 40 years data retention • 2. Description The ST24LC21 is a 1K bit electrically erasable programmable memory (EEPROM). the device is in Transmit Only mode with EEPROM data clocked out from the rising edge of the signal applied on VCLK.25. This device can operate in two modes: Transmit Only mode and I 2C bidirectional mode. Pin connections DIP Pin connections CO Pin connections NC: Not connected Signal names SDA SCL Vcc Vss VCLK Serial data Ad dress Input/Output Serial Clock (I 2C mode) Supply voltage Ground Clock transmit only mode 26 TFT TV Service Manual 11/04/2006 . Both Plastic Dual-in-Line and Plastic Small Outline packages are available. The ST24LC21 can not switch from the I 2C bidirectional mode to the Transmit Only mode (except when the power supply is removed). When powered. random and sequential read modes • Self timed programming cycle • Automatic address incrementing • Enhanced ESD/Latch up • Performances 11.3. ST24LC21 11.1000-V Charged-Device Model (C101) • Supports Both Digital and Analog Applications: USB Interface. organized by 8 bits.25.5V to 5.3. 23 to 37 V ±4% Maximum Over Line and Load Conditions • Guaranteed 3. 1. LM2576 11.0 A load with excellent line and load regulation.2. In many cases.3.3 V. 5.27. 12 V.27. General Description The LM2576 series of regulators are monolithic integrated circuits ideally suited for easy and convenient design of a step–down switching regulator (buck converter). and ±10% on the oscillator frequency (±2% over 0°C to 125°C). Since the LM2576 converter is a switch–mode power supply.26. and Adjustable Output Versions • Adjustable Version Output Voltage Range. These regulators were designed to minimize the number of external components to simplify the power supply design. especially with higher input voltages. the power dissipated is so low that no heatsink is required or its size could be reduced dramatically. A standard series of inductors optimized for use with the LM2576 are available from several different manufacturers.26. Low Power Standby Mode • High Efficiency • Uses Readily Available Standard Inductors • Thermal Shutdown and Current Limit Protection • Moisture Sensitivity Level (MSL) Equals 1 11.1. TDA1308 11. 15 V. 11. 11. 15 V. General Description The TDA1308 is an integrated class AB stereo headphone driver contained in an SO8 or a DIP8 plastic package. All circuits of this series are capable of driving a 3. These devices are available in fixed output voltages of 3. 5.1. featuring 80 mA (typical) standby current. The LM2576 features include a guaranteed ±4% tolerance on output voltage within specified input voltages and output load conditions. Features • 3.27.2.0 V. Standard series of inductors optimized for use with the LM2576 are offered by several different inductor manufacturers. Features • Wide temperature range • No switch ON/OFF clicks • Excellent power supply ripple rejection • Low power consumption 27 TFT TV Service Manual 11/04/2006 .11.3 V. as well as thermal shutdown for full protection under fault conditions. The output switch includes cycle–by–cycle current limiting. 12 V.26. Pin description 11. This feature greatly simplifies the design of switch–mode power supplies. The device is fabricated in a 1 mm CMOS process and has been primarily developed for portable digital audio applications.26. and an adjustable output version.0 V. its efficiency is significantly higher in comparison with popular three–terminal linear regulators.0 A Output Current • Wide Input Voltage Range • Requires Only 4 External Components • 52 kHz Fixed Frequency Internal Oscillator • TTL Shutdown Capability. External shutdown is included. 3.28.25V 5V. single reference QSS mixer able to operate in high performance single reference QSS mode and in intercarrier mode.0V. 11.75V.5. Pinning SYMBOL VIF1 PIN 1 2 3 4 VIF2 OP1 FMPLL DESCRIPTION VIF differential input 1 VIF differential input 2 output 1 (open-collector) FM-PLL for loop filter 28 TFT TV Service Manual 11/04/2006 . 38.5V Vo(clip) : Min : 1400mVrms Min : 0.0V 11. operating as peak sync detector for negative modulated signals and as a peak white detector for positive modulated signals • Precise fully digital Automatic Frequency Control (AFC) detector with 4-bit digital-to-analogue converter. AFC bits via I 2C -bus readable • TakeOver Point (TOP) adjustable via I 2C-bus or alternatively with potentiometer • Fully integrated sound carrier trap for 4.• Short-circuit resistant • High performance • high signal-to-noise ratio • High slew rate • Low distortion • Large output voltage swing.5V 0V 2.3. switchable via I2C-bus • AM demodulator without extra reference circuit • Alignment-free selective FM-PLL demodulator with high linearity and low noise • I2C-bus control for all functions • I2C-bus transceiver with pin programmable Module Address (MAD).28.28.9.5 MHz.0 and 6.5.75V. SYMBOL OUTA INA(neg) INA(pos) VSS INB(pos) INB(neg) OUTB VDD Pinning PIN 1 2 3 4 5 6 7 8 DESCRIPTION Output A (Voltage swing) Inverting input A Non-inverting input A Negative supply Non-inverting input B Inverting input B Output B (Voltage swing) Positive supply PIN VALUE Min : 0.2. Max : 4. controlled by FM-PLL oscillator • Sound IF (SIF) input for single reference Quasi Split Sound (QSS) mode (PLL controlled) • SIF AGC for gain controlled SIF amplifier. Min : 3. TDA9886 11.1.27. 38.0. excellent pulse response) • Gated phase detector for L/L accent standard • Fully integrated VIF Voltage Controlled Oscillator (VCO). 5.75 MHz • 4 MHz reference frequency input [signal from Phase-Locked Loop (PLL) tuning system] or operating as crystal oscillator • VIF Automatic Gain Control (AGC) detector for gain control. Features • 5 V supply voltage • Gain controlled wide-band Vision Intermediate Frequency (VIF) amplifier (AC-coupled) • Multistandard true synchronous demodulation with active carrier regeneration (very linear demodulation. Max : 4.9. good intermodulation figures. 33. alignment-free. 11.25V Vo(clip) : Min : 1400mVrms 2. frequencies switchable for all negative and positive modulated standards via I2C-bus • Digital acquisition help.28. General Description The TDA9886 is an alignment-free single standard (without positive modulation) vision and sound IF signal PLL.4. 6. VIF frequencies of 33. 11.75 and 58. reduced harmonics. Max : 7. 45. c. Class-D audio amplifier for driving bridged-tied stereo speakers. Stereo speaker volume is controlled with a dc voltage applied to the volume control terminal offering a range of gain from -40 dB to 36 dB. The TPA3002D2 can drive stereo speakers as low as 8 O. TPA3002D2 11. Class-D Operation Eliminates Heatsinks and Reduces Power Supply Requirements 32-Step DC Volume Control From -40 dB to 36 dB Line Outputs for External Headphone Amplifier with Volume Control Regulated 5-V Supply Output for Powering TPA6110A2 Space-Saving. Line outputs. 11.29. note 1 video output analog ground VIF-PLL for loop filter supply voltage (+5 V) AFC output output 2 (open-collector) SIF differential input 1 SIF differential input 2 11. TAGC REF VAGC CVBS AGND VPLL VP AFC OP2 SIF1 SIF2 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 de-emphasis output for capacitor AF decoupling input for capacitor digital ground audio output tuner AGC TakeOver Point (TOP) I2C-bus data input/output I2C-bus clock input sound intercarrier output and MAD select not connected tuner AGC output 4 MHz crystal or reference input VIF-AGC for capacitor. are also dc voltage controlled with a range of gain from -56 dB to 20 dB. for driving external headphone amplifier inputs. An integrated 5-V regulated supply is provided for powering an external headphone amplifier. General Description The TPA3002D2 is a 9-W (per channel) efficient. Thermally-Enhanced PowerPAD™ Packaging Thermal and Short-Circuit Protection Applications LCD Monitors and TVs Powered Speakers 29 TFT TV Service Manual 11/04/2006 .29. The high efficiency of the TPA3002D2 eliminates the need for external heatsinks when playing music.2.DEEM AFD DGND AUD TOP SDA SCL SIOMA n.1. Features 9-W/Ch into an 8-Q Load from 12-V Supply Efficient.29. BSLN 13 I/O Bootstrap I/O for left channel. 17 O Class-D 1/2-H-bridge negative output for left channel LOUTP 20. connect the DAC ground to this terminal.11.3.39 - Power supply for right channel H-bridge (tied to pins 46 and 47 internally). negative high-side FET BSLP 24 I/O Bootstrap I/O for left channel. If using a DAC to control the volume. Leave unconnected when not used for headphone amplifier control. When the MODE pin (34) is a logic high. not connected to PVCCR or AVC C. 12 — REFGND Ground for gain control circuitry. When the MODE pin (34) is a logic low. A logic low on this pin places theplifier am in the Class-D mode and Class-D stereo outputs are enabled. 47 - Power supply for right channel H-bridge (tied to pins 38 and 39 internally). 30 TFT TV Service Manual 11/04/2006 .29. PVCCL 22. the MODE_OUT pin is driven low. 15 - Power supply for left channel H-bridge (tied to pins 22 and 23 internally). 43 - Power ground for right channel H-bridge PVCCL 14. Connect to AGND. 19 - Input for MODE control.5 V to 14 V) AV DD 29 O 5-V Regulated output capable of 100-mA output AV DDREF 7 O 5-V Reference output—provided for connection to adjacent VREF terminal. AGND NAME 26. not connected to PVCCL or AVCC. This pin is intended for MUTE control of an external headphone amplifier. Output for control of the variable output amplifiers. PVCCR 46. the MODE_OUT pin is driven high. Power ground for left channel H-bridge PGNDR 42. not connected to PVCCR or AVC C. A logic high on this pin places the amplifier in the variable output mode and the Class-D outputs are disabled. Pinning Terminal Functions TERMINAL NO. positive high-side FET BSRN 48 I/O Bootstrap I/O for right channel. positive high-side FET COSC 28 I/O I/O for charge/discharging currents onto capacitor for ramp generator triangle wave biased at V2P5 LINN 6 I Negative differential audio input for left channel LINP 5 I Positive differential audio input for left channel LOUTN 16. Variable outputs (VAROUTL and VAROUTR) are still enabled in Class-D mode to be used as line-level outputs for external amplifiers. 23 - Power supply for left channel H-bridge (tied to pins 14 and 15 internally). not connected to PVCCL or AVCC. PVCCR 38. 30 I/O DESCRIPTION - Analog ground for digital/analog cells in core AV CC 33 - High-voltage analog power supply (8. negative high-side FET BSRP 37 I/O Bootstrap I/O for right channel. 21 O Class-D 1/2-H-bridge positive output for left channel MODE 34 I MODE_OUT 35 O PGNDL 18. Connect to GND or AVDDREF if VAROUT outputs are unconnected. one S-VHS input.RINP 3 I Positive differential audio input for right channel RINN 2 I Negative differential audio input for right channel ROSC 27 I/O ROUTN 44. one CVBS output • two RGB/YCr Cb component inputs. 11. high = operational).31.30. Line level output for driving external HP amplifier.2. General Description The µPA672T is a super-mini-mold device provided with two MOS FET elements.30. 45 O Class-D 1/2-H-bridge negative output for right channel ROUTP 40. Thermal - Connect to AGND and PGND—should be center point for both grounds. VARMAX 10 I VAROUTL 31 O DC voltage that sets the maximum gain for the VAROUT outputs. — Pad Current setting resistor for ramp generator. 50/60Hz and 100/120 Hz TV sets. Connect to GND or AVDDREF if VAROUT outputs are unconnected. single-chip video front-end. as well as reference for unused audio input when using single-ended inputs. 11. Variable output for left channel audio. Pin Connection 11. General Description The VPC 323xD is a high-quality. It can be combined with other members of the DIGIT3000 IC family (such as DDP 331x) and/or it can be used with 3rd-party products. The main features of the VPC 323xD are • high-performance adaptive 4H comb filter Y/C separator with adjustable vertical peaking • multi-standard colour decoder PAL/NTSC/SECAM including all substandards • four CVBS.1. VREF 8 I Analog reference for gain control section.30. VAROUTR 32 O Variable output for right channel audio. VCLAMPR 36 - Internally generated voltage supply for right channel bootstrap capacitors.30. V2P5 4 O 2. which is targeted for 4:3 and 16:9. 41 O Class-D 1/2-H-bridge positive output for right channel SD VARDIFF 1 9 I I Shutdown signal for IC (low = shutdown.31.1. VCLAMPL 25 - Internally generated voltage supply for left channel bootstrap capacitors.5-V Reference for analog cells. Nominally equal to 1/8*VCC DC voltage to set the difference in gain between the Class-D and VAROUT outputs.3. µPA672T 11. Features • Two MOS FET circuits in package the same size as SC-70 • Automatic mounting supported 11. TTL logic levels with compliance to VCC. VOLUME 11 I DC voltage that sets the gain of the Class-D and VAROUT outputs. It achieves highdensity mounting and saves mounting costs. one Fast Blank (FB) input • integrated high-quality A/D converters and associated clamp and AGC circuits 31 TFT TV Service Manual 11/04/2006 . VPC3230D 11. Line level output for driving external HP amplifier. LLC Circuitry Picture Bus Luma (MSB) Picture Bus Luma Picture Bus Luma Picture Bus Luma Ground.. 1/16 or 1/36 of normal size) with 8-bit resolution • 15 predefined PIP display configurations and expert mode (fully programmable) • control interface for external field memory • I2C-bus interface • one 20.. 1/9. Luma Output Circuitry Supply Voltage. PQFP 80-pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 Pin Name Type Connection (if not used) Short Description B1/CB1IN G1/Y1IN R1/CR1IN B2/CB2IN G2/Y2IN R2/CR2IN ASGF FFRSTWIN VSUPCAP VSUPD GND D GNDCAP SCL SDA RESQ TEST VGAV YCOEQ FFIE FFWE FFRSTW FFRE FFOE CLK20 GNDPA VSUPPA LLC2 LLC1 VSUPLLC GNDLLC Y7 Y6 Y5 Y4 GNDY VSUPY Y3 Y2 Y1 Y0 C7 IN IN IN IN IN IN VREF VREF VREF VREF VREF VREF X LV or GND D X X X X X X X GND D GND D GNDD LV LV LV LV LV LV X X LV LV X X GND Y GND Y GNDY GND Y X X GNDY GND Y GND Y GND Y GNDC Blue1/Cb1 Analog Component Input Green1/Y1 Analog Component Input Read1/Cr1 Analog Component Input Blue2/Cb2 Analog Component Input Green2/Y2 Analog Component Input Read2/Cr2 Analog Component Input Analog Shield GND F FIFO Reset Write Input Digital Decoupling Circuitry Supply Voltage Supply Voltage. color saturation and tint for RGB/ YC r C b and CVBS/ S-VHS • high-quality soft mixer controlled by Fast Blank • PIP processing for four picture sizes (1/4.. brightness.15. Digital Circuitry Digital Decoupling Circuitry GND I 2C Bus Clock I 2C Bus Data Reset Input.25-MHz crystal.45 V Pin No.. Luma Output Circuitry Picture Bus Luma Picture Bus Luma Picture Bus Luma Picture Bus Luma (LSB) Picture Bus Chroma (MSB) IN OUT SUPPLYD SUPPLYD OUT IN/OUT IN/OUT IN IN IN IN OUT OUT OUT OUT OUT IN/OUT OUT OUT OUT IN/OUT SUPPLYD SUPPLYD OUT OUT OUT OUT SUPPLYD SUPPLYD OUT OUT OUT OUT OUT 32 TFT TV Service Manual 11/04/2006 . SUPPLYD = 3.3. data and sync. connect as described in circuit diagram SUPPLYA = 4.25 MHz Pad Decoupling Circuitry GND Pad Decoupling Circuitry Supply Voltage Double Clock Output Clock Output Supply Voltage. Digital Circuitry Ground..5. Active Low Test Pin. as well as non-linear horizontal scaling ‘Panorama-vision’ • PAL+ preprocessing • line-locked clock. connect to GND D VGAV Input Y/C Output Enable Input.25 V.25 . contrast. Pin Connections and Short Descriptions NC = not connected LV = if not used. LLC Circuitry Ground..31. 4). or 656-output interface • peaking.2.75. Active Low FIFO Input Enable FIFO Write Enable FIFO Reset Write/Read FIFO Read Enable FIFO Output Enable Main Clock output 20. few external components • 80-pin PQFP package 11. leave vacant X = obligatory.• multi-standard sync processing • linear horizontal scaling (0. Analog Front-End Analog Video Output Chroma/Analog Video 5 Input Video 1 Analog Input Video 2 Analog Input Video 3 Analog Input Video 4 Analog Input Supply Voltage. 2 and 5 respectively. Mode => Three items as a list. Sync Pad Circuitry Interlace Output Active Video Output Front Sync/ Horizontal Clamp Pulse/Front-End Horizontal Sync Output Main Sync/Horizontal Sync Pulse Vertical Sync Pulse Front End/Back-E nd Data/Front-End Vertical Sync Output Standby Supply Voltage CCU 5 MHz Clock Output Not Connected Analog Crystal Input Analog Shield GND F Ground. Picture Adjust Source => All possible sources given with the chasis as a list. Brightness => Slider Bar. Analog Front-End Reference Voltage Top. Analog I 2C Bus Address Select Signal Ground for Analog Input. first enter the MENU by pressing “ MENU” button and then press the digits 4. 7. Analog Component Inputs Front-End Ground. SERVICE MENU SETTINGS To enter the service menu.42 43 44 45 46 47 48 49 50 51 52 53 54 55 C6 C5 C4 VSUPC GNDC C3 C2 C1 C0 GNDSY VSUPSY INTLC AVO FSY/HC/HSYA OUT OUT OUT SUPPLYD SUPPLYD OUT OUT OUT OUT SUPPLYD SUPPLYD OUT OUT OUT GNDC GNDC GNDC X X GNDC GNDC GNDC GNDC X X LV LV LV 56 57 58 MSY/HS VS FPDAT/VSYA IN/OUT OUT IN/OUT LV LV LV 59 60 61 62 63 XTAL2 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 VSTBYY CLK5 NC XTAL1 OUT X ASGF GNDF VRT I2CSEL ISGND VSUPF VOUT CIN VIN1 VIN2 VIN3 VIN4 VSUPAI GNDAI VREF SUPPLYA OUT IN OCA urn typa sutlo atg l SUPPLYA OUTPUT IN SUPPLYA SUPPLYA OUT IN IN IN IN IN SUPPLYA SUPPLYA OUTPUT X X X X X X LV LV VRT VRT VRT VRT X X X 79 80 FB1IN AISGND IN SUPPLYA VREF X X LV LV or GND D X Picture Bus Chroma Picture Bus Chroma Picture Bus Chroma Supply Voltage. COOL. DYNAMIC. Changing value between 0 to 63. Chroma Output Circuitry Picture Bus Chroma Picture Bus Chroma Picture Bus Chroma Picture Bus Chroma (LSB) Ground Sync Pad Circuitry Supply Voltage. NATURAL. Analog Component Inputs Front-End Reference Voltage Top. NORMAL. connect to GNDF Supply Voltage. Chroma Output Circuitry Ground. 33 TFT TV Service Manual 11/04/2006 .1. Changing value between 0 to 63. WARM Contrast => Slider Bar. connect to GNDAI 12. Analog Component Inputs Front-End Fast Blank Input Signal Ground for Analog Component Inputs. CINEMA Colour Temp => Three items as a list. 12. 127 SCART VOLUME AVL OFF => If AVL OFF. Brightness. visible in sound menu. in the absence of an FM carrier the output is muted. Options Burn-In Mode => If ON.. G => Slider Bar. When TV is powered ON Green.. WARM) are determined for each source... ON/OFF Menu AVL => If ON. Menu Dynamic Bass => If ON. Power-Up Mode => Mode defines the TV set power on state.. CINEMA) and for each Colour Temp.40 Menu Equalizer => If ON. set value in this item is used as prescale value for the related standard. (R.3. Red is displayed in sequence until Menu button is pressed. G. “First APS” menu is displayed when the TV is switched on with the factory default settings. 0.COOL. AVL item is visible in sound menu. and AVL can be controlled from sound menu by normal user. 5. else Subwoofer is not available. FIRST APS => If ON. -30.. Carrier Mute => If ON.127 FM PRESCALE AVL OFF => If AVL OFF... else not. Subwoofer Level (dB) => This value is gain value of Subwoofer output in dB. SOUND 2 AVL => AVL is controlled from this menu by service user.. else invisible. 0.127 SCART VOLUME AVL ON => If AVL ON.Sharpness => Slider Bar. Changing value between 0 to 31. Blue. Menu Wide Sound => If ON. visible in sound menu.. Changing value between 0 to 31. Menu Headphone => If ON. Backlight => Slider Bar.. else invisible. else AVL is invisible to normal user. visible in sound menu. DYNAMIC. Colour => Slider Bar. set value in this item is used as prescale value for the related standard. visible in sound menu. Changing value between 0 to 31. visible in sound menu. 0.2. else invisible. (x10Hz) => Last low frequency value that is amplified.. In this menu preset values for each Mode (Contrast. SOUND1 Menu Subwoofe => If ON. 12. B values for each Colour Temp. else invisible..127 SCART PRESCALE AVL ON => If AVL ON. Changing value between 0 to 255. else invisible..127 12. Colour values for each Mode-NATURAL. and the item is visible in sound menu.. set value in this item is used as prescale value for the related standard. 0. Changing value between 0 to 31. seen in sound menu as 3D PANORAMA or VIRTUAL DOLBY. else invisible.. set value in this item is used as volume value for scart1 and scart2. set value in this item is used as prescale value for scart outputs. According to the selection. the volume of the TV is that value.4. AGC (dB) => Tuner AGC value.127 NICAM PRESCALE AVL OFF => If AVL OFF. APS Volume => After First APS function fini shes.127 SCART PRESCALE AVL OFF => If AVL OFF. Sharpness. set value in this item is used as prescale value for the related standard. Changing value between 0 to 99. Menu Effect => If ON. B => Slider Bar. Stand-by : When TV is ON set is in stand-by mode Normal : When TV is ON set is in normal mode Last State: When TV is ON set is in Last State mode 34 TFT TV Service Manual 11/04/2006 . 0. R => Slider Bar. 0. visible in sound menu.12 Subwoofer Corner Freq. Menu Virtual Dolby => If ON. 0..127 NICAM PRESCALE AVL ON => If AVL ON. NORMAL.. FM PRESCALE AVL ON => If AVL ON. Virtual Dolby Text => Active if VIRTUAL DOLBY is ON... set value in this item is used as volume value for scart1 and scart2. 12. set value in this item is used as prescale value for scart outputs. 0. Subwoofer option is available in TV set. PIP/PAP available else not. Menu Timeout is visible in Feature Menu else not.5. => Teletext Language may be controlled from this menu by service user. Backlight is visible in Feature Menu else not. supported. and the item is visible in source menu. Source TV SC1 SC2 SC2 SVHS SC3 SC3 SVHS YPBPR FAV SVHS HDMI PC This menu is related with the options of the chassis. Enter Flash Mode => Before uploading SW this mode must be selected. supported. => If ON. Reset Eeprom => Initialize default settings 12. 12. => If ON. else not supported => If ON. Fast Text feature is available else not. supported. else not supported. else not supported. Menu Teletext Language => If ON. => If ON. When OK is pressed on this item. => If ON. => If ON. => If ON. If ON. else not supported. supported. supported. else the source may be available but invisible to user. else not supported. Blue Background is visible in Feature Menu else not. and Teletext Language can be controlled from Feature Menu by normal user. supported.7. Menu Transparency is visible in Feature Menu else not. TV Norm BG DK I L LP M 12. Top Text feature is available else not.8. 35 TFT TV Service Manual 11/04/2006 . => If ON. => If ON. the source is available in TV set.9. => Dynamic White Balance Teletext TOP TXT Fast TXT Teletext Language => If ON. Features PIP/PAP Blue Background Menu Transparency Menu Timeout Backlight Single Tuner Dynamic WB 12. Menu Languages 1 & 2 The language options for the Language item in Feature menu can be set ON or OFF from this menu.Factory Reset => OK to activate. These items may be ON or OFF. => If TV set has one tuner Single Tuner must be ON. => If ON. 12. => If ON. Teletext Lan guage item is visible in Feature Menu. factory defaults loaded. else not supported. If TV set has double tuner Single Tuner must be OFF. => If ON.6. else Teletext Language is invisible to normal user. MAIN_R. BLOCK DIAGRAM MAIN BOARD AUDIO AMPL. AUDIO/VIDEO/GRAPHICS IN/OUT AUDIO AUDIO DECODING DECODING MSP3411G MSP3411G MICRONAS MICRONAS AUDIO AUDIO AMPLIFIER AMPLIFIER D-CLASS D-CLASS IDTV.MMC (RGB).GENERAL BLOCK DIAGRAM 13.SVHS.PC IN SVP-EX SVP-EX59 59 LVDS OUT VPC3230D VPC3230D VIDEO PROCESSOR VIDEO PROCESSOR PIP PICTURE PIP PICTURE MICRONAS MICRONAS HDMI DECODER HDMI DECODER SIL9993 SIL9993 8-BIT YUV SDA5550 SDA5550 MCU MCU MICRONAS MICRONAS 24 BIT RGB PSU PSU 2 . BOARD MAIN_L. I.432MHz VCC_5V 55 56 57 58 59 C1122 C1120 50V 4k7 R104 60 62 61 L1018 22u XTAL_OUT 12S_CL AUD_CL_OUT 3 SC3_AUDIO_R_OUT 56p BC858B VCC_5V IF1 11 IF1 VCCA_3V3 1p8 1k SIF1 23 C1198 IN1 12C_DA MSP3452G VIF2 R1068 2 C1197 1 C1130 C1138 50V 10u L1002 64 I2S_WS SF_63962 Z1000 C1057 2 C2008 1n SAW_SW2 GND 2 IN2 OUT2 5 1n 50V 12C_CL 22u 56p R1104 I2S_CL 390p 50V 3 IF2 10 1 50V 1k C1204 C1203 50V 100n 100n 50V 50V 100n R1028 C1202 OP2 22 C1201 3 OP1 50V 10u 22k C1005 100R D_CTR_I/O_1 33V_FILTERED 39p C1085 4R7 ADR_SEL SDA VCC_33V 10u 16V C1048 22k VCC5V_FILTERED R1128 100n 25V 33V_FILTERED S1008 1u AFC 21 10n 50V C1025 2k2 9 R1071 6k8 5k6 C1035 R1031 50V 10u R1000 VST 4 FMPLL C1006 8 R1022 R1011 NC/ADC VP 20 10n 50V C1024 C2007 AUDIO_R_OUT C1137 VCC5V_FILTERED 5 DEEM 7 22u SC1_AUDIO_R_OUT C1123 100R NC6 50V 10n VCC_5V VS R1070 50V 39p C1084 330R 100n 25V SCL R2200 47R 16V 100n C1195 VPLL 19 470n 63V C1029 C1011 C1002 50V 10u R1038 C1045 6 AFD 6 25V 100n NC C1037 C2200 Q2004 BC848B 100R 56p 100R C1042 C1028 C1113 100n 25V AGND18 TDA9885T Q2003 BC848B R2005 R1078 50V 1n5 33p 25V C1013 7 DGND QSS_TUN1 75R BC848B Q1003 50V 47u 33p 25V C1007 CTF5543_HOR TU1000 5 100R AUDIO_L_OUT C1128 R1025 CVBS17 C_CTR_I/O_0 8 AUD 220R 47R SDA R2006 12k R1042 470n 63V 4 FB_CONTROL VAGC16 63 9 TOP R2004 50V VCC_5V 22u C2006 SC3_AUDIO_L_OUT 4MHz 22p 25V 3 47k 10k REF 15 R1043 10 SDA VCC_5V 33p 25V 2 C1021 100R R1037 TUN2_CVBS X1000 C1036 SCL R1036 IC204 100R R1008 AS MAIN BOARD(17MB15E) TAGC14 C1034 TU 50V STANDBYQ 11 SCL R1032 33p 25V C1020 100R 1 1N4148 47u 50V NC 13 R1029 SDA AGC 12SIOMAD 100R R1004 SCL C2005 Q2001 BC848B R1013 N.L 16V 100n S2003 22u 330n C2031 6 R2013 S1005 R2020 1k 330n 8 10k OUTA IDTV/MMC/DVD_R_IN C2029 R2 24 C2016 K9356M L’ VDD SC2_AUDIO_R_IN 50V 330n C2030 7 BA591 R2019 1k 330n L2 7 220p 50V 4k7 C2027 3 Z1002 IN1 L1017 8V_FILTERED 47R 50V 1n C2028 C1124 R1 25 GND 2 IN2 OUT2 5 1 R1095 R1044 C2202 50V 100u L1 50V 1n 4 SIF2 24 IC201 SW01=H Q1011 SC2_AUDIO_R_OUT VIF1 BC848B 1n 1 8 IC209 R1100 C2014 1k OUT1 4 IN1 ADDR 26 330n 16V 1n 50V 22u 100u C1172 22u Q1009 C2015 1n 1 VS 5 R2012 PC_AUDIO_L_IN S1006 C2013 K3953M Z1001 C1056 3 C2012 1k SIF1 23 1k BC848B 50V 1n VIF2 R1096 1k 47p 1n 1n 50V 10u 16V C1049 S2001 R1092 C2026 S2009 R2011 SAW_SW1 2 GND OUT2 5 L1027 100n S2002 IDTV/MMC/DVD_L_IN SC3_AUDIO_L_IN 3 2 IN2 C2011 50V 1n S1007 1n VCC5V_FILTERED S2000 1k R1027 22k 390p 50V IF2 10 IF1 11 220R PL1001 R1040 C1047 R2201 50V 10n 22k R1023 OP2 22 6k8 33V_FILTERED 22u 4R7 SCL 8V_FILTERED 50V L1028 C1162 100R 100n 16V SC2_AUDIO_L_IN 100n 25V R1024 C1009 10n 50V C1027 2k2 C2010 R2010 VCC_5V 5k6 SCL 27 C1185 2n2 R1103 R1129 100R 22u 50V VCC5V_FILTERED C1041 CAPACITANCE K 2 4k7 C1136 R2018 2 K 2 C1165 C1178 C2025 C2009 D1000 HP_R C1151 47p AFC 21 3 OP1 1u C1043 50V 1n5 33p 25V C1012 10u C1003 50V 10u 4 FMPLL 9 C1004 150R VP 20 10n 50V C1026 SDA 28 C2201 VCC_5V 5 DEEM 50V 1u SDA R1041 220n 16V GND A 1 C1182 2n2 50V R2017 1 VPLL 19 470n 63V C1031 7 R1001 VST C1040 6 AFD 6 8 100n 50V 47u AGND18 C1030 R1012 NC/ADC C1196 IC2000 TDA9885T 16V 100u 50V 470p 100R 33p 25V C1008 VS 50V 1n C1117 IDTV/MMC/DVD_R_IN 2k2 BC848B Q1002 10u 50V C1150 R1035 47R CVBS17 7 DGND 100n NC 2 R1026 5 C1015 SDA IDTV/MMC/DVD_L_IN 3 HEADPHONE C1154 50V 1n5 BZT55C5V1 8 AUD 4 L1000 CTF5543_HOR SCL 1 8V_FILTERED C1126 100R 63V 50V 1n C1106 MAIN_L 4R7 R1130 50V 1n R1094 VAGC16 470n C1097 R1090 9 TOP 3 47k 4MHz REF 15 R1034 22p 25V C1039 10k X1001 75R 33p 25V 10 SDA C1038 MAIN_R 1 PL1003 S1000 AS 22n 50V TUN1_CVBS 100R VCC_5V 100R 2 C1023 TU 12k TAGC14 R1009 3 SUBW 33p 25V C1022 SDA 11 SCL 4 2 R1030 100R 50V R2202 R1005 SCL 1 R1039 2k2 1N4148 NC 13 IC205 12SIOMAD 100R 50V 1n C1114 1n MUTE_AMP 5 C1054 47u 50V C1010 R1010 R1114 AGC 560R R1052 C1112 L1001 4 C1118 R1050 15k R1048 BA591 HP_L 1n C1116 1n 100n 16V C1149 3u3 HP_R 75R R1051 10k 22n 50V Q1005 BC848B 4k7 R1122 10k C1145 C1087 470p 1kV 10p 25V BC848B SC3_AUDIO_L_IN C1163 RESETQ_MSP QSS_TUN1 C1052 R1049 SAW_SW2 R1121 Q1016 S2006 AHVSS 33 16 RESETQ 18DACA_L 47k C1191 BC848B S1010 R1123 AGNDC 34 15 NC3 C1055 Q1015 330n ESD 17DACA_R S2013 D1007 L1032 BA782 C1193 D1003 1n IF1 D1001 A 1 .C C1014 26R_100MHZ_1.DK.C C1177 BZT55C3V6 4R7 1 R2009 QSS_TUN2 C1125 56p 560p 330n R1069 R1127 OUT1 4 1k 50V 1p8 X1002 18.5A S2005 1k IDTV/MMC/DVD_L_IN 29 SC1_OUT_L S2010 30 CAPL_A AUDIO_L2 32CAPL_M 31AHVSUP 28 SC1_OUT_R 27 VREF1 26 SC2_OUT_L 25 SC2_OUT_R 24DACM_S 2D 3 ACM_SUB 22DACM_C 21DACM_L 20DACM_R 19 VREF2 2k4 100n 1n 50V C247 R2204 VCC5V_FILTERED 14 ROUT2 100R AUDIO_R2 1n 50V BLM21B201S 100R 100n 16V C295 C300 10u 10u C251 L1029 C1133 1n 50V 100R C1167 AUDIO_L_OUT C1183 1n C1180 100u C1181 10u C1184 2n2 R1112 47k R1102 10k R1101 3 2n2 C1168 C1159 50V 1u 5 INB+ VSS 4 HP_L 50V 22u C1132 10k R1113 SC2_AUDIO_L_OUT 100R R1097 4k7 R101 4k7 R100 S107 MUTE_AMP C255 HEADPHONE S108 PC_AUDIO_R_IN PC_AUDIO_L_IN L219 L218 4k7 MUTE_AMP S2010 & R2208 are for mute option Mute is active high 4k7 L216 R102 Q100 BC848B R103 LOUT4 17 LOUT3 15 INA+ 47k R1098 100R AUDIO_R_OUT 100u INB- 1 PL1002 2 L1030 50V 1n C1121 DAC_AOR ROUT4 18 ROUT3 16 3 VCC_8V 50V C1134 R1093 R1089 100R 100R 50V 1n C1119 1k C257 L2019 C254 50V 22u 13 LOUT2 C249 10k C1186 R1116 L2018 22u 50V 22u 100R 1u 16V R1115 R2023 BZT55C5V1 50V D1004 4n7 1n R2203 AUDIO_L2 C2036 330n 12 ROUT1 BLM21B201S 10n 50V R5 19 C2024 100R C2023 C2037 11 L0UT1 2 YPBPR_AUDIO_R_IN 50V 4n7 1n L2002 AUDIO_R 1n 50V 22u R2016 IF 1n 50V D1005 L1031 C2021 1k C2022 BLM21B201S AUDIO_L C1000 AUDIO_L_LINE_OUT 1n L2001 C1001 330n 330n INA- TDA1308 R2022 R4 20 10 L5 R2015 C1173 C1179 220p STBY_3V3 C2034 L4 C2020 1k C2019 C1189 16V 100n C2018 9 6 OUTB NC3 21 AUDIO_R_LINE_OUT C2017 1k BC848B C1187 NC2 330n Q1013 S2012 R1117 NC4 22 C2033 100R BA782 NC1 2 YPBPR_AUDIO_L_IN DAC_AOL 47k 1k PC_AUDIO_R_IN 3 R1119 R1118 D1002 1k 330n 1 R1120 SAW_SW1 10k 1 R2021 R3 23 100R L3 R1091 50V 1n OUT1 4 R2014 Q1014 C1188 50V 1n C2032 TEA6420 BC848B D1006 SC3_AUDIO_R_IN JK200 JACK-AK16 IF SW01=L BG.QSS_TUN2 L1003 50V 22u SC1_AUDIO_L_OUT I2S_DA_OUT Q1007 I2S_DA_IN1 100R R1124 K9356M SC1_IN_R 45 12S_DA_OUT SC1_IN_L 44 6 12S_DA_IN1 7 ADR_DA IC206 8 470R R1067 100n 16V C1194 1k R1126 R1125 C1192 10k 16V 1u Z1003 IN1 1k 1k R2008 SC1_AUDIO_R_IN 10u 330n L1022 R1105 C1174 1k SC1_AUDIO_L_IN 1n ASG1 43 ADR_WS ADR_CL 1N4148 270p 10 DVSUP 470p 50V 50V C1081 C1086 C1157 L1020 R1106 1k SC2_IN_R 42 AV_AUDIO_R_IN 1n 330n C1176 C1148 L1023 R1107 SC2_IN_L 41 1k AV_AUDIO_L_IN 1n 330n ASG2 40 C1170 L1021 R1108 C1158 AUDIO_R 1k SC3_IN_R 39 1n C1140 S2011 C1171 330n AUDIO_R2 L1024 R1110 SC3_IN_L 38 11 DVSS 1k AUDIO_L 1n SC3_AUDIO_R_IN 1n C1079 1n5 C1078 10u 50V VCC5V_FILTERED 330n C1147 1k IDTV/MMC/DVD_R_IN L1026 R1109 C1175 SC4_IN_L 35 14 NC2 50V S2007 SC4_IN_R 36 13 NC1 OUT1 4 L1025 R1111 C1164 22u S2008 C1153 330n ASG3 37 12 12S_DA_IN2 VCC_5V S1003 1 L1019 C1156 L1008 50V 10n 1k R2007 12S_WS 5 9 3 VCC5V_FILTERED C1152 1n5 AVSUP ANA_IN1+ ANA_IN- ANA_IN2+ 4 IC207 C1080 100u GND 2 IN2 OUT2 5 10u C1169 VREFTOP 46 IC208 2 K C1206 C1205 50V 100n C1199 50V 100n IC200 S1009 C1200 50V 100n SIF2 24 1n 50V C1166 AVSS 48 MONO_IN 47 470R 1 A VCC5V_FILTERED 100n 50V 50V 100n VIF1 C1144 49 50 51 52 53 54 XTAL_IN TESTEN TP NC4 NC5 100n N. C TXOUT3- TEA6415C TXOUT3+ 220n 16V BZT55C10 A 1 S647 OUTPUT4 16 S646 INPUT3 N.C 50V C297 C288 V8 CONNECT R201 SC2_V_OUT 1k 2 K PL205 75R 10k SVHS_Y_IN D2105 K 2 OUTPUT2 14 1 A PARITY PROG 2 K L2007 25 22 R237 S200 VCC_8V BZT55C10 A 1 SC2_B 23 V8 7 TXOUT0+ Q202 BC848B 10k R223 TXOUT1- 220n 16V N.C 2 4 C263 39p 2 K 1 A 5 A 1 NC1 BZT55C10 1n 50V 2 K 1 ST24LC21 2 1n L2008 SC2_AUDIO_L_OUT 150p C277 C264 9 35 150p D212 BZT55C10 1k SDA2 D215 R2025 R2024 L2003 L2005 D2002 K 2 D2001 S636 33 32 8 D209 IC215 SC3_V_OUT R2003 75R 39p N.C S642 1 Q200 BC848B S648 C282 4 SC1_V_IN S113 IC210 C274 VCCA_3V3 S112 5V S111 PANEL_VCC VCC_12V 100n 16V C294 C298 IDTV/MMC/DVD_CVBS R264 LG_1/IRQPDP V8 V8 75R 4R7 R229 10u 39p C304 VCCA_3V3 VCC_8V VIDEO SWITCH TEA6415C R279 VCCA_3V3 10k STBY_3V3 C290 RGB_SW3 gnd P 4 GND DDC_5V VCC_5V VCC 75R 4A 4Y 8 R209 75R 1 R210 PGAGND VGA_BIN VGA_GIN PL200 VGA_RIN PC_STBY 7 VCLK 9 NC1 1 Q208 BC848C NC2 2 DDC_CLK_PC 6 100R SCL NC3 3 R218 DDC_DATA_PC 100R 5 SDA VSS 4 R219 75R 2 10k R283 R281 100n 16V 10k Q7OUT 9 R208 9 PANEL_VCC_ON/OFF PORT EXPANDER VCCA_3V3 100n 16V VGA_VSIN 22R 7 GND ST24LC21 R238 3 VSS 8 MR 10 Q207 BC848C 8 5Y 10 22R 3Y Q7 IC212 3A 6 7 5A 11 SW_ENABLE 4 8 SHCP 11 10k 2Y R214 P5 10 Q6 R282 4 6Y 12 VGA_VSIN VGA_HSIN 5 7 P3 6 VCCA_3V3 10k 2A 5 6 RGB_SW1 STOP 12 D-SUB 15 PC INPUT & DDC CIRDUIT PC STAND-BY 47k P6 11 3 D201 74LVC14A PGAGND 7 6 P2 Q5 R284 LG_1/IRQPDP 8 RGB_SW2 22R 10k D2501 A 1 BZT55C12 K 2 P7 12 6A 13 R213 DDC_5V 9 5 P1 DISP_EN/PDWN 1Y C302 2 10 R259 4k7 4k7 4k7 R258 PCF8574 D200 1N4148 12 R257 INT 13 1N4148 DDC_DATA_PC 11 4 P0 VCC 14 13 R256 CHROMA_SW 1A R217 330R 1 R216 SCL 14 22R BZT55C12 A2 R215 14 K 2 3 S223 SCL2 4k7 R248 4k7 4k7 R246 R265 4k7 R277 R255 C289 330R D2502 SDA 15 A 1 A1 15 S649 STBY_3V3 2 VCCA_3V3 5 IC211 DDC_CLK_PC SDA2 74HC595D 2k R212 VDD 16 2k A0 R211 1 VGA_HSIN 100n 16V STBY_3V3 gnd S637 S650 IC213 VGA_VSIN gnd VCC_5V .C V8 39p 50V 75R C259 R200 C265 5 SVHSfromSC2_C A 1 50V 150p C2038 30 28 26 24 22 20 R222 TUN1_CVBS D2004 BZT55C10 K 2 29 27 25 23 21 19 17 13 9 11 7 5 3 1 15 18 GOES TO VPC3230 FOR PIP PICTURE 16 1k R241 14 100R 10k 10 OUTPUT5 17 12 CLOCK 8 4 6 47p 25V C287 100R SCL VxtoVPC R227 2 75R PL103 10k R221 D2000 BZT55C10 BZT55C10 A 1 R240 R207 SC3_V_OUT SC3_V_IN S640 Q203 BC848B 100R 220n 16V K 2 D2003 L2004 VCC_12V 150p OUTPUT6 18 SC3_AUDIO_L_OUT SDA_PANEL SCL_PANEL 4k7 R251 4k7 SC2_AUDIO_R_OUT K 2 R260 INPUT2 R249 PANEL_VCC C2039 R226 3 39p 50V R250 VCCA_3V3 R239 10k CPU_GO R220 N.13 D2101 2 K 50V 1n C301 50V 150p C270 BZT55C10 1 A L211 4 L212 5 L2006 6 7 PIN8_SC2 D205 10 A 1 R288 K 2 BZT55C5V1 D2100 D207 TV_LINK 11 75R 75R R290 12 D222 BZT55C10 C258 50V 4n7 R289 2 K 13 SC2_R S204 C2049 L206 SVHSfromSC2_C 15 S205 C293 100n 150p 16V 16 150p 17 C248 C267 A 1 19 330R K 2 D213 50V C253 2 K 150p C278 SC1_AUDIO_R_IN SC1_AUDIO_L_OUT BZT55C10 21 150p 50V 1 A A 1 D2500 150p SC1_AUDIO_L_IN SC1_B 1 A D211 SC2_V_IN C286 SC1_AUDIO_R_OUT D220 PIN8_SC1 R276 20 R254 2 K BZT55C10 D224 1 A D218 18 D2102 BZT55C10 2 K BZT55C10 75R VCCA_3V3 SCSDA 330R L210 K 2 C269 1 A SC1_G 2 K C296 50V 4n7 SC2_FB R275 SC2_V_OUT L205 R287 A 1 75R K 2 D202 D204 1n D206 SCSCL SC1_R SC1_FB SC1_V_OUT SC1_V_IN SC2_G 1 A S652 R271 4k7 D208 S651 SEL S633 VCC 16 2 Q2 Q0 15 3 Q3 DSERIAL 14 4 Q4 OE 13 100n 100n C2053 Q1 100n 100n 1 C281 R280 S634 C2052 C2051 Q206 BC848C 47k STBY_5V IC214 C_SELECTED R269 100n 16V DIMMING SELECTION R273 R274 10k Q205 BC848C 220n 16V SVHSfromSC2_C CHROMA_SW EXTERNAL INPUT C246 47k R268 220n 16V MMC_G 6 MMC_B MMC_R 5 4 3 S213 MMC_CVBS 2 1n 50V C272 PL1 1 AV_AUDIO_L_IN Q204 BC848C 100R CIN DVD_12V_SENSE C271 1n 8 R270 C2050 AV_AUDIO_R_IN C245 1k MMC/DVD VIDEO INPUTS L202 4n7 C266 D203 2 K K 2 21 L208 K 2 C261 75R 18k R266 R267 C262 10k CIN 6 L201 VCC_5V S635 2 K 7 19 2 K R261 5 SVHS_Y_IN R232 20 17 1 A S220 BZT55C10 75R 2 K D219 SDA R286 S221 SCL2 CHROMA SWITCH 2 K D216 1 2 15 1 A D210 150p 50V K 2 4 1 A 1 A A 1 75R 42 18 1 A 2 K SCL_PANEL VSS 1 A SC2_AUDIO_L_IN 8 11 2 K C250 V8 5 40 16 2 K SCL 6 1 220n SC3_AUDIO_R_IN 3 9 1 A D214 AV1_V_IN D217 41 38 14 A 1 NC3 SDA_PANEL D223 75R 7 S644 IDTV/MMC/DVD_CVBS BZT55C10 2 K L214 2 K 12 75R 3 8 VCLK 1 A BZT55C5V1 1 A 39 36 75R 3 330R 37 34 10 7 R285 NC2 VCC 1 A D2103 N.C R203 220n 16V DISP_EN/PDWN MAIN PICTURE TO SVP R235 S638 INPUT8 20 VCCA_3V3 S109 INPUT1 N.C S201 39p 50V 75R C280 R205 AV1_V_IN TXOUT1+ 100R TXOUT2- OUTPUT3 15 TXOUT2+ INPUT4 TXCLKOUT- R230 6 TXCLKOUT+ C279 N.C R231 C276 75R S212 A 1 SC3_AUDIO_R_OUT SC3_AUDIO_L_IN PIN8_SC3 A 1 TXOUT0- 3 R2002 MMC_CVBS PL201 4n7 C2045 C2042 50V 150p C252 TUN2_CVBS 220n 16V N.C 75R C292 PDP_GO/BL_ON_OFF 330R GND2 19 S643 DATA V8 2 C260 SC2_V_IN R204 CVBS_SVP 1k 330R L203 C284 1 A SDA 47p 25V C303 100R K 2 PL203 S641 75R R206 D221 BZT55C10 S639 39p 50V 75R C285 220n 16V A 1 N.C 75R I2C BUFFER FOR PANEL VCC_5V R202 39p 50V C268 SC3_V_IN 31 30 6 K 2 INPUT7 11 SC2_AUDIO_R_IN L204 Q2000 BC848B 100R 220n 16V 29 28 4 1 SC1_V_OUT C275 C291 C2040 1k R2001 10 INPUT6 26 2 GND1 12 220n 16V C273 C299 50V 22u C283 16V 100u VCC_8V VCC R253 330R R1045 R225 L200 L209 14 75R 9 4n7 C2044 50V 1n R1046 BC848B 4n7 50V 150k 100R 10k L207 BZT55C10 1 A R252 50V 1n OUTPUT1 13 220n 16V D2104 L213 LVDS OUTPUT R242 Q1004 R1033 24 27 75R INPUT5 SELECTABLE VIDEO OUT FOR SCART 2 S645 75R R224 8 39p N. VCC_5V DHS_2EX 10k L313 41 BACK LEFT 51 GNDSY 49 52 VSUPSY C1 53 INTLC 50 54 AVO C0 55 C7 C6 Y0 40 66 VRT Y1 39 67 I2CSEL Y2 38 68 ISGND Y3 37 69 VSUPF VSUPY 36 5 E L 12 SC2_G 6 F K 11 7 G 1 0J 8 H I SC1_FB SC2_FB FB_VPC SC1_B SC2_B 9 RGB_B_VPC DIN[0] 8 2 R2 7 R3 6 DIN[3] 4 R4 5 C344 VCCD2_3V3 DIN[0-23] JK304 BLM21B201S R AUDIO FAV GNDY 35 70 VOUT C361 NC14 100n 16V R323 33R 1 Y4 34 71 CIN 75R 2 Y5 33 8 R2 3 VPC323XD 73 VIN2 7 DIN[6] 1n 75R Y6 32 R3 6 DIN[7] 680n 22 SVP ENTEGRESINE DIN[5] IC216 72 VINI R306 R1 DIN[4] 1n C322 R305 4 Y7 31 74 VIN3 R4 5 GNDLLC 30 75 VIN4 75R 77 GNDAI FFRE FFOE CLK20 78 VREF 22 23 24 R300 76 VSUPAI 10u 50V N.25MHz 50V 1n5 BLM21B201S C318 R316 C332 50V 3p3 50V 3p3 C330 AUDIO_L_LINE_OUT AUDIO_R_LINE_OUT 33R BLM21B201S YPBPR_AUDIO_R_IN YPBPR_AUDIO_L_IN R2031 16V 220n BLM21B201S C319 SCL 44 C4 C333 25V 2n2 10u 50V C331 RESETQ_MSP 35 36 37 38 L308 VCC_5V 34 4 39 100n 25V 33R R317 BLM21B201S I2S_WS L2009 I2S_CL 5 R4 6 R3 3 40 41 43 42 44 VCC_5V C2048 10n 50V RGB_SW3 R2032 BLM21B201S 10u 50V C2047 IC316 VCCD2_3V3 L2010 STBY_5V VCCD_3V3 16V 100n I2S_DA_OUT I2S_DA_IN1 R2 2 7 R2028 10R R1 8 1 100R 100R DVS_2EX C2046 SDA R2027 R2026 SCL S303 VCCD2_3V3 VSUPLLC 29 L315 VCCD2_3V3 BLM21B201S LLC1 28 R321 LLC2 27 22R CLK_2EX B2/CB2IN G2/Y2IN R2/CR2IN ASGF1 NC1 VSUPCAP VSUPD GNDD GNDCAP SCL SDA RESQ TEST VGAV YCOEQ FFIE FFWE 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 B O 15 3 C S314 N 14 RIN2 4 D M 13 E L 12 6 F K 11 VGA_GIN 7 G 1 0J 8 H I RCA_PB GIN2 BIN2 VGA&YPbPr SWITCHING 9 S337 VGA_BIN S336 S307 330p 50V C309 N.C D106 BAV99 MMC_B IC318 A S340 C334 C328 N.C R2029 C347 O 15 C N 14 R320 100R R319 100R 100n 16V B 3 SC1_FB C337 220n 16V N.C 4 D SC1_G 5 E SC2_G 6 F 7 G 1 0J 8 H I S310 50V 1n5 M 13 PI5V330_SOIC L 12 K 11 SC1_B C335 C338 16V 100n SC2_B S311 16V 220n C336 C339 RGB_GIN 9 S312 RGB_RIN FB C326 75R 220n 16V S308 2 SC2_R VCC_5V RGB_BIN 220n 16V MMC_R 5 R 16 C325 75R R311 PI5V330_SOIC RCA_Y R310 MMC_G VCCD2_3V3 VGA_RIN N.C C352 50V 330p C311 4 RCA_PB 75R R331 C356 220p C365 1 50V 2 3 C364 220n 3 Pr 1 JK300 WHITE_FAV A A JK301 WHITE_FAV Pb 30032234 A Y 30032233 JK302 1P_RED_FAV 220n R1/CR1IN RCA_Y C363 3 220n SUBW G1/Y1IN AUDIO_L_LINE_OUT S326 4 B1/CB1IN S316 2 FB_VPC 1 3 GNDPA 25 80 AISGND 4k R312 2 50V 1n5 AUDIO_R_LINE_OUT S325 C345 VSUPPA 26 79 FB1IN 1 10k PL301 RGB SWITCHING FOR SVP . D104 BAV99 R325 1k RGB_R_VPC D102 BAV99 25V 47n RGB_SW1 1k SCART RGB VCC_5V 75R 75R R333 C358 S301 C327 R332 C357 50V 220p 220p 50V R313 RCA_PR 2 3 1 IC317 16V 220n RGB_B_VPC 50V 330p C312 2 N.C 330p 50V 2 S309 220n 16V L312 330p 50V C308 VCC_5V R 16 C324 75R C310 A MMC RGB INPUTS RCA_PR C353 1 100n 1k C342 SDA3 C329 R309 R326 50V 390p RX1_RST# 16V 220n 25V 560p BLM21B201S N.C bu caplerin yerine tek 100nf takabilirsin.C RGB_SW2 1 SC1_R SC2_FB RGB_G_VPC 50V 330p C313 R318 100R 50V 270p 16V 220n SCL3 N.C 47n 25V C316 C305 C306 1n8 50V 390p 220n 16V C349 C348 C350 16V 100u VCC_5V VCC_5V C346 R307 L300 FFRSTW NC13 R1 DIN[2] 75R 21 1 3 R304 20 19 18 SC1_G R322 33R 65 GNDF 21 I2S_DEL_IN4 I2S_DEL_IN3 I2S_DEL_IN2 DVSS2 17 M 13 DIN[1] 75R 16 N 14 D L2011 JK303 NC15 23 DVSUP2 I2S_DEL_OUT4 C 4 RGB SWITCHING FOR VPC C321 15 3 RGB_G_VPC CIN 1 VxtoVPC 3 SVHSfromSC2_C C323 NC16 24 10 NC10 FSY/HC BZT55C10 A 1 2 L AUDIO FAV I2S_DEL_OUT3 SC2_R K 2 D226 L317 BLM21A601S C360 470p 50V C359 470p 50V L316 BLM21A601S BZT55C10 D225 A 1 25V 47n BACK RIGHT 1 56 NC17 25 I2S_DEL_OUT2 O 15 45 L314 VSUPC BLM21B201S 50V 68n MSY/HS NC9 3 57 9 14 B C341 VS NC18 26 2 58 NC8 NC19 27 FPDAT 8 10u 50V NC20 28 MAD4868A 59 NC7 VSTBY 7 IC2001 60 NC6 CLK5 6 61 NC21 29 NC2 NC5 62 5 XTAL1 NC22 30 64 NC4 63 4 ASGF2 NC23 31 XTAL2 NC3 C317 K 2 3 13 2 100n 42 43 C5 S302 46 47 C3 48 22R 22R C340 R315 S324 S323 S330 S331 RESETQ TEST DVSS1 DVSUP1 I2S_DEL_WS I2S_DEL_CL I2S_DEL_IN1 I2S_DEL_OUT1 NC24 32 A SDA NC2 NC12 SC1_R VCC_5V C343 2 12 R 16 C320 NC1 11 NC11 A NC25 33 1 A ADR_SEL VCCD2_3V3 50V 1n5 50V 390p 1 1k PI5V330_SOIC 25V 47n GNDC X300 C362 R2030 RGB_R_VPC C2 L311 20. 5A VCCA_3V3 VCCA_3V3 10k PAVDD2 C415 MAIN RGB INPUT R423 VSSH4 R418 50V 20p PAVDD1 75R R405 XTALO 14.5A 150R 600mA lik ferit L408 PAVDD L402 VL1_8 C2236 100n C2235 C432 16V 10u 100n 16V C458 26R_100MHZ_1.31818MHz X400 PB_B1 100n 16V C408 1 75R R404 S427 VDDMQ_2V5 98 VDDH3 50V 20p C414 RGB_BIN VSSH3 XTALI 100n 16V C407 99 C460 256 RGB_RIN PAVSS DQS[2] C442 255 PR_R1 VDDC3 C456 DQS[3] 100 VSSC3 PAVDD 18 S426 DIN23 PDVSS 254 PAVDD PDVDD DQS[1] DQS[1] 100n 16V 253 DIN22 PWM PDVDD VDDC13 SDA VD1_8 252 DIN21 V5SF C409 VSSC13 16V 100n 100n 16V 251 DIN20 DQS[0] MD[12] 101 MD0 AIN_N3 100n 250 102 VSSC4 Y_G2 249 100n MD1 AIN_N2 248 Y_G2 75R R403 100n 16V MD2 Y_G1 100n 16V 103 100n 247 RGB_GIN AIN_N1 MD[13] DQM[3] C452 246 Y_G1 100n 16V Y_G1 104 VDDM1 17 S425 MD3 CVBS3 245 C406 CVBS2 DQM[2] VREFN_1 244 S438 CVBS3 DQM0 C448 105 VSSM1 CVBS1 MD[14] 100n 16V 243 CVBS2 106 C2234 242 VD1_8 107 VDDM2 VREFP_1 16 S439 DQS0 VREFN_1 241 VREFP_1 AVSS_ADC1 SDA_EX VREFN_1 VSSM2 DQM[1] MD[15] C457 240 AVDD_ADC1 DQM[0] MA[11] 108 VDDM3 SCL 75R R402 239 109 MD5 MD4 MD[31] 110 100n 16V 238 S441 AVDD_ADC1 MA[10] VSSM3 CVBS_OUTN MD[29] MD[30] 111 MD6 CVBS_OUTP 237 MD[28] VD1_8 MA[9] VDDC4 AVSS3_BG_ASS 236 75R MD7 AVDD3_AVSP2 235 R427 C PB_B2 234 AVDD3_AVSP2 100n 16V MD8 PB_B1 233 PB_B2 VREFP_2 MD[27] MA[8] 112 MD9 VSSC5 16V 113 MD10 VREFN_2 100n 114 MA[7] 100n 16V C2242 232 PB_B1 115 MD[26] 100n 16V 231 C CVBS3 CVBS_SVP 230 VREFP_2 100n 16V SVP_EX_51 AVSS_ADC2 229 VREFN_2 75R C402 S431 CVBS2 R400 CVBS_SVP 116 VDDM4 AVDD_ADC2 228 C400 MA[6] C446 100n 16V 227 AVDD_ADC2 MD[25] MA[5] 117 MD11 15 MAIN PICTURE 118 DQM1 PR_R2 MD[24] 100n 16V 100n 16V C2233 226 PR_R2 MD[23] MA[4] C447 119 VSSM4 PR_R1 R420 75R R401 225 PR_R1 IC224 VREFP_3 MD[21] MD[22] 120 VDDM5 VREFN_3 224 VREFP_3 MD[20] 121 100n 16V C2241 223 VREFN_3 100n AVSS_ADC3 SCL_EX C DQS1 MA[3] C451 222 S430 189 AVDD_ADC3 122 C469 221 AVDD_ADC3 VSSM5 RESET R244 INT 14 5 R4 MD12 MLF1 C_SELECTED 4 MPUCSON VDDM6 MPUCSON 220 100R MD13 ALE 219 INT# C401 WR 218 6 R3 ALE_EMU VSSM6 13 C411 MD14 RD 217 7 R2 3 VDDC5 VSSC11 C422 2 WR_EMU VDDC11 MA[2] 100n 16V C2232 216 MD15 MD[18] MD[19] 123 100n 16V 215 100n VD1_8 ADDR7 RST_H 8 R1 MA11 TESTMODE 1 RD_EMU VSSC6 ADDR6 AIN_VS 5 ADDR5 12 R4 MA10 R419 4 214 ADDR4 AIN_HS MCA[7] MA9 VDDC1 R243 100R ADDR3 MD[17] 124 C2240 213 6 VDDC6 11 75R R3 ADDR2 10 3 MA8 MA[1] 10u 212 ADDR1 125 C2239 211 7 MA7 22R R2 MCA[6] VSSM7 ADDR0 22R 2 PR_R2 100n 16V VSSH5 MA[0] 100n 210 MCA[5] MA6 126 100n 209 8 VDDH5 VGA_VSIN C405 R1 MA5 VGA_HSIN 1 208 A_D7 VSSC1 R228 100R MA4 VDDM7 MD[16] 127 C466 206 5 207 MCA[4] RIN2 R4 VSSM8 MD[15] VDDL C2238 205 4 MA3 128 100n 204 STBY_3V3 MCA[3] PC&YPbPr INPUT R408 6 VSSC12 A_D6 203 5 MA2 PAVSS2 R3 75R R407 3 R4 VDDC12 9 4 MCA[2] 100n 16V VDDM8 A_D5 202 MCAD[7] MA1 8 7 A_D2 A_D4 201 6 MA0 7 R2 199 200 3 A_D1 A_D3 198 MCAD[6] MD[14] VSSL PLF2 2 197 7 MD[13] VDDMQ_2V5 6 8 R2 R3 PB_B2 8 MD[12] A_D0 PAVDD2 MCA[0-19] 2 MCA[1] C404 BIN2 R1 196 MCAD[5] R233 100R 1 R1 MD[11] VDDL PAVSS1 MCAD[4] 195 VD1_8 MD[9] MPUGPIO0 194 5 R234 100R 1 MCA[0] R4 100n 16V 4 MD[8] MD[10] C2237 193 MCAD[3] C413 MCAD[0-7] 100n 16V 75R R406 Y_G2 6 5 R3 MLF1 C403 GIN2 2 3 MPUGPIO4 MCAD[2] 190 191 7 4 R2 3 2 MPUGPIO3 MCAD[1] MPUGPIO2 8 NC R1 MPUGPIO1 1 PAVDD1 MCAD[0] 192 MD[7] S411 R236 100R C463 16V 10u 100n 16V C455 100n 16V C428 100n 16V DIGITAL IDTV INPUTS [ITU 601] VL1_8 100n 16V C2219 6 R3 S437 L407 100n 16V C2218 7 R2 4 C418 12 11 10 9 8 7 6 5 4 3 2 1 PL104 2n7 50V 100n 16V C2217 8 R1 ODD_PINK 10k C2216 1 3 C425 26R_100MHZ_1.CS0# RAS# CAS# WE# VD1_8 100n C435 100n C434 1Y VCC 4 5 GND 1B 2 3 1A 1 CLKE BA0 BA1 5 VDDMQ_2V5 R434 C470 C471 100n 16V 100n 16V DVS_2EX 1k MCLK0 MCLK0# VCCA_3V3 4 MVREF 33R R2215 MD[16] MD[17] MD[18] MD[19] DQS[2] DQM[2] MD[20] MD[21] MD[22] MD[23] MD[24] MD[25] MD[26] MD[27] DQS[3] DQM[3] MD[28] MD[29] MD[30] MD[31] 5 R4 R4 6 3 R3 7 8 100n R2 100n 16V R1 33R 2 R2216 1 16V 100n C424 R2213 VD1_8 MPUGPIO4 C459 MD[0] MD[1] MD[2] C437 MD[3] MD[4] MCA[14] 100n 16V S413 MD[5] MD[6] MCA[15] 129 130 131 132 133 134 VSSM9 MCK0 MCK0_ VSSM10 CS1 CS0_ VDDM9 135 93 MD[9] C449 MD[8] 100n 16V 90 MD[7] DQM[0-3] DQS[0-3] DIN[9] 89 DIN[10] MD[6] DIN[11] 87 DIN[0-23] 88 DIN[12] 86 MD[5] DIN[13] 85 DIN[14] 84 MD[4] DIN[15] 83 DIN[16] 82 DQS[0] DIN[17] 81 DIN[18] 80 DIN[19] 79 DQM[0] 78 DIN[20] MD[3] DIN[21] 77 VDDMQ_2V5 76 MD[2] 75 MD[1] 74 73 DIN[22] DIN[23] MD[0] 72 DIN[20] 71 DIN[21] 70 DIN[22] 69 DIN[23] 68 VD1_8 67 66 65 VREFN_3 VREFP_3 VREFN_2 VREFP_2 DIN0 VREFP_1 VDDH 2u2 AVDD_ADC3 L404 C445 16V 10u CLK_2EX 100n 16V C2231 S440 100n 16V C429 C427 VDDH L406 L409 C468 16V 10u 100n 16V 100n 16V C465 100n 16V C2230 100n 16V C2229 100n 16V C2227 TXCLKOUT- C2228 VA1_8 26R_100MHZ_1.5A 100n 16V 10u VA1_8 C454 TXCLKOUT- AVDD_ADC1 AVDD_ADC2 10k R2212 TXCLKOUT+ 10k R2211 26R_100MHZ_1.5A 74LX1G86STR R2214 VD1_8 DIN[0] DIN[1] DIN[2] DIN[3] DIN[4] DIN[5] 10k R433 PDVDD VD1_8 STBY_3V3 DIN[0] DIN[1] DIN[2] DIN[3] DIN[4] DIN[5] DIN[6] 22R DIN[7] R432 C443 16V 10u 100n 16V 100n 16V C2211 100n 16V C2210 100n 16V C2209 100n 16V C2208 C439 C2207 22R PLF2 IC107 2 DIN[6] R436 R429 22R 22R PAVDD2 S110 2n7 50V R430 R431 C438 MLF1 DIN[7] 10k C444 16V 10u 100n 16V 100n 16V C2205 100n 16V C2204 100n 16V C2203 100n 16V C440 C2206 R2210 VDDMQ_2V5 VDDMQ_2V5 22R DHS_2EX VL1_8 R435 ODD_PINK CLK_2EX PAVDD1 .5A VD1_8 VCCA_3V3 TXCLKOUT+ DE_2EX SC2_FB_SVP 100n 100n 16V C467 100n 16V C462 100n 16V C450 DIN[0] DIN[1] DIN[2] DIN[3] DIN[4] DIN[5] DIN[6] DIN[7] DIN[8] DIN[9] DIN[8] VD1_8 33R R2217 DIN[10] DIN[11] DIN[12] DIN[13] DIN[14] DIN[15] DIN[16] DIN[17] DIN[18] DIN[19] MA[0-11] DIN[6] DIN[7] 91 33R 100n VCCA_3V3 100n 16V C2226 100n 16V C2225 DIN[5] 92 64 DIN1 63 DIN2 DIN3 62 61 DIN4 DIN6 DIN5 60 59 DIN7 58 57 DIN9 CLK DIN8 56 55 54 DIN10 DIN11 53 52 VSSH2 VDDH2 51 DIN12 50 49 DIN13 DIN15 DIN14 48 47 DIN16 46 DIN17 45 44 DIN18 DIN19 43 VDDC2 VSSC2 42 41 40 GPO VCCA_3V3 TXOUT0- TXOUT0+ TXOUT1- TXOUT1+ TXOUT2- TXOUT2+ TXCLKOUT- TXCLKOUT+ TXOUT3- MD[10] 10k R422 39 TA1+ LVDSVDDP TA1- 38 37 TB1- 36 LVDSVCC TB1+ 35 34 LVDSGND 33 TC1- 32 31 TC1+ TCLK+ TCLK- 30 29 TD1- 28 TD1+ 27 26 TXOUT3+ DIN[4] 94 100n 16V 136 VDDM10 138 137 RAS CAS VDDR 139 140 141 VSSR MVREF 142 WE VDDC7 143 144 CLKE 146 145 BA0 BA1 VSSC7 147 MD16 148 149 VDDC8 151 150 MD17 152 MD18 VSSM11 VDDM11 153 155 154 MD19 156 DQS2 VSSM12 VDDM12 157 VSSM13 158 159 MD20 DQM2 160 VDDM13 161 162 MD21 164 163 MD22 MD23 VSSC8 165 MD24 166 167 VDDC9 168 169 MD26 MD25 PLL_GND DE PLL_VCC 25 DIN[3] 95 VA1_8 AVDD3_AVSP2 100n 16V S445 DIN[2] MD[11] VCCA_3V3 C2224 FB Q401 BC848B C2223 C423 16V 10u 100n 16V 100n 16V C421 100n 16V C2222 100n 16V C2254 100n 16V C2221 C2220 S442 24 23 V H VSSH1 21 22 DVS_2EX DHS_2EX DIGITAL SINC STBY_5V SC2_FB_SVP C473 68p C412 68p C410 1R VCCA_3V3 96 C436 S415 PWM2 1N4148 D101 R440 L400 DQM[1] C426 100n 16V C430 150R 600mA lik ferit VDDH Q402 BC848B SCL3 10p 68R VSSM14 170 171 172 MD27 VSSM15 VDDM14 173 174 FLD_IO VDDH1 20 19 VDDH PARITY 4k7 VD1_8 1k R414 SCL_EX DIN[0] DIN[1] 97 R2218 100n 16V 100n 1k R439 SDA3 C472 R413 68R LVDS OUT FB_CONTROL R428 STBY_3V3 DQS3 VDDM15 175 176 177 MD28 DQM3 VSSM16 VDDM16 178 179 180 MD29 182 181 MD30 183 MD31 VSSC9 VDDC10 184 185 VDDH4 VSSC10 186 187 188 10k 1k R426 MPUGPIO4 R424 MPUCSON SDA_EX C420 C2404 100n 16V 16V 10u C2403 100n 16V C2402 100n 16V 100n 16V C2401 VD1_8 C2400 C433 16V 10u 100n 16V 100n 16V C431 100n 16V C2215 100n 16V C2214 100n 16V C2213 C2212 L401 16V 100n VDDL 10k R425 PLF2 26R_100MHZ_1. VDDMQ_2V5_FLT VCCA_2V5_FLT 100n 50V 4n7 C502 C525 50V 4n7 DDQS3 1u 50V 7 C516 82 120 123 134 122 15 116 129 131 130 135 124 46 VDD_D10 30 31 VDD_C7 94 70 58 99 87 106 VDDQ_J10 VDDQ_H10 VDDQ_F10 VDDQ_E10 VDDQ_J3 63 VDDQ_F3 VDDQ_H3 51 VDDQ_E3 VDDQ_D11 47 23 38 VDDQ_D2 21 VDDQ_B9 VDDQ_B7 VDD_C6 C521 50V 4n7 111 92 C530 16V 100n 91 90 C506 50V 4n7 89 80 C529 16V 100n 79 78 C507 25V 10n 77 68 C528 16V 100n 67 66 C508 25V 10n 65 56 C527 16V 100n 55 54 C509 53 45 25V 10n 43 40 C510 25V 10n 104 103 101 C511 117 112 105 C503 16V 100n C512 25V 10n C2253 16V 100n C513 25V 10n C2252 93 88 81 16V 100n C514 25V 10n MCLK0 R504 10R C526 L501 10n 25V 5 R505 C2250 16V 100n C520 R2208 10R MCLK0# C2251 16V 100n C519 25V 10n MCLK01 R2209 4 MD[0] 25V 10n 100 R4 6 MD[1] 3 R3 7 R2 MD[2] 2 8 R511 10R R1 1 5 MD[3] MD[4] 4 R4 6 3 MD[5] 2 MD[6] MD[7] R3 8 7 5 R4 R509 10R 1 R1 R2 6 R3 MD[8] MD[9] MD[10] C504 16V 100n 102 C500 4 7 3 8 R2 2 R507 10R R1 1 MD[11] C515 16V 100n 42 VSSQ_G4 VSSQ_F9 114 76 1 73 DDQS0 DDQS1 2 98 97 85 86 61 62 49 50 37 25 26 4 13 5 74 DQM[0] 5 R4 DQM[1] 6 R3 MD[12] MD[13] MD[14] C531 16V 100n 115 4 7 R2 2 3 8 R506 10R R1 6 DQM[3] VSSQ_F4 DQM[2] 1 VDDQ_B11 VSSQ_G9 DQM[1] MD[15] 19 16 18 VDDQ_B6 VDDQ_B4 144 14 VDDQ_B2 DQS1_G12 84 12 DM1_G11 DQS3_A12 83 11 DQ8_J12 DM3_A11 108 107 DQ10_H12 DQ9_J11 96 72 71 60 59 48 95 DQ11_H11 DQ12_F12 DQ13_F11 DQ14_E12 DQ15_E11 VSSQ_H4 A0_M4 DQM[0] DQM[0-3] DQ24_D12 A1_M5 69 136 VSSQ_J4 64 MA[0] VSSQ_H9 A2_L5 VSSQ_E9 137 VSQ_J9 A3_M6 57 MA[1] A4_M7 VSSQ_E4 125 VSSQ_D8 138 MA[2] VSS_K4 52 MA[3] A5_L8 VSSQ_D5 139 VSS_K9 44 MA[4] VSS_J5 A6_M8 41 128 A7_M9 VSSQ_C10 MA[5] VSS_J6 A8/AP_M10 34 140 VSSQ_C9 141 MA[6] VSS_J7 VSSQ_C8 MA[7] A9_L7 33 142 VSS_J8 32 MA[8] VSS_D4 A10_K5 VSSQ_C5 127 VSS_D6 A11_L6 VSSQ_C4 MA[9] BA1_L4 29 113 28 126 MA[10] VSS_D7 DQ0_A6 33R MA[0-11] R521 33R R520 33R MA[11] BA0_M3 VSSQ_C3 R519 VSS_E5 27 BA1 VSS_E6 VSS_D9 VSSQ_A10 33R VSS_E7 CS-_M1 VSSQ_A3 R518 VSS_F5 VSS_E8 RAS-_L1 NC_L12 BA0 5 R4 EM6A9320 IC1 3 4 CS0# 133 6 R3 VSS_F6 CAS-_K1 121 3 RAS# VSS_F7 CK-_L11 WE-_K2 109 7 R2 NC_L9 CKE_M11 110 2 CAS# VSS_F8 CK_L10 143 33R VSS_G5 NC_K8 10 CLKE NC_B3 132 R517 8 R1 VSS_G6 DQS2_G1 R503 1 WE# NC_G3 DQS0_A1 DDQS3 VSS_G7 DM2_G2 15R NC_L2 DM0_A2 MCLK01 R516 VSS_G8 DQ23_J2 DQS[3] DDQS2 VSS_H5 NC_M2 DQ22_J1 15R 75 NC_L3 DQ21_H1 R515 VSS_H6 DQ20_H2 DQS[2] NC_K11 DQ19_F1 DDQS1 MCLK01# VSS_H7 17 DQS[0-3] 15R NC_K12 DQ18_F2 R514 VSS_H8 DQ17_E1 DQS[1] VDD_K3 NC_G10 DQ16_E2 DDQS0 NC_B10 DQ7_D1 15R 119 VDD_K6 DQ6_C1 R513 VDD_K7 DQ31_A7 DQ5_C2 DQS[0] DQ30_B8 39 118 MCLK01# BLM21B201S 22 VDD_K10 C522 50V 4n7 BLM21B201S 7 5 R4 VDD_D3 DQ29_A8 DQ4_B1 4 C532 16V 100n DQ28_A9 DQ3_A4 MD[16] 16V 100n 47R 20 100u 16V C523 50V 4n7 47R 8 6 R3 DQ2_A5 3 VREF_M12 9 MD[17] DQ25_C12 7 R2 DQ1_B5 2 36 24 8 R1 MD[18] DQ26_C11 DQ27_B12 5 R4 R502 10R 1 35 6 R3 MD[20] MD[19] C524 50V 4n7 L500 3 VCCA_2V5 R2 MD[21] 4 VCCA_2V5_FLT VDDMQ_2V5_FLT 1k C501 1u 100u 16V 1k VDDMQ_2V5 2 DDQS2 8 R1 MD[22] DQM[3] DQM[2] MD[0-31] 1 C505 R512 5 R501 10R MD[23] R510 10R R508 C518 MD[24] R4 100n C517 1 8 7 6 R3 6 3 5 MD[25] 4 MVREF VDDMQ_2V5_FLT MD[31] MD[30] 2 R1 R2 R2 7 R3 2 R4 MD[26] 3 8 R1 4 1 MD[29] MD[28] R500 10R MD[27] . 3V_FLT A13 28 STBY_3V3 1 A0 MCA[5] 4k7 IC218 2 DQ6 20 MCA[1] A1 DQ5 19 MCA[6] 8 VCC SDA3 24LC32A DQ4 18 G 24 7 WP 3 DQ3 17 13 DQ0 A2 MCAD[6] MCAD[5] MCAD[4] M29W040B SCL MCAD[6] MCAD[5] MCAD[4] MCAD[3] CORRESPONDS TO Winbound W27E040 EPROM & ST M29F040 Flash 4 60 VSS 16 S623 MCA[16] MCA[17] MCA[18] MCA[19] STBY_3V3 10k BSN20 Q603 WR_EMU R2305 BSN20 Q602 59 MCAD[3] DQ2 15 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 FL_A14 SCL R600 ALE_EMU MCAD[2] IC219 VSS SDA3 58 MCAD[2] A3 57 RST# NC5 NC6 NC7 A14 29 SDA 10k STBY_3V3 A4 6 SCL3 C603 100u 16V 10k S6317 SRAM_WE DQ1 12 A0 14 11 A1 56 MCAD[1] MCA[0] 54 MCAD[1] 10 A2 55 WR_EMU MCA[2] 53 S6318 A5 NVM_WP R610 52 50 NC4 NC3 A9 A10 A11 A12 A13 A14 I/O5 I/O6 A6 SCL2 R607 51 49 RD_EMU 22 21 20 A8 A7 A6 A5 WE I/O4 I/O3 9 SRAM_WE MCA[0] 48 MCAD[0] SRAM_OE PSEN_UP FL_OE MCA[15] MCA[14] MCA[13] MCA[12] MCA[11] MCA[10] MCA[9] MCA[8] MCA[9] 19 18 17 16 15 14 13 MCA[1] 47 S6319 S6320 MCA[15] MCA[14] MCA[13] MCA[12] MCA[11] MCA[10] MCA[9] MCAD[7] MCAD[6] MCAD[5] MCAD[4] MCA[9] S624 VCC1 VSS1 I/O7 I/O8 OE A15 A16 A17 A18 NC8 NC9 NC10 K6R4008V1C-I/C-P VSS VCC I/O2 I/O1 CS MCA[2] 46 44 42 40 38 36 34 32 30 28 26 MCA[8] MCAD[7] MCAD[6] MCAD[5] MCAD[4] MCAD[3] MCAD[2] MCAD[1] MCAD[0] MCA[8] MCA[7] MCA[6] MCA[5] MCAD[3] MCAD[2] 12 11 10 9 8 A4 MCA[3] 45 43 41 39 37 35 33 31 29 27 25 24 22 20 18 MCAD[3] MCAD[2] MCAD[1] MCAD[0] MCA[8] MCA[7] MCA[6] MCA[5] MCAD[1] MCAD[0] MCA[15] 7 A3 8 5 SDA STBY_3V3 23 21 19 17 16 14 12 10 MCA[16] MCA[17] MCA[18] MCA[19] MCAD[3] MCAD[2] MCAD[1] MCAD[0] MCA[15] MCA[4] 6 A2 A1 A0 MCA[3] SDA2 R601 VCCA_3V3 S6316 MCA[7] MCA[6] MCA[5] MCA[4] 15 13 11 9 MCA[16] MCA[17] MCA[18] MCA[19] 19 Q7 MCA[4] MCA[3] 5 4 3 NC2 NC1 MCA[4] R611 10k 7 100R R6010 10k 6 STBY_5V R6007 MCA[7] MCA[6] MCA[5] MCA[4] MCA[3] MCA[2] MCA[1] MCA[0] 8 6 4 2 20 VCC MCA[14] MCA[3] MCA[2] MCA[1] MCA[0] C600 R606 Q601 S606 Q605 100R Q600 47k MCA[3] MCA[2] MCA[1] MCA[0] 7 5 3 1 PL607 1 CLK MCA[15] MCA[16] MCA[2] MCA[1] MCA[0] 2 1 MCA[5] A7 S602 100R Q604 R6011 4k7 MCA[6] S603 100R R6006 SCL3 SCSDA SCSCL S6315 R604 R6005 4k7 S605 STBY_3V3 PL600 1 2 2 I0 MCA[14] 3 I1 MCA[15] MCA[16] FL_WE CIRCUIT OF SW UPDATE FROM SCART2 S6311 R6015 S6312 STBY_5V STBY_5V S6310 IR 3 FL_A16 4 FL_A17 Q2 14 S6300 FL_A14 5 Q1 13 SRAM_OE BC848B Q6007 BC848B Q6006 Q0 12 Q4 16 22k R6018 OE 11 Q3 15 LED1 GAL_IAP SRAM_WE LED2 22R GAL16LV8 Q5 17 R6019 R412 100n 16V VCC_5V C419 I6 IC622 FL_OE 22k S414 I5 8 GND S621 7 10 I7 WR_EMU I4 C417 9 S620 16V 100u RD_EMU 4k7 STBY_3V3 MCA[7] R1 PWM R416 6 C416 MCA[19] 50V 10u I3 Q6 18 FL_A16 R2 S412 1k2 5 STBY_3V3 5 MCA[18] R3 R415 MCA[18] 100n 16V MCA[7] R1 I2 C601 R2 4 16V 100n R3 SRAM_OE C605 R4 PWM2 MCA[17] STBY_3V3 R4 IC217 STBY_3V3 BLM21B201S L609 VCCD_3V3 Q6011 BC848B 1 2 RST# 25V 100n 6MHz FL_A17 C623 X600 RST# R693 VCCD_3V3 PWM R691 4k7 STBY_3V3 R6014 UP_RXD STBY_3V3 LED1 P3_5 36 100n PROTECT LED2 P3_2 33 C633 R692 SDA_TVLINK 4k7 IR UP_TXD R6039 SC2_FB FB S6313 .3V_FLT R2302 VDD3_3_1 40 25V 100n 30 29 28 27 26 25 MCA[4] MCA[11] MCA[5] MCA[3] 81 A8 RST 50 3 82 A6 P4_3 49 4 83 A9 P4_2 48 INT# 1 84 A5 P1_6 47 GAL_IAP 2 85 A11 P1_5 46 UP_IRQ 3 86 A4 P1_4 45 NVM_WP 4 87 ALE P1_3 44 SCL3 88 PSEN P1_2 43 SDA3 P1_1 42 PORT P2_3 P2_2 HS_SSC VS PDP_GO1/BL_ON_OFF 2 P2_1 NC MCA[6] Q2301 P2_0 24 SDA5550M S6314 VSSA 97 A0 23 4k7 S613 VDDA2_5 P3_4 35 22 P1_0 41 4k7 CVBS MCA[9] 47k C621 S614 5 R6040 96 D7 21 91 VSS3 68 67 66 65 A18 A19 NC5 RD 51 52 NC1 53 XTAL2 54 NC2 XTAL1 55 VSSA1 56 69 A16 VDDA2_5_1 70 A17 6 5 R3 R4 4 MCA[19] MCA[18] MCA[16] MCA[17] 75R R686 75R R685 75R R684 R687 100k 33p 50V C627 C624 50V 33p 4k7 R640 61 62 63 64 R676 4k7 C631 25V 100n L604 NC3 P1_7 NC4 WR RD_EMU 7 R2 2 3 8 R639 10R R1 1 MCA[15] MCA[14] MCA[12] MCA[13] STBY_2V5 1k BLANK_COR R6042 100n C615 STBY_3V3 MCA[19] MCA[18] MCA[16] MCA[17] STBY_2V5 VCCD3.3V_FLT BC848B STBY_2V5 3k9 C620 R657 3k9 R661 C622 R656 25V 100n 1k 22u 50V R655 R697 15k 20 19 18 17 16 P0_6 P0_5 P0_4 IC220 15k S615 S610 15 14 13 P0_3 95 FL_CE R654 C607 L603 R698 4k7 4k7 12 89 A3 Q2300 S608 15k SDA3 STBY_2V5 DVD_12V_SENSE R696 R695 15k C608 RST_H 100R R2304 C611 22u 4k7 MCAD[7] STBY_2V5 L601 R694 76 A14 C612 Q2299 STBY_3V3 47R 77 A12 R4 6 7 8 MCA[18] MCA[12] 4k7 PIN8_SC2 SW_ENABLE 75 79 4 R3 R2 2 3 R629 10R R1 MCA[12] MCAD[4] MCAD[5] MCAD[6] MCAD[7] R632 BC848B 4k7 25V 100n PIN8_SC1 SCL3 4k7 90 A10 CPU_GO1/STBY SCL2 RX1_INT S607 R690 92 VDD3_3_3 RX1_RST# SDA2 MUTE_AMP PSEN_UP 22u 50V R6031 R4 P0_2 4 11 MCAD[5] 47R MCAD[5] 1 MCA[10] MCA[11] MCA[12] MCA[13] 100n 25V AC_INFO R3 P0_1 3 10 MCAD[0] 78 25V 100n 4k7 MCAD[0] R2 4k7 2 C609 R6013 R689 MCAD[6] R6030 MCAD[6] R1 P0_0 R624 10R VDD3_3 1 9 MCAD[7] A7 FL_WE 8 10R R625 A13 S604 4k7 MCAD[7] STBY_3V3 1 VDD3_3_2 MCA[8] VSS 8 80 31 30 W A17 MCAD[4] MCAD[5] MCAD[6] MCAD[7] MCA[14] FL_A15 7 MCA[0] 2 R688 MCA[0] 7 3 VDD2_5 MCA[1] 6 6 MCA[1] 4 XROM MCA[10] FL_RST 1 32 2 A16 A18 3 A15 VCC 4 A12 MCA[10] MCA[11] MCA[12] MCA[13] MCA[14] MCA[16] MCA[17] MCA[18] MCA[19] 100n 25V SCL2 S622 ALE_EMU D3 MCA[2] 5 R4 5 MCA[2] R626 10R 4 MCA[10] 5 1 PSEN_UP 8 MCA[3] MCAD[3] MCAD[7] C610 100n 16V SDA2 L600 E 22 R3 D2 DQ7 21 6 D4 MCAD[0] MCA[5] R2 3 MCA[10] R1 2 MCA[10] 7 2 MCA[11] 3 A10 23 MCA[4] 8 7 FL_OE R4 MCAD[3] MCA[11] 5 6 A11 25 MCA[9] MCAD[2] MCA[9] R3 MCAD[2] MCA[11] 6 MCAD[4] A9 26 MCA[6] R2 STBY_3V3 D1 MCA[8] 7 1 MCA[9] MCA[8] 1 4 A8 27 10R 4k7 5 R627 MCAD[4] 10R MCA[13] R1 R628 MCA[7] 8 R6036 MCAD[1] MCAD[1] MCA[4] MCA[7] R6035 MCA[8] C606 MCA[13] 25V 100n VCCD3.3V_FLT MCA[15] 3LM809 IC221 R2301 PIN8_SC3 EXTIF OCF STOP ENE P0_7 71 72 A15 73 FL_PGM 74 VDD2_5_1 VSS2 5 MCA[14] MCA[12] MCA[13] STBY_3V3 TV_LINK 100n STBY_3V3 25V 100n R 57 59 58 B 60 S601 G 4k7 R648 STBY_3V3 4k7 R6043 STBY_3V3 VCCD3.22R Q400 BC337 BRT_CNTL 220R BRIGHTNESS CONTROL VCCA_2V5 R417 R6016 220R STBY_5V SCL LEVEL SHIFTER E2 SDA STBY_3V3 16V 100n C604 VCCA_3V3 PDP_GO1/BL_ON_OFF R6037 S600 R6038 1k 1k BZT55C5V1 2 LOC_KEY 1 PL606 3 D600 PL604 1 2 UP_IRQ UP_RXD UP_TXD FL_A15 C613 PDP_GO/BL_ON_OFF CPU_GO BC848B UART SOCKET FOR IDTV PL308 S629 S628 1 2 S627 3 4 3k9 R660 P3_3 34 4k7 8 98 D6 7 6 VCCA_2V5 99 D0 P3_1 32 100 D5 P3_0 31 Q6010 BC848B LOC_KEY 25V 100n Q6008 BC848B MMC_IR GIRISI CPU_GO1/STBY PL605 Q6009 1 2 VCC_8V R2306 100R IR 100R 25V 100n C626 C628 100n 25V PC_STBY SDA_TVLINK R653 C625 3k9 BLM21B201S STBY_5V TV-LINK R2300 2k7 R2303 10k STBY_3V3 P3_6 37 47k P3_7 38 94 A1 BC848B VSS1 39 HDMI_CEC 93 A2 4k7 R6044 4k7 R6041 4k7 R6017 R682 4k7 R681 4k7 R680 4k7 4k7 R679 C630 VCCD3. IC3000 LM1117 P1_5V 1 S1 1 100R 52 3 D2 10k R2069 4 S2 C3005 100n 16V AMP_PIN7 AUDIO_AGND 2n7 50V C2100 100k DIN[23] DIN[22] DIN[21] DIN[20] DIN[19] DIN[16] DIN[7] DIN[6] DIN[5] 5 R4 5 560R R2091 R4 10u 50V 20k AUDIO_AVCC5 51 25V 100n AUDIO_AGND Q15 49 R4 95 AVCC3 1 97 RX2+ OVCC PGND2 PVCC2 PLLIN 21 22 23 24 3 SDO 30 SPDIF 29 OGND1 28 98 AGND5 AGND_SII 99 GND4 VCC_SII 100 VCC4 MCLKIN 27 R3 4 R4 7 2n7 50V DAC_WS 6 DAC_SD0 OGND_SII R2041 33R 33R AUDIO_AGND VCC_5V 330R_100MHZ_3A OGND_SII BZT55C5V6 K 2 D2020 S804 5 5k6 5 AOUTL SN74CB3Q3305 S807 HDMI_CEC 2B 6 2 5A S806 CEC SDATA DEM/SCLK LRCK MCLK 1 2 3 4 DAC_SCK DAC_WS DAC_MCLK A4 10k 4 R2095 1B 27k R2096 0VCC_SII 4k7 R2038 VCC_SII VCC_5V S808 3 2OE 7 DAC_SD0 IC2006 HDMI_3V3 VCC1 17 RSVDO2 GND1 16 20 ANBPB 15 RSVDO1 DACVCCB 14 19 DACGNDB 13 RSVDL1 ANGY 12 GND_SII HDMI_3V3 S809 1A 8 BZT55C5V6 P1_EVCC5 1N5817 2 A8 D2023 10R A 1 1n 50V 1n 50V C2087 100n 25V C2086 100n 25V C2085 C2084 0VCC_SII C2083 HDMI_3V3 C2065 HDMI_3V3_PLL D2021 R2071 P1_CBL5V S803 1OE D2022 GND_SII 1 C2064 100n 25V 1N5817 S802 C2066 pin8 P1_5V 1n 50V 1n 50V C2082 100n 25V C2081 100n 25V C2080 C2079 C2078 VCC_SII 16V 10u HDMI_3V3 close to IC2014 Q1 2N7002 S801 C2067 330k 10u 16V Place cap.s AUDIO_AGND C2063 50V 10u R2086 C2094 25V 47n R2097 L2017 AGND_SII 25V 10u 3k9 R2039 L2013 S800 TOCOMP Place close to pins 22&23 AUDIO_AVCC5 330R_100MHZ_3A 1n 50V 100n 25V C2077 100n 25V C2076 C2075 C2074 16V 10u 100n 25V C2073 VCC_5V 10n 25V C2061 chip as possible 60R_100MHZ_3A S805 L2016 AVCC_SII D DAC_MCLK compact and as close to 50V 1n C2062 25V 100n C2060 60R_100MHZ_3A 270k 270k Place PLL circuit as Close to pin9 L2015 18 DACVCCG COMP 8 11 ANRPR 7 TOCOMP RSET DACVCCR 6 DACGNDG DACGNDR 5 9 NC2 4 10 NC1 3 1n 100R DACGND 2 C2059 R2035 DACVCC 1 1n 100n C2058 100n C2057 C2056 C2055 10u 100n 25V C2054 RX1_AVCC3 60R_100MHZ_3A HDMI_3V3 R2074 25V 100n MCLKOUT 26 HDMI_3V3 L2012 4 10u 50V R2073 R2040 AUDIO_AGND 2n7 50V C2095 5 8 GND_SII R2 DAC_SCK AGND 96 RX2- 2 AUDIO_AGND 8 CS4334 2 WS 31 R1 C2097 AOUTR AVCC_SII 1 R2076 3 SCK 32 2k32 94 AGND4 DHS_2EX R2075 AGND_SII S810 33R R2042 33R 3u3 50V 4 HSYNC 33 2k32 93 AVCC2 C2089 C2088 AVCC_SII 1k2 4k7 R2043 S811 2n7 50V 3u3 50V VSYNC 34 92 RX1+ 6 R2085 2n7 50V DVS_2EX 2k32 DE_2EX 33R R2083 33R R2044 R2082 DE 35 91 RX1S812 C2096 S813 AUDIO_AGND AUDIO_AGND R2045 7 C2098 C2090 2k32 5 R4 R2084 4 Q23 36 90 AGND3 6 R3 1k2 Q22 37 R2079 NC3 7 R2 3 AUDIO_AVCC5 8 AGND_SII 89 AVCC1 2 VA AVCC_SII Q21 38 8 R1 AUDIO_AGND 9 IC2002 SII9993 88 AGND2 AGND_SII 25 11 R2046 33R 1 7 VCC_SII Q20 39 5k6 VCC2 40 87 RX0+ R2078 86 RX0S814 AUDIO_AGND 270p 50V 4k7 GND_SII AUDIO_AGND GND2 41 2n7 50V 85 AGND1 AGND_SII S815 12 PL2001 E MC33202 C2092 S816 CEC C2093 560R 5 C2091 Q19 42 84 RXC+ 14 4 AMP_PIN7 DAC_AOL S817 50V 10u R2081 AMP_PIN6 6 R3 AMP_PIN3 Q18 43 R2077 83 RXC- P1_DDC_SCL C 7 R2 3 100k Q17 44 82 AVCC 3 8 R1 R2080 2 B R2047 33R 1 OGND_SII 2 33R 1 OGND2 45 A ODCK 46 81 EXT_RES AVCC_SII 5 6 7 H 0VCC_SII AUDIO_AGND OVCC2 47 AUDIO_AVCC5 47k 6 Q16 48 79 PGND1 33R MC33202 78 OGND5 80 PVCC1 RX1_AVCC3 10 R2090 AMP_PIN3 77 DSCL G 8 Q14 50 47k 270p 50V F Q13 Q6 Q5 Q4 Q3 VCC3 GND3 OVCC4 OGND4 Q2 Q1 Q0 INT RESET RSVDL2 CSCL C2099 76 DSDA R2089 100n 25V IC2008 OGND_SII P1_CBL5V P1_DDC_SDA AUDIO_AGND 10u 50V C2104 C2102 R2048 17 C2103 R2094 P1_HPD AUDIO_AGND 4 R3 3 R2 R2087 AMP_PIN6 7 2 6 R2049 33R R1 8 0VCC_SII 1 4 6 3 OVCC3 R3 56 DIN[4] DIN[3] DIN[2] DIN[1] 58 57 OGND3 7 OGND_SII 60 61 62 R2 Q8 Q7 R2050 33R 1 R1 8 5 4 R4 6 R3 3 7 R2 2 R2051 33R 1 R1 8 63 VCC_SII 64 GND_SII 65 2 DIN[0] DIN[15] 59 DIN[14] DIN[13] DIN[12] DIN[11] 6 5 R4 R3 4 3 R2 2 7 R2052 33R R1 8 1 0VCC_SII 67 68 69 70 71 RX1_RST# 4k7 72 73 RX1_INT SCL3 74 R2053 S819 S818 75 DSDA DSCL 16V 10u C3009 100u 16V C2101 DAC_AOR CLK_2EX 100n 25V C2071 1n 50V 13 C3008 100n 16V AUDIO_AGND CSDA L2014 60R_100MHZ_3A Place close to pins 79&80 10u 50V C2070 OGND_SII 56R 66 R2065 P1_DDC_SDA C2069 TP100 DIN[9] 56R DIN[10] P1_DDC_SCL SDA3 5 DIN[8] R2064 HDMI_3V3_PLL SDA R2088 AUDIO_AGND DIN[0-23] SCL 6 C2068 15 HDMI_3V3 4 S2 25V 100n 16 2 WP 7 24LC02 18 C3004 100u 16V IC3001 LM1117 VCC_5V DSCL SW_ENABLE D2 53 55 G2 5 Q9 G1 54 47k R2063 2 R2098 3 19 C3003 100n 16V SOGUTULMALI DIN[18] VSS RX1_RST# DIN[17] 4 G2 5 Q12 A2 HDMI_3V3_PLL R2068 6 Q11 3 D1 G1 UPA672T Q2 BC848B 8 S1 2 4k7 Q10 A1 C3006 100u 16V IN OUT 3 GND VOUT C3007 1 4 100n 16V 2 REGULATORLAR COK IYI MUMKUN OLDUGUNCA 9993 E YAKIN OLMALILAR IC2003 2 P1_HPD 4k7 R2062 100n 25V C2072 24LC02 VCC 6 UPA672T VCC_5V A0 C3000 100n 16V DSDA IC2012 1 D1 C3001 100u 16V IN OUT 3 GND VOUT C3002 1 4 100n 16V VCC_5V 470k R2067 470k P1_EVCC5 R2066 IC2013 1k R2070 HDMI_3V3 AUDIO_AGND . C 330R 1N4007 R911 R915 FDC642P 4 1R R924 D902 120R 10k 1N4007 3 VDDMQ_2V5 C922 100n 16V STBY_2V5 2 50V 22u D901 C918 16V 100n 1N4007 PDP_GO/BL_ON_OFF A_DIM_PWM R909 C915 100n 16V D900 1N4148 C919 100u 16V 1 C917 C931 16V 100u L912 C902 1 C943 L924 3 VIN VOUT2 GND 470R PL901 D910 VCC_8V 47u R901 N.3 SOT 223 L905 L923 L913 2 1N4007 IC902 +12V 3 10u STBY_2V5 2 D906 C920 1 16V 220u 16V 220u C914 C916 100n 16V IC904 1N4007 L907 100n 50V L900 4 C908 3 C906 16V 1000u L920 L901 R918 5 1 SW. 8 GND VCC 5 VCC_12V D912 VCC_5V 1N4148 56k R921 R908 D908 10k 1N4148 VCC_5V 22u D909 2k2 R910 1. 100p C944 10k 10k 1N4148 5k6 BC858B Q901 PROTECT 12 CAP. 2 EMITTER DRI. 4 D907 R912 R903 11 47u 50V C909 1k 10 10k 9 C910 100n 16V 3 56p 10k R902 R914 VCC_8V 3k3 R922 1 C904 100n 16V R907 L904 8 47u 50V C901 7 SENSE 7 MC34063A R917 C942 R916 STBY_3V3 3 IN OUT2 ADJ L903 100R LM317 IC900 L902 6 R920 1 S904 STBY_3V3 VCCD_3V3 100n ON/OFF 5 C939 100n 16V 16V 100u C936 10k C940 100n 16V 16V 100u C937 L916 C941 16V 100u 100n 16V C938 C930 22u C929 100u 22u 100n 16V 1_8VMAIN C926 100n 16V C913 C911 VA1_8 16V 1000u SS33 STPS745 D904 22u BRT_CNTL S901 D911 A_DIM_PWM C928 100n 16V 22u L910 16V 100u 1_8VMAIN 22uH_3.C 56p 1N4148 CS52015-3 IC901 470R 22u C935 100n 100n C934 100n C933 R900 STBY_3V3 C912 16V 1000u 100n C932 22u C903 N.9A_SMD S900 DIG_DIM_PWM C927 VD1_8 C924 C905 1_8VMAIN L914 330R 10u 16V Q903 S902 R904 L911 VL1_8 S912 160R 22u 16V 100u VCCD_3V3 D915 R905 L908 16V 100u 100n 16V C925 22u 1.C .1 PL904 2 3 4 L918 VCC_12V PL903 VCC_5V 1 S908 PANEL_VCC1 VCCA_3V3 2 S909 STBY_3V3 7 6 5 4 3 2 1 PL902 L917 VCCA_3V3 S910 3 LG_1/IRQPDP STBY_5V PDP_GO1/BL_ON_OFF 4 L906 MMC SUPPLY VCC_12V 5V C900 AC_INFO 16V 100u 5V PL900 L909 STBY_5V N.8V_ON/OFF VCC_12V R925 C947 L915 1_8VMAIN 9 10 D913 3 FEEDBACK 4 SAP 30030067 ADJ TYPE S913 PORT 1N4148 GND 3 S911 47u 50V C921 OUTPUT 2 8 VCC_12V VIN 7 S905 1N4007 6 VCCA_3V3 D914 VCC_33V LM2576 1 5 PROTECT CPU_GO1/STBY BLM21B201S Q902 L922 C923 100n 16V 6 VCCA_2V5 2 1 D903 1 IC903 3LD1117 PANEL_VCC_ON/OFF R923 IC223 5 BLM21B201S 4 SOT 223 2 S907 VCC_33V SEL PANEL_VCC 10u C946 L921 DIG_DIM_PWM PANEL_VCC1 120R R913 STBY_2V5 470R N.8V_ON/OFF R919 C945 VCCA_3V3 L919 6k8 Q900 BC848B 100R 6 COMP.COL.C S903 STBY_5V D905 FAN1616AS-3.COLL. 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HP_R 3 4 3 4 HEADPHONE 4n7 50V C108 100p 50V D106 D107 BZT55C10 LINE_OUT_SUB C109 100p 50V 3 D108 BZT55C10 LINE_OUT_L L119 2 1 2 D109 BZT55C10 C110 100p 50V 600R_100MHZ_200mA 600R_100MHZ_200mA 1 L120 3 L117 2 600R_100MHZ_200mA 600R_100MHZ_200mA 4 1 2 PHJACK L118 5 8 7 3 6 9 JK103 WHITE_FAV R106 L115 BZT55C10 600R_100MHZ_200mA 600R_100MHZ_200mA L116 600R_100MHZ_200mA L113 1 R105 R104 600R_100MHZ_200mA 4n7 50V HP_L HP_L L114 C107 HP_L 2 2 R103 600R_100MHZ_200mA 600R_100MHZ_200mA C106 HEADPHONE 1 1 HP_R L111 100p 50V BZT55C10 L112 D105 HP_R 4 R102 600R_100MHZ_200mA L110 C105 PL101 LINE_OUT_SUB 3 12 LINE_OUT_SUB HEADPHONE A PL105 LINE_OUT_L 2 11 LINE_OUT_R LINE_OUT_L PL102 1 10 100p 50V LINE_OUT_R C104 9 FRONT_AUDIO_L L108 BZT55C10 600R_100MHZ_200mA 600R_100MHZ_200mA L109 D104 8 R101 3 8 FRONT_AUDIO_L 2 FRONT_AUDIO_L 7 FRONT_AUDIO_R SVHS_Y SVHS_C A 7 6 5 R108 R107 1 6 5 4 3 4 2 JK102 1P_RED_FAV FRONT_AUDIO_R FRONT_VIDEO 4 3 100p 50V R110 C103 3 SVHS_Y 2 BZT55C10 2 L106 D103 600R_100MHZ_200mA 600R_100MHZ_200mA L107 2 R109 R100 33p 50V FRONT_AUDIO_R A SVHS_C FRONT_VIDEO C102 1 1 PL100 L104 BZT55C10 600R_100MHZ_200mA 600R_100MHZ_200mA L105 D102 3 1 FRONT_VIDEO 3 1 2 PL104 S101 L102 600R_100MHZ_200mA 600R_100MHZ_200mA C101 1 33p 50V L103 BZT55C10 S100 C100 D101 PL103 BZT55C10 600R_100MHZ_200mA 600R_100MHZ_200mA L100 D100 SVHS_C SVHS_Y 33p 50V L101 JK100 4P JK101 YELLOW_FAV JK104 JK105 WHITE_FAV JK106 WHITE_FAV JK107 1P_RED_FAV A A A 3 1 LINE_OUT_R . C C780 L729 C807 4 C808 3 12 2 REFGND C826 C820 25V 1000u 100n 25V HIGH=ON C821 35V 470u 1 C823 S739 100n 25V Q715 BC848B 22u PL700 12k R765 15V_AUD C787 15V_AUD 1u C790 1u R746 18k 1u L727 R771 R773 S730 R745 33k opsiyonel MUTE_3V3 1u 22k C822 25V 1000u loop mumkun oldugu 1u R755 1k8 S723 SS33 STPS745 D904 D901 22u R754 L904 MAIN_OUT_L FEED BACK CAPASITORDEN SONRA ALINACAK C791 1k S724 MAIN_OUT_R BU TERMINALLERE GROUND MSP DEN GELECEK C789 R770 22uH_3.9A_SMD kadar kisa olacak++ 3 2 1 PL701 5 ON/OFF 4 FEEDBACK 3 GND 1 VIN 2 OUTPUT LM2576 .isinin transferi icin 50V 50V 120k 100n 220p C779 ROSC 27 AGND1 R742 1u 16V C792 25 BSLP 26 C794 50V 10n 24 VCLAMPL L722 15V_AUD C817 1 48 PVCCL1 BSLN L721 C816 470n 63V L725 BSRN 14 13 C793 50V 10n 22uN. vcc 5v R767 50V 10n MODE_OUT VCLAMPR 36 35 MODE 34 C776 AVCC 33 VAROUTR 32 VAROUTL 31 AGND2 AVDD 29 30 COSC 28 vialarla alt layerdaki ground a birlestirilecek ve stencil pinlere mumkun oldugunca yakin olacak PL707 1 2 15V_AUD IC nin PCB ye temas ettigi yer .IC708 L109 5 4 BU TERMINALLERE GROUND MSP DEN GELECEK C788 1k 3k3 1 3 RINP 2 4 V2P5 RINN 5 LINP SD_NOT 6 7 AVDDREF LINN 8 9 VREF 10 VARMAX VARDIFF 11 VOLUME LOW=OFF 15V_AUD 15 PVCCL2 PVCCR3 46 16 LOUTN1 ROUTN2 45 50V 10n 47 15V_AUD 50R_100MHZ_3A ROUTP2 41 LOUTP2 ROUTP1 40uH 40 22 PVCCL3 PVCCR2 39 23 PVCCL4 PVCCR1 38 BSRP 37 470n 63V C805 C785 L719 L724 50R_100MHZ_3A 40uH 470n 63V LOUTP1 21 C806 20 L726 C786 42 PGNDL2 50V 1n PGNDR1 19 PL703 1 50V 1n 43 C784 PGNDR2 40uH L718 100n 25V IC702 100n 25V25V 220u TPA3004D2 C814 PGNDL1 44 C782 C813 18 ROUTN1 50V 100n LOUTN2 C783 100n 50V C802 C796 PL702 17 50R_100MHZ_3A 50V 100n 100n 50V C801 220u 25V C803 C795 100n 25V 50V 1n 50V 1n 100n 25V C815 470n 63V PVCCR4 L723 50R_100MHZ_3A 40uH 2 2 1u 16V C778 15V_AUD MUTE C811 25V 100u C775 C777 25V 220u 50V 100n 15V_AUD 15V supply voltage ait 100n decoupling capasiteler S733 R772 4k R768 25V 100n S738 9k1 3k3 S732 C825 Q710 BC848B S734 MUTE Q709 BC848B RESET OUT 1 Q603 BSN20 S735 2 LM809 3 IC703 100k Q604 BSN20 S736 100n 25V MUTE_3V3 C824 R756 22n 50V 12k R766 S737 22n 50V C818 C781 bilgisinde lehim yeri olarak belirtilecek. C C2003 10k C1186 1k R1116 R1117 1u 16V 100R HP_R C1151 C1136 K 2 4k7 16V R1096 BC848B Q1009 JK200 JACK-AK16 L1031 BA782 C1188 D1002 100n 16V R1115 R1 25 8 NC2 1k YPBPR_AUDIO_L_IN AUDIO_L IF 4 L1 16V C2014 7 NC1 R2013 SC1_V_OUT R2001 10n 50V 1k S2002 S2001 25V C1050 100n 1k R1045 BC848B Q1013 C1187 C2011 1k 75R 10u 50V 47k R1118 50V 1u C1150 63V SCL D1000 C1182 R1046 C1046 56p 1n R2000 S1005 Q1014 100n BC848B SAW_SW1 R1119 16V 10k R1120 C2013 R2012 Q1004 BC848B 4 C2015 1k C1044 C1189 10k SW01=L BG.I.A DA 220NF OLMALI MAIN_R 2 L1025 R1111 1n 50V C1114 100R R1090 VAGC16 1 2 1n 50V 1n AUDIO_L 22u C1163 AHVSS 33 1n 50V MUTE_AMP 4 3 1 PL1003 C2021 9 TOP AS 3 R1034 4MHz 10k X1001 22p 25V C1039 SDA 5 5 100R C1038 XTAL_OUT 55 MSP3452G IC208 330n 1kV C2023 REF15 1k HP_R TUN1_CVBS VCC_5V 33p 25V C1022 33p 25V C1023 SDA 10SDA S1000 1u TU1001 TUN-UR1316TMK3-HOR R1009 100R TU 2 TAGC14 AUD_CL_OUT 57 60 C1147 AUDIO_R L1024 330n AGNDC 34 L1021 22u R1110 SC4_IN_L 35 16 RESETQ 1k C1164 C1141 SC2_AUDIO_L_IN 22u R1108 1n C1171 50V 330n 16V 330n 15 NC3 C1087 470p R1030 11SCL NC458 61 NC559 D_CTR_I/O_1 C_CTR_I/O_0 ADR_SEL 62 NC664 C1085 50V 39p 2 K IC206 1 A QSS_TUN1 22n 50V R1052 560R R1005 100R SCL AGC 1 1N4148 IC205 47u 50V NC13 SC3_IN_L 38 1k 1n 50V C1158 SC2_AUDIO_R_IN 22u L1023 R1107 C1176 16V C1140 14 NC2 20 DACM_R 100n C1010 12 SIOMAD 2k2 ASG2 40 L1020 1k C1170 SC1_AUDIO_L_IN 22u R1106 1n 50V 330n 16V C1146 330n SC3_IN_R 39 1k C1177 16V C1148 SC2_IN_L 41 ASG3 37 C1112 R1010 100R R1114 C1160 330n SC1_AUDIO_R_IN 22u L1022 R1105 1n 50V 16V 16V SC4_IN_R 36 HP_L L1001 C1142 330n ASG1 43 C1174 C1157 330n C1079 1n5 50V 10u 50V 75R 4k7 10k 330n 1k 1n 50V 16V 13 NC1 10p 25V BC848B R1049 10k 11 DVSS RESETQ_MSP Q1005 BC848B R1051 R1122 16V C1191 R1121 Q1016 50V C1086 ESD C1052 S1010 47k 50V C1081 2k4 15k R1050 R1048 D1003 BA782 L1032 R1123 10 DVSUP 470p 16V C1161 330n 16V L1019 R1104 330n C1138 SC2_IN_R 42 12 12S_DA_IN2 C1078 C1055 Q1015 BC848B 9 ADR_CL 270p 22u 4 VCC5V_FILTERED C1193 STANDBYQ 63 50V 39p C1084 SDA 1k BZT55C3V6 C1206 100n 50V C1205 100n 50V C1200 100n 100n VCC_5V S1003 OUT1 8 ADR_WS 17 DACA_R 100n Z1003 1 IN1 7 ADR_DA 1N4148 C1169 C1156 SC1_IN_L 44 6 12S_DA_IN1 L1008 K9356M 16V C1194 1k R1126 10k R1125 16V 1u C1192 R1124 5 12S_DA_OUT C1080 100u 50V 10u AVSS 48 VREFTOP 46 IC207 470R R1067 3 GND 2 IN2 OUT2 5 50V 10n SAW_SW2 50V VCC5V_FILTERED C1199 IC200 S1009 100R IF1 4R7 SIF2 24 100n 1 VIF1 50V 50V IF1 4 OUT1 25V C1166 MONO_IN 47 SC1_IN_R 45 I2S_DA_IN1 SC3_AUDIO_R_OUT 100n N.8V_FILTERED „:$ 22u L2000 C2004 470p Q2002 BC848B 50V S1004 VCC5V_FILTERED L1003 50V 22u SC1_AUDIO_L_OUT 50V 22u 31 AHVSUP 1n 50V C1153 C1175 1n 50V 2 AUDIO_R NC4 22 AUDIO_L NC3 21 Q2000 BC848B 22u 10 L5 R5 19 HP_L C255 50V 4n7 L216 PC_AUDIO_R_IN 12 ROUT1 LOUT4 17 13 LOUT2 ROUT3 16 14 ROUT2 LOUT3 15 22u 50V PC_AUDIO_L_IN L219 C2024 22u 50V L218 TDA1308 6 INB- INA+ 3 5 INB+ VSS 4 1k 1k R2008 1n 50V 16V 50V C1181 R1102 10k C1159 50V 1u DAC_AOR C257 ROUT4 18 50V 4n7 11 L0UT1 75R SC3_V_OUT 1k 330n 16V 16V R2002 1k 56p 1n YPBPR_AUDIO_R_IN D1004 AUDIO_R L2002 C2022 1k 1 3 2 50V 1n 22u R2023 BZT55C5V1 25V R2016 100R L2001 R2022 D1005 C2037 BZT55C5V1 16V C2020 C1173 10k Q1012 330n 16V 330n R2015 100R C2033 R4 20 C2036 C2034 9 L4 50V 1n 50V 1n 1k DAC_AOL 50V 1n C2017 50V 1n VCC5V_FILTERED 47R C2000 C2018 50V R1113 BC848B 22u 50V 22u 50V C1132 22u 50V C1127 C1124 22u 50V 1k C1139 PC_AUDIO_R_IN R1097 AUDIO_L_LINE_OUT 1k 47k C1168 R1100 2n2 50V R1101 4k7 BC848B Q1011 220p C1179 220p L1030 L1029 INA- 2n2 50V OUTB 1 C1184 7 OUTA 1u 50V VDD R1112 8 C1183 22u 22u 1k SC2_AUDIO_L_OUT R2021 1 PL1002 2 4 3 100n C295 16V L1027 IC209 C1180 100u 1n 50V C1133 100R C300 16V C1167 100u L1028 16V 100u C1172 L1017 22u C1178 1n 50V 4R7 VCC5V_FILTERED BC848B Q1010 AUDIO_R_LINE_OUT 330n 16V C2032 R3 23 50V 1n 6 L3 330n 16V 2n2 50V R1103 R1129 AUDIO_L_OUT AUDIO_R_OUT 10u C1134 10u 50V C1131 22u L1016 C1129 22u 50V 22u R1098 C1121 50V 1n L1015 50V 22u 100R R1093 100R R1089 C2202 C1119 50V 1n SUBW IDTV/MMC/DVD_R_IN 1k R2007 1n5 50V C1144 50V 10u C1152 AVSUP49 ANA_IN1+50 ANA_IN-51 ANA_IN2+52 XTAL_IN54 TESTEN 53 28 SC1_OUT_R 27VREF1 32 CAPL_M VCC_8V 1n C1118 C1116 100u R2202 1k TEA6420 R2014 C2001 100n 47R R2009 QSS_TUN1 C1122 C1125 56p C1120 1p8 50V X1002 18.C K9356M 1 IN1 8V_FILTERED HEADPHONE 10u 50V R1092 ADDR 26 330n R1033 3 GND 2 IN2 OUT2 5 IC201 SCL 27 C2012 C2019 SIF2 24 50V 1n SIF1 23 1 VIF1 1k SC3_AUDIO_L_IN PC_AUDIO_L_IN 4 OUT1 IF 1 IN1 100R R1095 75R R1044 R1040 R1047 2 VIF2 R2010 K3953M Z1001 IF1 11 50V 1n R1023 SAW_SW1 4R7 R1130 C1154 SDA 47p 50V AV_AUDIO_L_IN 22u 100n 100u 8V_FILTERED 50V 1n 1n 50V 22n 50V C1054 R1039 12k 47k R2201 50V 1n5 R1027 22k 390p 50V 3 GND 2 IN2 OUT2 5 S1007 IF2 10 L1000 100n 25V 6k8 2k2 C1004 VCC_5V C2025 S2000 3 VS 47u 50V OP222 10n 50V C1027 25V 100n 16V VCC5V_FILTERED 3 OP1 C2010 10u 50V 5k6 33V_FILTERED VST 9 R1024 C1009 50V 10u R1001 2 VCC5V_FILTERED C1041 C1149 R2017 100R 50V 47p CAPACITANCE 22u 50V C1051 AFC21 SDA 28 L1026 R1109 C2026 C1049 VP 20 4FMPLL 22k 5DEEM C1026 1 GND C2009 C1047 16V 50V 10n 63V 10n 50V R1012 IC2000 C2201 R1041 150R 220n VS 7 C1043 33p 25V C1012 50V 10u 100n 25V C1003 C1040 VPLL19 C1031 VCC_5V 16V 50V 47u 470n C1145 3u3 50V 470p C1196 100n BC848B Q1002 AGND18 6 AFD 8 2k2 22u 330n 16V 1k 50V R1026 TDA9885T C1030 NC 6 NC/ADC R1035 33p 25V C1008 C1015 7DGND C1126 50V 1n IDTV/MMC/DVD_R_IN AV_AUDIO_R_IN 50V 1n5 C1117 47R CVBS17 C1106 50V 1n 8 AUD SCL 4 50V 1n MAIN_L IDTV/MMC/DVD_L_IN 3 50V 1n 100R R1094 63V 470n C1097 1k NOT:330NF_SMD_603 MALZEMELER U.432MHz TP 56 25 SC2_OUT_R 24 DACM_S DACM_SUB 23 22 DACM_C 21 DACM_L R2020 330n 16V C2031 SC2_AUDIO_R_OUT 50V 1n C2027 SC3_AUDIO_R_IN C2029 R2 24 C2002 VCC5V_FILTERED 50V 1n 5 L2 16V C2016 1k 1k K 2 C1185 C1165 8V_FILTERED R1091 R2019 330n 16V C2030 330n N.L OUT1 A 1 2n2 50V C1162 100n R2018 100R C2028 330n R2003 S1006 47R Z1002 SW01=H L' 50V PL1001 47R 47R R2011 IDTV/MMC/DVD_L_IN N.DK.5A D1001 A 1 .C 4 12S_WS 470R C2008 VCC_5V 50V 3 12S_CL R1069 SC1_AUDIO_R_OUT C2007 50V 22u 22u C1137 560p I2S_WS Q1007 BC858B Q2004 BC848B L1018 C1130 I2S_CL I2S_DA_OUT R1127 VCC_5V C1198 1 IN1 IF1 11 VCC5V_FILTERED 1p8 50V 22n 50V C1057 SCL 100n SIF1 23 R2005 100R AUDIO_R_OUT 50V N.C 56p 2 12C_DA 18DACA_L 2 VIF2 SF_63962 Z1000 50V 10u 1u L1002 1n 50V C1197 IF2 10 SAW_SW2 R1068 50V 3 GND 2 IN2 OUT2 5 C1005 1 12C_CL 100R 56p 30CAPL_A 4k7 R1054 75R R1061 560R VCC_33V 390p S1008 R1071 C1204 100n 50V C1203 R1028 100n OP222 33V_FILTERED 50V 50V 3 OP1 C1202 C1025 33V_FILTERED 4R7 50V 10u 25V 22k R1128 C1201 VCC5V_FILTERED 100n 2k2 47u 50V C1048 C1035 AFC21 6k8 C1006 4FMPLL R1031 10n 50V 100R VCC5V_FILTERED 22k 5k6 R1070 100n C1195 VP 20 R1022 R1011 C1024 R2200 50V 1n5 C1042 25V 5DEEM 10n 50V 50V 10u 50V 10n 63V C1029 VCC_5V 16V 330R 100n VS 7 R1000 C2200 R1038 VPLL19 470n C1011 100n 50V 10u 25V C1002 C1037 C1045 6 AFD 25V R1078 100R AGND18 TDA9885T NC 6 VST 9 C1113 100n 47R C1007 33p 25V 33p 25V 7DGND C1028 8 BC848B Q1003 47R 50V 47u C1013 SDA 5 NC/ADC 220R R1025 CVBS17 C1128 56p SC3_AUDIO_L_OUT Q2003 BC848B AUDIO_L_OUT C1123 29 SC1_OUT_L R1043 QSS_TUN2 63V 8 AUD SCL 4 C2006 R2004 100R 50V 22u R1042 470n 26 SC2_OUT_L VAGC16 10p 25V 19VREF2 9 TOP BC848B Q1006 R1060 VCC_5V AS 3 R1037 4MHz C1036 75R X1000 22p 25V 47k C1034 10k REF15 R1032 10SDA 22n TUN2_CVBS QSS_TUN2 C1053 100R VCC_5V 33p 25V C1021 33p 25V C1020 SDA R1008 100R TU 2 TAGC14 1k R2006 C1056 R1029 11SCL C2005 Q2001 BC848B 2k4 15k R1059 R1053 12k R1036 NC13 IC204 12 SIOMAD 47k R1004 100R SCL AGC 1 TU1000 TUN-UR1316TMK3-HOR R1013 100R 1N4148 47u 50V C1014 26R_100MHZ_1. SC3_AUDIO_L_IN 11 18 15 17 20 19 21 A 1 D213 BZT55C10 C248 150p SC2_FB SC2_AUDIO_L_IN K 2 3 50V 4n7 L207 D223 K 2 A 1 BZT55C10 SC2_AUDIO_L_OUT SC2_AUDIO_R_IN SC1_V_IN 50V 1n 1 A 1 A 2 K D221 N.C 150p R241 75R R230 100R OUTPUT3 15 50V L2004 D218 K 2 75R 1k Q201 BC848B R234 220n 39p 50V C280 OUTPUT4 16 TEA6415C 6 INPUT4 N.C C298 V8 R264 V8 R229 IDTV/MMC/DVD_CVBS C274 SC1_V_IN 4R7 10u C304 16V 39p 75R N.C 50V R201 75R Q202 BC848B R224 A 1 11 35 34 10 33 32 OUTPUT2 14 C288 K 2 330R 7 PROG 10k CONNECT 17 16 1 31 30 S200 VCC_8V SVHS_Y_IN SC2_R/HD_PR1 9 29 28 100n SVHSfromSC2_C S204 D208 8 L2008 27 26 16V 150p S205 6 25 24 PL205 23 22 75R C2049 R223 S201 K 2 21 20 19 SC3_V_IN A 1 BZT55C10 D2002 SEL_V_OUT R276 A 1 R275 C293 50V 10k SC3_V_OUT 1n 50V PIN8_SC3 BZT55C10 150p 50V K 2 D2105 C2041 A 1 SC3_AUDIO_L_OUT R2024 330R C2040 D2001 GOES TO MCU FOR TXT/CC/V-CHIP DECODING 1k R236 16V N.C C301 50V 150p R249 1 SC1_V_OUT D214 L203 BZT55C10 BZT55C10 SC1_FB C284 PL203 A A C270 BZT55C10 1 A D2101 SC2_AUDIO_R_OUT SC1_R/COMP1_CR_IN SCSCL A 1 330R R253 L209 1 D2103 BZT55C10 C277 150p C250 R261 A 75R 2 K SC1_G/COMP1_Y_IN C266 50V 1n 2 1 C252 150p 2 K R260 75R 150p 2 K K 2 1 1 D220 2 K A 1 2 K D219 1 A 2 K PIN8_SC1 A PIN8_SC2 D203 50V D209 D210 SCSDA 1n 50V 150p 50V K 2 D2500 D212 D2100 D205 2 K K 2 L214 4 L211 L220 S221 S220 1 A A 1 4n7 2 K D204 1 A 2 K BZT55C10 A TV_LINK 2 K BZT55C5V1 SC2_B/HD_PB1 7 16 13 BZT55C10 C278 2 K D2102 1 A BZT55C10 C286 SC1_AUDIO_L_OUT 75R 3 4 1 SC1_B/COMP1_CB_IN L210 R254 C267 L206 1n 330R R252 50V CIN C262 150p 50V 16V 220n 14 D206 A 1 C258 4n7 50V L204 50V 39p R232 K 2 9 12 SC2_G/HD_Y1 D207 1 A 42 C264 SC1_AUDIO_R_OUT 150p C261 50V D215 A 1 7 A 1 SC1_AUDIO_R_IN BZT55C5V1 2 10 D202 AV1_V_IN 1 18 15 41 40 L208 220n PL201 8 L213 5 16V C263 14 13 39 38 5 L212 4n7 50V BZT55C10 C269 3 K 2 75R C276 R231 TUN2_CVBS 220n 16V 1 6 330R C296 C268 39p N.C VIDEO SWITCH TEA6415C VCC_8V „:$ .C IC210 1 INPUT1 N.C R228 100R BZT55C10 L2007 R2025 50V 330R SC3_AUDIO_R_OUT A 1 SC2_V_OUT A 1 C2039 1n 150p 50V VxtoVPC D211 K 2 A C2042 V8 C259 39p 50V R200 75R 5 INPUT3 220n 16V C279 R205 L2003 GOES TO VPC3230 FOR PIP PICTURE 75R D2000 C2038 150p R240 10k SC2_V_IN K 2 K 2 39p 50V Q203 BC848B V8 C287 47p 25V R227 100R OUTPUT5 17 C265 N.C K 2 BZT55C10 R222 75R D2104 4n7 50V C2043 R221 4 CLOCK K 2 K 2 A 1 R226 100R 10k R207 100R D2004 L2005 R220 OUTPUT6 18 16V 4n7 50V A 1 SC3_AUDIO_R_IN R239 10k A 1 BZT55C10 C2044 220n SCL L2006 CVBS_SVP 1k TUN1_CVBS AV1_V_IN BZT55C10 C2045 C294 100n MAIN PICTURE TO SVP V8 C303 GND2 19 3 INPUT2 N.C C297 39p N.C C292 R204 2 DATA C260 SC2_V_IN D2003 75R R206 100R K 2 R235 16V SDA 75R Q200 BC848B 220n 16V 47p 25V 39p 50V R203 C285 75R C282 INPUT8 20 220n 150p C253 50V N.C50V R202 75R D222 INPUT7 11 50V 12 37 36 L205 C275 10 INPUT6 C291 39p 50V 220n C273 1k R242 16V C299 50V 22u 100u C283 16V GND1 12 SC1_AUDIO_L_IN 4 SELECTABLE VIDEO OUT FOR SCART 2 R225 9 VCC SC3_V_IN SC2_V_OUT 10k K 2 75R 220n 16V 2 A 1 R237 L200 2 K SVHS_Y_IN 2 K 2 K D217 C271 1 A D216 1n 50V 1 A 5 6 L202 7 8 AV_AUDIO_R_IN C272 1n 50V AV_AUDIO_L_IN L201 D-SUB 15 PC INPUT & DDC CIRDUIT JST SOCKET SAP NO:30037318 V8 5V VCCA_3V3 8 VCC NC1 1 7 VCLK NC2 2 ST24LC21NC3 SCL 100R R218 6 100R R219 5 SDA 3 30 29 28 27 26 25 24 23 S113 S112 22 21 20 19 18 17 9 10 16 15 7 8 14 13 5 12 11 3 6 TXOUT0- TXOUT0+ TXOUT1- TXOUT1+ TXOUT2- TXOUT2+ LED1 6 P2 P6 11 LED2 7 P3 P5 10 8 VSS P4 9 LG_1 NVM_WP SEL VSS 4 VPC_OE MMC_G P7 12 MMC_R INT 13 5 6 5 P1 MMC_CVBS 4 P0 DISP_EN gnd DDC_CLK_PC DVD_12V_SENSE PL1 IC212 DDC_DATA_PC VIDEO INPUTS S224 PCF8574 VGA_VSIN MMC/DVD SCL3 S213 330R R256 MMC_B SCL 14 STBY_5V 3 4 R248 4k7 4k7 R246 R265 4k7 4k7 R277 VCC_5V 3 A2 STBY_3V3 R278 100n C302 R217 330R R255 CHROMA_SW 10k R216 10k D201 SDA 15 4k7 VGA_BIN VGA_GIN VGA_RIN D200 1N4148 DDC_5V 1N4148 2 A1 SDA3 S631 IDTV/MMC/DVD_CVBS S212 2 PGAGND PL200 VDD 16 R257 R210 S630 R209 1 A0 S222 4Y 8 MMC_CVBS STBY_3V3 gnd 7 GND 1 R208 R259 75R 100n 16V R258 1 IC213 4k7 4k7 75R STBY_3V3 4k7 2 4 C290 STBY_5V 75R 1 PL103 R273 VGA_VSIN R238 S223 22R gnd 22R VGA_HSIN gnd gnd S634 TXCLKOUT- 4A 9 47k TXCLKOUT+ 6 3Y C_SELECTED R214 4 3 gnd Q206 BC848C TXOUT3- 5Y 10 100n PGAGND 5 3A 16V R269 CHROMA_SW TXOUT3+ 5A 11 VCC_12V VCC_12V R266 18k 10k R267 S633 74LVC14A 4 2Y 6 5 10k 6Y 12 1k 3 2A gnd SVHSfromSC2_C R213 22R PANEL_VCC gnd Q205 BC848C R274 6A 13 Q204 BC848C 47k K 2 D2502 BZT55C12 BZT55C12 2 1Y C2050 DDC_5V 10 9 8 7 A 1 D2501 11 A 1 K 2 12 R270 100R CIN R268 DDC_DATA_PC 100n C289 VCC 14 13 16V 1 1A 22R 14 VCCA_3V3 R215 2 2k 2k R211 R212 DISP_EN IC211 DDC_CLK_PC 15 PANEL_VCC gnd S635 S111 CHROMA SWITCH EXISTS IN WO/PIP OPTION VCC_5V 16V VCC_8V D224 OUTPUT1 13 BZT55C10 8 INPUT5 N. 5A 50V 1n5 2 NC2 5 NC5 16V C2048 10n 50V SDA 43 VCC_5V L308 VCC_5V 10u 50V C2047 1 NC1 DVS_2EX STBY_5V RESETQ_MSP I2S_WS 2u2 I2S_CL 4 R4 5 R3 6 3 R2028 10R 1 R1 8 R2027 100R 2 R2 7 C2046 SCL SDA R2026 100R VCCD2_3V3 L2009 I2S_DA_IN1 I2S_DA_OUT VCC_5V „:$ RCA_PB R328 C326 75R S338 R329 220n 16V 75R RGB_BIN .C bu caplerin yerine tek 100nf takabilirsin.C L302 MMC_B 50V 270p SCL3 N.5A L313 R317 R316 22R 22R 26R_100MHZ_1.5A Y1 39 16V NC15 23 66 VRT C347 NC16 24 11 NC11 33R 1 R1 8 C321 75R 10 NC10 Y0 40 DIN[0-23] N.C 50V 24 CLK20 23 FFOE 22 FFRE 21 FFRSTW 20 FFWE 19 FFIE 18 YCOEQ 17 VGAV 16 TEST 220n S300 100R R320 100R R319 100R R318 K 11 7 G J 10 8 H I 9 100n C251 16V C249 10u SC1_FB SC2_B/HD_PB1 S312 S332 S335 S333 R_OUT G_OUT FB_VPC RGB_R_VPC RGB_B_VPC B_OUT 16V 6 F RGB_G_VPC C338 100n M 13 S334 IC318 FBO 15 RESQ 14 SDA 13 SCL 12 GNDCAP 10 VSUPD 9 VSUPCAP 11 GNDD 50V 1n5 C336 RGB_SW2 C339 RCA_PR 75R 8V_FILTERED1 C353 R326 1k RGB_RIN 75R 330p S311 C325 220n 3u3 220n C335 16V N 14 4 D S337 1 A R 16 2 B O 15 3 C N 14 4 D M 13 S314 16V 560p 3 C SC1_B/COMP1_CB_IN 16V N.5A DHS_2EX C333 26R_100MHZ_1.C 3 4 VCCD_3V3 C346 C314 75R L300 2 R2 7 16V 75R 26R_100MHZ_1.5A C332 C7 41 680n 33R 1 R1 8 Y5 33 2 R2 7 BACK LEFT JK303 L AUDIO FAV K 2 D226 N. 26R_100MHZ_1.C 25V O 15 100n C324 L312 50V 330p C309 R310 R311 C337 R 16 2 B SC2_FB S308 50V 330p R309 75R 16V L304 C334 1 A PI5V330_SOIC 5 E L 12 SC1_G/COMP1_Y_IN PI5V330_SOIC L 12 R327 5 E S307 C329 220n 3u3 SC1_R/COMP1_CR_IN SC2_G/HD_Y1 C342 RST# R314 N.C 75R R303 RCA_PB RCA_Y 50V GNDPA 25 RGB_B_VPC 75R D106 BAV99 SCART RGB FOR EU RCA YCbCr for US S316 L306 L315 26R_100MHZ_1.5A 75R R302 50V 330p C313 3u3 8V_FILTERED1 R325 1k VPC_OE R301 75R 1 B1/CB1IN C328 C310 S324 S323 L317 BLM21A601S C360 470p 2 3 1 BACK RIGHT 2 3 1 50V L316 BLM21A601S Pr C359 470p Pb 30032234 BZT55C10 Y K 2 1P_RED_FAV JK302 D225 WHITE_FAV JK301 A 1 A A A WHITE_FAV JK300 30032233 S330 220p 2 3 1 A 2 3 1 MMC RGB INPUTS 50V 220p 2 3 1 AUDIO_L_LINE_OUT C358 50V S331 220p YPBPR_AUDIO_R_IN 75R AUDIO_R_LINE_OUT 75R C357 50V YPBPR_AUDIO_L_IN 75R C356 R313 S322 50V 220n 75R L307 S321 R333 16V S320 D102 BAV99 R332 N.C RGB_R_VPC A R331 C327 50V RGB_G_VPC SC1_R/COMP1_CR_IN IC317 RGB_SW1 S310 330p C312 3u3 S319 CLK_2EX S301 220n VCCD2_3V3 VCC_5V D104 BAV99 RCA_PR 16V R312 S318 VCCD2_3V3 22R SC2_R/HD_PR1 N.R315 S302 L314 26R_100MHZ_1.5A 22R 100n VSUPPA 26 FB_VPC SC1_G/COMP1_Y_IN DIN[7] 4 R4 5 16V 79 FB1IN S315 330p C311 DIN[6] R3 6 C352 LLC2 27 SC1_FB L305 SVP ENTEGRESINE DIN[4] R2029 C316 78 VREF AUDIO_L_LINE_OUT 3u3 8V_FILTERED1 R321 10u 50V 47n 25V C306 390p LLC1 28 R330 4R7 DIN[5] 3 R324 80 AISGND S317 R323 Y4 34 AUDIO_R_LINE_OUT SC1_B/COMP1_CB_IN VCCD2_3V3 100n VSUPLLC 29 77 GNDAI S325 SUBW C344 GNDLLC 30 76 VSUPAI 2 S326 DIN[3] Y7 31 75 VIN4 R3 6 4 R4 5 Y6 32 74 VIN3 C354 C305 PL301 IC216 VPC323XD DIN[2] VCC_8V C6 42 C5 43 C4 44 VSUPC 45 C3 47 GNDC 46 C2 48 C1 49 C0 50 GNDSY 51 INTLC 53 VSUPSY 52 AVO 54 FSY/HC 55 VS 57 MSY/HS 56 FPDAT 58 CLK5 60 VSTBY 59 NC2 61 GNDY 35 73 VIN2 680n 1n8 50V 220n C349 16V VSUPY 36 70 VOUT DIN[1] 3 RCA_Y RGB_GIN S336 75R 6 F K 11 7 G J 10 8 H I 9 FB S309 680n R300 C348 69 VSUPF 72 VINI 75R 100u Y3 37 1n C322 VCC_5V C350 68 ISGND DIN[0] 10k 680n C315 R307 16V I2S_DEL_IN4 20 Y2 38 71 CIN 75R 22 NC14 I2S_DEL_IN3 19 R305 R306 21 NC13 I2S_DEL_IN2 18 17 DVSS2 16 DVSUP2 67 I2CSEL 100n R304 N.C MMC_G 390p SDA3 220n 75R C308 3u3 L303 MMC_R BZT55C10 A 1 50V JK304 R AUDIO FAV 8 NC1 7 ASGF1 6 R2/CR2IN 5 G2/Y2IN 4 B2/CB2IN 3 R1/CR1IN 2 G1/Y1IN 16V N.25MHz 100n 25V NC24 32 7 NC7 220n C318 3 NC3 6 NC6 26R_100MHZ_1.C R322 65 GNDF C345 470p I2S_DEL_OUT4 S303 VCCD2_3V3 25V 47n C351 NC17 25 15 50V 68n C341 50V 1n5 NC18 26 9 NC9 I2S_DEL_OUT3 L311 10k NC19 27 8 NC8 14 10u 50V 25V 2n2 C331 CIN NC20 28 VxtoVPC NC21 29 TUN2_CVBS TUN1_CVBS C323 XTAL1 62 10u 50V 25V 47n XTAL2 63 C317 NC25 33 IC2001 MAD4868A I2S_DEL_OUT2 50V 1n5 C343 NC22 30 13 VCCD2_3V3 C340 C320 NC23 31 12 NC12 C330 390p ASGF2 64 TEST 35 50V 4 NC4 1 50V 3p3 50V 3p3 X300 25V 47n C319 RESETQ 34 DVSS1 36 DVSUP1 37 I2S_DEL_WS 38 I2S_DEL_CL 39 40 I2S_DEL_IN1 41 I2S_DEL_OUT1 ADR_SEL 42 SCL 44 20. 5A PAVDD L408 VL1_8 C469 100n 16V 16V 10u C466 100n 16V 16V C2238 100n 16V C2237 100n C2236 100n 16V C458 100n 16V 16V 10u C454 16V 100n 100n 16V 16V C2241 16V 100n C2240 L409 AVDD_ADC2 100n C2239 VA1_8 2u2 16V 100n 16V 100n C463 16V C462 16V 100n C460 100n 16V VA1_8 C2235 16V 16V 10u 100n C430 100n 16V C2226 100n 16V C2225 100n 16V C2224 100n C457 L404 L402 16V 16V 100n C450 DIN[0] DIN[1] DIN[2] DIN[3] DIN[19] STBY_5V 2u2 16V 150R 600mA lik ferit C2223 C423 100n 16V 16V 10u 100n C421 16V 100n C2222 16V 16V C2254 100n C2221 MD[24] MA[6] C446 AVDD3_AVSP2 100n MD[23] MA[5] VCCA_3V3 16V MD[22] 16V 100n 100n VCCA_3V3 C2220 68p 50V C412 68p 50V MD[21] MA[4] 16V VCCA_3V3 L400 C410 C447 150R 600mA lik ferit VDDH MD[20] VDDMQ_2V5 100n R414 SCL3 MD[19] MA[3] C468 C420 VD1_8 C427 TXCLKOUT+ 68R MD[18] MA[2] AVDD_ADC3 100n C429 100n C473 68R SCL_EX 1R SC2_FB_SVP 25V 10p SDA_EX R440 SC2_FB R413 C436 R2211 R438 100R SW1 TSW_VER.31818MHz PB_B1 100n X400 C414 S436 SC2_B/HD_PB1 MD[15] VDDL VREFN_2 50V 20p RGB_RIN MD[14] 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 VREFP_2 C407 TXOUT0- S426 75R R404 100n 16V TXOUT0+ SC2_R/HD_PR1 DIN[5] PAVDD PR_R1 TXOUT1- S435 DIN[6] PDVDD VD1_8 DIN[7] 100n C409 TXOUT1+ 75R R403 RGB_GIN Y_G2 TXOUT2- 16V S425 C2231 Y_G1 100n C432 SC2_G/HD_Y1 TXCLKOUT- Y_G1 TXCLKOUT- CVBS3 C406 S434 S438 100n CVBS2 C465 S439 TXOUT2+ VREFP_1 10k TP40 16V 16V 10u VREFN_1 CVBS_OUTP CVBS_OUTN AVDD_ADC1 AVSS_ADC1 VREFN_1 VREFP_1 CVBS1 CVBS2 CVBS3 AIN_N1 Y_G1 AIN_N2 Y_G2 AIN_N3 VSSC13 VDDC13 PDVDD PDVSS PAVDD PAVSS XTALI DIN[8] S441 CLK_2EX 75R AVDD_ADC1 TXCLKOUT- R427 SVHS INPUT AVDD3_AVSP2 AVSS3_BG_ASS 100n AVDD3_AVSP2 TXCLKOUT+ PB_B2 R2212 16V TXOUT3- PB_B1 TXOUT3+ 100n TXCLKOUT+ R400 16V 75R R402 100n 75R CVBS3 SEL_V_OUT C CVBS2 DVS_2EX CVBS_SVP S440 CVBS_SVP DE_2EX C402 S428 VREFP_2 DIGITAL SINCS415 C400 16V VREFN_2 SC2_FB_SVP MAIN PICTURE S431 DIN[9] AVDD_ADC2 DIN[10] PR_R1 PR_R2 IC224 SVP_EX_51 DIN[11] VREFP_3 100n VREFN_3 10k C401 R2207 330R R401 75R W/PIP SVHSfromSC2_C DHS_2EX C 100n AVDD_ADC3 SDA_EX S429 RST_H WO/PIP INT# 16V MPUCSON SCL_EX C_SELECTED S430 C2230 ALE_EMU DIN[12] WR_EMU C411 DIN[13] RD_EMU DIN[14] 100n VD1_8 MD[9] MD[10] MD[13] VDDL VSSL MA0 MA1 VDDM8 MA2 MA3 VSSM8 MA4 VDDM7 MA5 MA6 VSSM7 MA7 MA8 VDDC6 MA9 MA10 VSSC6 MA11 MD15 VDDC5 MD14 VSSM6 MD13 VDDM6 MD12 VSSM5 DQS1 VDDM5 VSSM4 DQM1 MD11 VDDM4 MD10 MD9 VSSC5 MD8 MD7 VDDC4 MD6 VSSM3 MD5 VDDM3 MD4 VSSM2 DQS0 VDDM2 VSSM1 DQM0 MD3 VDDM1 MD2 MD1 VSSC4 MD0 DIN20 DIN21 DIN22 DIN23 VSSC3 VDDC3 VSSH3 VDDH3 VDDH MCA[7] 100n MCA[6] 16V MCA[5] 4k7 PC INPUT [VGA] C2229 MCA[4] R420 75R R408 MCA[3] 16V DIN[15] MCA[2] 100n DIN[16] MCA[1] PR_R2 DIN[17] MCA[0] 100n C405 VGA_RIN DIN[18] STBY_3V3 C2228 MCAD[7] 100n MCAD[6] 16V MCAD[5] MD[8] TP37 MD[12] 10k C413 R422 VD1_8 MCAD[4] C422 16V 75R R407 100n MCAD[0-7] MCA[0-19] PB_B2 100n 16V MCAD[3] VGA_VSIN C404 VGA_BIN 16V VCCA_3V3 MCAD[2] R419 MCAD[1] MPUGPIO0 A_D0 A_D1 A_D2 A_D3 VDDC12 VSSC12 A_D4 A_D5 A_D6 A_D7 VDDH5 VSSH5 ADDR0 ADDR1 ADDR2 ADDR3 ADDR4 ADDR5 ADDR6 ADDR7 VDDC11 VSSC11 RD WR ALE MPUCSON INT AVDD_ADC3 AVSS_ADC3 VREFN_3 VREFP_3 PR_R1 PR_R2 AVDD_ADC2 AVSS_ADC2 VREFN_2 VREFP_2 C PB_B1 PB_B2 MD[7] TP36 MD[11] VREFN_1 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 MCAD[0] S421 WE# XTALO PAVDD1 MLF1 PAVSS1 PAVDD2 PLF2 PAVSS2 VSSC1 VDDC1 AIN_HS AIN_VS TESTMODE RESET SCL V5SF SDA PWM FLD_IO VDDH1 VSSH1 H V DE PLL_VCC PLL_GND TD1+ TD1TCLK+ TCLKTC1+ TC1LVDSGND LVDSVCC TB1+ TB1TA1+ TA1LVDSVDDP GPO VDDC2 VSSC2 DIN19 DIN18 DIN17 DIN16 DIN15 DIN14 DIN13 DIN12 VDDH2 VSSH2 DIN11 DIN10 DIN9 DIN8 CLK DIN7 DIN6 DIN5 DIN4 DIN3 DIN2 DIN1 DIN0 75R R406 100n 16V CS0# C451 S411 Y_G2 MD[6] TP35 S420 VREFP_1 C403 VGA_GIN RAS# NC MPUGPIO1 MPUGPIO2 MPUGPIO3 MPUGPIO4 VSSH4 VDDH4 VSSC10 VDDC10 MD31 VSSC9 MD30 MD29 VDDM16 MD28 DQM3 VSSM16 VDDM15 DQS3 VSSM15 MD27 VDDM14 MD26 VSSM14 MD25 VDDC9 MD24 MD23 VSSC8 MD22 MD21 VDDM13 MD20 DQM2 VSSM13 VDDM12 DQS2 VSSM12 MD19 VDDM11 MD18 VSSM11 MD17 VDDC8 MD16 BA1 VSSC7 BA0 CLKE VDDC7 WE VSSR MVREF VDDR CAS RAS VDDM10 CS1 VDDM9 CS0_ VSSM10 MCK0_ MCK0 VSSM9 MCA[15] TP39 S419 C2242 MCA[14] . 100n RST_H 1k 4k7 R439 R437 C472 R2206 100k 10k R426 1k R424 100n 16V 10k R425 MPUGPIO4 VDDH MD[17] MA[1] C426 VD1_8 VGA_HSIN VDDH PLF2 PAVDD2 MLF1 PAVDD1 VCCA_3V3 VCCA_3V3 10k R423 STBY_3V3 LVDS OUT DIN[4] C415 MAIN RGB INPUT MPUCSON MD[16] MA[0] 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 C408 RGB_BIN C2227 16V 22R 22R 75R R405 S427 R418 50V 20p 14.5A L407 DIN[4] R433 2n7 50V PDVDD DIN[5] 10k C443 16V 16V 10u 100n 100n 16V C2211 100n 16V C2210 16V C2209 100n C2208 100n 16V C2207 R432 DIN[6] R436 22R C439 PLF2 DIN[6] DIN[7] 22R R429 DIN[7] S110 2n7 50V PAVDD2 22R 22R C438 MLF1 R430 R431 C444 100n 16V 16V 10u 100n 16V C2205 100n 16V C2204 100n 16V C2203 100n C440 16V C2206 10k 5 VCC IC107 74LX1G86STR R2210 3 GND VL1_8 R435 22R DHS_2EX PAVDD1 ODD_PINK CLK_2EX „:$ MD[1] MD[2] MD[3] MD[4] MD[5] S413 S418 CAS# 192 191 190 189 188 187 186 185 184 183 182 181 180 179 178 177 176 175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160 159 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 SDA3 S442 FB Q401 BC848B MD[25] MA[0-11] MD[26] MD[27] MD[28] MA[7] 16V 100n MD[29] MA[8] MD[30] VD1_8 MD[31] MA[9] TP41 MA[10] MD[15] DQM[1] VD1_8 C448 MD[13] 100n DQM[2] DQM[3] DQS[0] 16V 16V MD[12] 100n DQS[1] C456 DQS[0-3] MD[14] DQM[0-3] DQM[0] MA[11] DQS[1] DQS[2] DQS[3] VDDMQ_2V5 DIN[0] DIN[1] DQM[1] DIN[2] MD[11] DIN[3] DIN[4] MD[10] DIN[5] MD[9] C449 MD[8] 100n MD[7] 16V DIN[6] DIN[7] DIN[8] VD1_8 DIN[9] MD[6] DIN[0-23] DIN[10] DIN[11] DIN[12] MD[5] DIN[13] DIN[14] MD[4] DIN[15] DQS[0] DIN[17] DIN[16] DIN[18] DIN[19] DQM[0] DIN[20] MD[3] DIN[21] VDDMQ_2V5 100n MD[1] DIN[22] DIN[23] 16V MD[2] MD[0] C452 DIN[21] DIN[22] 100n DIN[20] DIN[23] VD1_8 VREFN_3 VREFP_3 VDDH 16V 100n C467 C445 100n 16V 16V 10u 100n C442 16V C2234 100n 16V 100n 16V C2233 100n 16V C2232 2u2 AVDD_ADC1 L406 VA1_8 26R_100MHZ_1.5A 1 10k 26R_100MHZ_1.2 1B 4 1Y DVS_2EX VCCA_3V3 MCLK0# CS0# RAS# CAS# MVREF WE# CLKE BA0 BA1 MD[16] MD[17] MD[18] MD[19] DQS[2] DQM[2] MD[20] MD[21] MD[22] MD[23] MD[24] MD[25] MD[26] MD[27] DQS[3] DQM[3] 100n 16V MD[0] MCLK0 100n 16V MD[28] 100n 16V C437 100n MD[29] C471 1k 16V MD[30] MPUGPIO4 C2404 100n 16V 16V 10u 100n 16V C2403 C2402 100n 16V C2401 100n 16V C2400 C470 R434 TP38 100n 16V C435 100n C434 C418 1 1A VDDMQ_2V5 VD1_8 16V ODD_PINK 16V VD1_8 STBY_3V3 12 11 10 VD1_8 VDDMQ_2V5 DIN[0] DIN[1] DIN[2] VD1_8 VDDMQ_2V5 DIN[0] DIN[1] DIN[2] DIN[3] DIN[4] DIN[5] DIN[3] 7 8 9 5 6 3 4 100n VD1_8 C433 100n 16V 16V 10u 100n C431 16V 100n 16V C2215 100n 16V C2214 100n 16V C2213 C428 100n S437 L401 C2212 C459 100n 16V 16V 10u C455 100n 16V 100n 16V C2219 100n 16V C2218 100n 16V C2217 100n C424 DIGITAL IDTV INPUTS [ITU 601] VL1_8 C2216 C425 16V MD[31] VDDL 2 PL104 26R_100MHZ_1. 100n 100n C516 100u 16V 16V 100n C532 16V 100n C531 MCLK0# 16V R2209 100n C530 C522 16V R504 47R MCLK0 100n C529 47R R505 50V 4n7 16V 50V 4n7 100n C524 C528 50V 4n7 16V 5 100n 50V 4n7 C527 39 118 115 114 111 92 91 90 89 80 79 78 77 68 67 66 65 56 55 54 53 45 43 42 40 104 103 102 101 117 112 105 93 100 88 81 16V 1u 50V C515 VDDMQ_2V5 100n C502 16V TP20 100n C504 16V 100n C503 MA[0] 16V MA[1] 100n MA[2] 16V MA[3] VDD_D3 VDD_K10 VDD_K7 VDD_K6 VDD_K3 VSS_H8 VSS_H7 VSS_H6 VSS_H5 VSS_G8 VSS_G7 VSS_G6 VSS_G5 VSS_F8 VSS_F7 VSS_F6 VSS_F5 VSS_E8 VSS_E7 VSS_E6 VSS_E5 VSS_D9 VSS_D7 VSS_D6 VSS_D4 VSS_J8 VSS_J7 VSS_J6 VSS_J5 VSS_K9 VSS_K4 VSQ_J9 VSSQ_H9 VSSQ_J4 VSSQ_H4 VSSQ_G9 C2253 MA[4] C2252 MA[5] 100n MA[6] 16V MA[7] 100n MA[8] 16V MA[9] EM6A9320 IC1 C2251 MA[10] 100n MA[11] DDQS3 4 R4 5 1k C501 1u 8 7 1 2 3 4 R510 C517 R508 10R VCCA_2V5 VDDMQ_2V5 1k 16V BA1 C518 R512 C2250 CS0# DDQS2 MD[24] C526 RAS# DDQS0 CAS# DDQS1 DQM[3] 4 R4 5 WE# MD[0] BA0 DQM[0] DQM[1] DQM[1] CLKE R3 6 MCLK01 3 TP16 6 5 MD[26] MD[1] DQM[2] TP17 DQM[3] DQM[2] 2 R2 7 2 R2 7 R501 10R 1 R1 8 MD[2] DDQS2 R511 R516 DQ28_A9 DQ29_A8 DQ30_B8 DQ31_A7 NC_B10 NC_G10 NC_K12 NC_K11 NC_L3 NC_M2 NC_L2 NC_G3 NC_B3 NC_K8 NC_L9 CK-_L11 CK_L10 CKE_M11 WE-_K2 CAS-_K1 RAS-_L1 CS-_M1 BA0_M3 BA1_L4 A11_L6 A10_K5 A9_L7 A8/AP_M10 A7_M9 A6_M8 A5_L8 A4_M7 A3_M6 A2_L5 A1_M5 A0_M4 10R 1 R1 8 MD[22] MD[3] R515 4 R4 5 DDQS1 R3 6 DDQS0 3 R3 6 MD[4] R514 2 R2 7 MD[18] MD[5] R502 10R 1 R1 8 MD[6] R509 24 35 36 48 59 60 71 72 95 96 107 108 11 83 12 84 144 14 16 18 19 21 23 38 47 51 63 87 99 58 70 94 106 31 30 46 4 R4 5 DQ27_B12 DQ26_C11 DQ25_C12 DQ24_D12 DQ15_E11 DQ14_E12 DQ13_F11 DQ12_F12 DQ11_H11 DQ10_H12 DQ9_J11 DQ8_J12 DM3_A11 DM1_G11 DQS3_A12 DQS1_G12 VREF_M12 VDDQ_B2 VDDQ_B4 VDDQ_B6 VDDQ_B7 VDDQ_B9 VDDQ_B11 VDDQ_D2 VDDQ_D11 VDDQ_E3 VDDQ_F3 VDDQ_H3 VDDQ_J3 VDDQ_E10 VDDQ_F10 VDDQ_H10 VDDQ_J10 VDD_C7 VDD_C6 VDD_D10 R3 6 10R 1 R1 8 TP15 9 8 20 7 22 82 120 119 123 134 122 75 15 116 129 131 130 143 110 109 121 133 135 124 126 113 127 142 141 140 128 139 138 125 137 136 6 17 DQ0_A6 DQ1_B5 4 DQ2_A5 13 DQ3_A4 26 DQ4_B1 25 DQ5_C2 37 DQ6_C1 50 DQ7_D1 49 DQ16_E2 62 DQ17_E1 61 DQ18_F2 86 DQ19_F1 85 DQ20_H2 97 DQ21_H1 98 DQ22_J1 2 DQ23_J2 74 DM0_A2 1 DM2_G2 73 DQS0_A1 132 DQS2_G1 3 NC_L12 10 VSSQ_A3 27 VSSQ_A10 28 VSSQ_C3 29 VSSQ_C4 32 VSSQ_C5 33 VSSQ_C8 34 VSSQ_C9 41 VSSQ_C10 44 VSSQ_D5 52 VSSQ_D8 57 VSSQ_E4 64 VSSQ_E9 69 VSSQ_F4 76 VSSQ_F9 VSSQ_G4 MD[20] MD[7] R513 4 R4 5 4 R4 5 R3 6 MD[16] 3 R3 6 MD[8] DQM[0] 2 R2 7 2 R2 7 MD[9] 10R 1 R1 8 DDQS3 MD[10] MCLK01 TP19 15R MA[0-11] 15R MD[11] R507 TP18 DQS[3] R3 6 15R 4 R4 5 DQS[2] 3 15R MD[12] DQS[1] 2 R2 7 DQS[0] 3 MD[13] MD[17] MD[14] MD[19] 3 R506 MD[21] 10R 1 R1 8 MD[23] 3 R1 MD[25] MD[15] 2 R2 7 R2 DQM[0-3] MD[31] MD[30] MD[29] MD[28] MVREF R500 10R 1 R1 8 R3 DQS[0-3] MD[27] R4 MD[0-31] VDDMQ_2V5 „:$ 100n C505 16V 50V 4n7 100u C525 10R MCLK01 C523 C500 10n 25V R2208 10R C521 MCLK01 50V 4n7 50V 4n7 C506 25V 10n C507 25V 10n C508 25V 10n C509 25V 10n C510 25V 10n C511 25V 10n C512 25V 10n C513 25V 10n C514 25V 10n C519 C520 VCCA_2V5 . 3V 4k7 PIN8_SC2 S622 VCCA_2V5 MCA[15] MCA[14] MCA[12] MCA[13] 16V PIN8_SC1 C607 16 P0_7 MCA[4] 81 A8 6 R3 3 VDD2_5_1 73 MCA[15] MCA[14] MCA[12] MCA[13] C610 100n BC858B Q610 STBY_2V5 C616 4 R4 5 S610 MCAD[5] L602 Q6005 R698 BC848B 15k MCAD[5] 4 R3 6 10u 50V 3 100n 15 P0_6 2 R2 7 HDMI_CEC 10R 1 R1 8 14 P0_5 MCAD[0] 13 P0_4 MCAD[6] RX1_INT MCAD[7] RX1_RST# MCAD[0] 4k7 MCAD[6] R696 MCAD[7] 4k7 R625 10R 92 VDD3_3_3 4k7 8 91 VSS3 R695 7 12 P0_3 MCA[0] 6 MUTE_AMP 90 A10 R694 MCA[0] 4k7 MCA[1] 9 P0_0 MCA[1] 11 P0_2 MCA[2] 5 10 P0_1 MCA[2] RGB_SW1 MCA[10] RGB_SW2 MCA[10] 10R A14 76 100n SW_ENABLE ALE_EMU R689 PSEN_UP 4k7 MCAD[7] VSS2 74 25V 4k7 MCAD[7] A12 77 25V R6013 R626 A13 78 FL_WE R690 MCA[3] A7 79 S604 8 VDD3_3 E 22 FL_RST 80 FL_A15 4k7 MCAD[0] C609 C614 BZT55C5V6 R688 MCA[5] 4 R4 5 MCA[18] 7 VSS MCA[9] 7 R2 2 VDD3_3_2 75 MCA[8] 6 VDD2_5 MCA[5] 5 XROM MCA[11] 4 D3 MCA[10] 3 D2 MCA[10] 1 FL_OE 2 MCA[4] 8 MCA[11] 7 MCA[6] MCAD[3] MCA[9] MCAD[3] DQ7 21 MCA[6] MCAD[2] MCA[9] L600 MCA[8] 2 D4 G 24 R627 3 MCA[11] 10R 8 R1 1 6 A10 23 MCA[7] MCAD[2] MCA[1] MCA[8] 1 D1 A11 25 MCA[7] 4 MCA[13] R628 10R MCA[8] MCAD[4] 5 FL_A14 MCAD[4] MCAD[1] MCA[5] R3 6 MCA[18] MCA[12] 15 16 3 MCA[12] MCAD[4] MCAD[5] MCAD[6] MCAD[7] PSEN_UP 2 R2 7 R629 FL_A16 10R 1 R1 8 MCA[10] MCA[11] MCA[12] MCA[13] MCA[14] MCAD[4] MCAD[5] MCAD[6] MCAD[7] STBY_3V3 SRAM_WE 100p PSEN_UP 10u D2 A K 2 1 MCAD[1] A17 30 W 31 VCC 32 A18 1 A16 2 A15 3 A12 4 MCA[10] MCA[11] MCA[12] MCA[13] MCA[14] MCA[16] MCA[17] MCA[18] MCA[19] 10 100n S623 MCA[16] MCA[17] MCA[18] MCA[19] 9 C606 A9 26 13 14 25V MCA[9] A8 27 8 A4 11 12 ALE_EMU VDD3.SERVICE S412 STBY_2V5 SCL BC848B BC848B BC848B BC848B Q602 Q603 Q604 Q605 R607 R610 10k 10k SDA SDA3 4k7 25V 100p 100n C602 C604 STBY_3V3 LOC_KEY 2 PL606 1 STBY_2V5 STBY_3V3 1 2 3 4 8V_FILTERED2 10u L601 47R R638 180R R642 C613 UP_RXD UP_IRQ UP_TXD S629 S628 S627 PL308 1 2 3 4 100n C611 22u 50V 16V SEL_V_OUT PL604 UART SOCKET FOR IDTV 100n 3k9 R660 R2304 100R 100n R653 25V 100n LOC_KEY C625 3k9 47R R649 25V 3 94 A1 P3_6 37 2 95 FL_CE P3_5 36 1 96 D7 P3_4 35 R624 97 A0 P3_3 34 98 D6 P3_2 33 99 D0 P3_1 32 100 D5 P3_0 31 100n 25V 100n VPC exist withoutYPBPR VPC exist with YPBPR SC2_FB C621 MMC_IR GIRISI 7 R2 2 85 A11 P1_5 46 6 R3 3 86 A4 P1_4 45 BL_ON/OFF 5 R4 4 87 ALE P1_3 44 SCL3 R6014 IR SDA_TVLINK C626 STBY_5V PL605 1 2 R2300 2k7 VPC not exist with YPBPR or R2306 100R STBY_3V3 P1_6 47 FB 47k R682 4k7 R681 84 A5 R2302 100n 25V 4k7 R679 8 R1 1 BC848B SDA_TVLINK 4k7 P4_2 48 Q2301 4k7 47k R692 R2301 4k7 R680 P1_2 43 BC848B Q2300 P3_7 38 4k7 P1_0 41 STBY_3V3 VSS1 39 100n MCA[3] P4_3 49 83 A9 4k7 C633 VDD3_3_1 40 C630 P1_1 42 S613 S614 93 A2 25V 89 A3 TV_LINK 30 VS 29 HS_SSC 28 NC 27 P2_3 MCA[11] 82 A6 5 R4 4 NC3 61 P1_7 62 NC4 63 WR 64 NC1 51 XTAL2 52 XTAL1 53 NC2 54 VSSA1 55 VDDA2_5_1 56 R 57 G 58 B 59 BLANK_COR 60 RST 50 R639 R3 6 MCA[19] MCA[18] MCA[16] MCA[17] R684 75R R686 75R R685 75R 100k R687 50V 33p C627 C624 50V 33p 100n R676 4k7 C631 100n C615 VCCA_2V5 RST_H STBY_3V3 MCA[19] MCA[18] MCA[16] MCA[17] STBY_3V3 4k7 R640 25V L604 4k7 R648 RD_EMU 4 R4 5 3 2 R2 7 10R 1 R1 8 LM809 IC221 BC848B C622 R657 88 PSEN 3 Q2299 PIN8_SC3 C620 3k9 26 P2_2 25 P2_1 24 P2_0 23 VSSA 22 VDDA2_5 21 CVBS 20 EXTIF 19 OCF 18 STOP IC220 SDA5550M R661 DVD_12V_SENSE R656 15k 470n C618 S615 25V 1k 25V R655 C608 L603 22u 50V 15k C619 R654 470p 10u R697 15k NC STBY_2V5 1n5 NC 50V 2u2 17 ENE RD 65 NC5 66 A19 67 A18 68 A16 69 A17 70 STBY_3V3 10k STBY_3V3 3k9 R2305 22u 50V A15 71 C612 STBY_2V5 FL_A15 FL_PGM 72 VDD3.3V GAL_IAP UP_IRQ STBY PWM SDA3 R691 4k7 VDD3.3V UP_RXD VDD3.3V HEADPHONE PROTECT STBY_3V3 UP_TXD VPC not exist without YPBPR R2303 10k 25V C628 100n 25V 8V_FILTERED2 IR .3V 20 DQ6 NC5 23 NC6 24 NC7 25 A10 26 A11 27 A12 28 A13 29 A14 30 I/O5 31 I/O6 32 A13 28 MCA[19] C617 R651 A0 1 MCAD[6] 19 DQ5 18 DQ4 VCC1 33 MCA[13] A14 29 6 A6 SRAM_OE 1k SCL3 MCAD[6] 13 DQ0 IC218 BZT55C5V6 CORRESPONDS TO Winbound W27E040 EPROM & ST M29F040 Flash A1 2 10k MCAD[5] MCA[4] 7 A5 IC219 M29W040B 8 VCC 10k A2 3 R6010 24LC32A SDA3 MCAD[4] MCAD[0] MCAD[5] 12 A0 MCAD[4] MCA[0] 17 DQ3 MCA[0] 16 VSS 11 A1 MCAD[3] 10 A2 15 DQ2 MCA[1] MCAD[3] SRAM_WE 14 DQ1 MCA[2] MCAD[2] MCAD[1] MCA[2] MCAD[2] MCAD[1] 9 A3 7 WP 47k 22 NC4 21 NC3 20 A9 19 A8 18 A7 17 A6 16 A5 15 WE 14 I/O4 13 I/O3 MCA[3] 6 SCL R6007 R6012 BC848B VSS 4 47k R6009 S624 12 VSS VSS1 34 I/O7 35 I/O8 36 OE 37 A15 38 K6R4008V1C-I/C-P MCA[3] 5 SDA 100R R6011 47k R6008 MCA[9] MCA[8] MCA[7] MCA[6] MCA[5] MCAD[3] MCAD[2] 11 VCC 10 I/O2 9 I/O1 8 CS 7 A4 A16 39 A17 40 A18 41 NC8 42 NC9 43 NC10 44 MCA[6] 5 A7 8 SDA SCL STBY_3V3 Q6004 R612 D1 K A 1 2 STBY_5V 100R R6006 Q6003 47k SCSDA SCSCL 47k R6005 SCL3 C603 100u R6015 220R MCA[7] 16V R6016 220R MCA[9] MCAD[1] MCAD[0] MCA[15] MCA[4] MCA[4] NVM_WP BRT_CNTL MCA[8] MCA[7] MCA[6] MCA[5] MCA[15] MCA[4] 6 A3 5 A2 4 A1 3 A0 2 NC2 IC217 MCA[5] SCL3 R604 MCA[6] SDA3 BRIGHTNESS CONTROL BC848B R609 MCAD[3] MCAD[2] MCAD[1] MCAD[0] CIRCUIT OF SW UPDATE FROM SCART2 MCA[14] MCA[15] MCA[16] MCA[3] MCA[2] MCA[1] MCA[0] C600 100R R611 IR BC848B 47k FL_A14 Q6002 R608 FL_A16 SW_ENABLE 47k FL_A17 Q2 14 R605 Q3 15 1 Q4 16 8 I6 PL600 6 I4 SRAM_OE 2 MCA[19] 4 3 SRAM_WE IC622 GAL16LV8 5 FL_OE Q5 17 47k STBY_5V MCA[14] MCA[15] MCA[16] FL_WE STBY_5V 22R Q7 19 VCC 20 CLK 1 I0 2 I1 3 STBY_3V3 100R R606 R417 BC848B Q6006 GAL_IAP 13 Q1 12 Q0 11 OE 10 GND Q6 18 5 I3 S6300 16V 100n 4 I2 MCA[18] S6310 R412 C419 9 I7 MCA[3] MCA[2] MCA[1] MCA[0] 100n LED2 100u C417 VCC_5V 16V BC848B Q6007 LED1 22R BC327 Q400 16V R416 VCCA_2V5 4k7 MCA[17] 7 I5 STBY_3V3 MCA[7] 7 R1 C416 S621 C601 MCA[17] R2 1k2 S620 100n RD_EMU R3 R415 WR_EMU STBY_3V3 WR_EMU 6 R1 MCA[18] RST# 4 5 R2 C605 2 3 MCA[16] R4 PWM 50V 10u RD_EMU 16V 100n 1 MCA[15] R3 SRAM_OE 25V MCA[14] R4 1 NC1 „:$ PL607 STBY_3V3 R632 WR_EMU 1 2 25V 6MHz RST# FL_A17 C623 100n X600 INT# R693 RST# SERVICE VDD3. s HDMI_3V3 AUDIO_AGND 100n VCC_5V AGND_SII 330R_100MHZ_3A 50V 16V 22u TOCOMP C2061 S800 L2013 Place close to pins 22&23 1n 50V C2077 10n 25V 25V 10u 4k7 C2067 25V 47n 50V 10u 60R_100MHZ_3A S805 100n 25V 100n 25V C2076 50V 10u C2075 AVCC_SII C2074 100n 25V C2073 L2015 AUDIO_AVCC5 L2017 C2063 C2060 60R_100MHZ_3A 330R_100MHZ_3A compact and as close to 50V 1n 100n HDMI_3V3 C2094 Place PLL circuit as GND_SII TOCOMP 1n 50V 1n 50V C2059 25V 100n C2058 100n 25V C2057 C2056 C2055 L2012 50V 10u 100n 25V C2054 RX1_AVCC3 HDMI_3V3 2k32 R2076 DAC_MCLK VCC_5V 60R_100MHZ_3A R2074 270k 100n 2 DEM/SCLK R2041 10u 50V 25V R2073 270k DAC_SCK R2040 AUDIO_AGND 2n7 50V C2095 3u3 50V OGND_SII 25 NC3 24 PLLIN 23 PVCC2 22 PGND2 21 OVCC 20 RSVDO2 19 RSVDO1 18 RSVDL1 17 VCC1 16 GND1 15 ANBPB 14 DACVCCB 13 DACGNDB 12 ANGY 9 RSET 11 DACVCCG MCLKOUT 26 10 DACGNDG 100 VCC4 8 COMP CH3 4 VCC_SII HDMI_3V3 7 ANRPR 3 CH2 MCLKIN 27 6 DACVCCR VP 5 99 GND4 1 DACVCC CM1213 2 GND GND_SII 5 DACGNDR CH4 6 4 NC2 1 CH1 OGND1 28 AOUTL 8 98 AGND5 AGND_SII 3 NC1 IC2011 PL2001 DAC_SD0 4 R4 5 1 SDATA SPDIF 29 R3 6 DAC_SD0 97 RX2+ 2 DACGND 1 10R 3 2k32 R2075 SDO 30 C2088 96 RX2- C2107 10R R2061 IC2006 R2060 2 2n7 50V TAKILACAK 95 AVCC3 DAC_SCK 30025106 AVCC_SII SCK 32 R2092 240R 94 AGND4 AUDIO_AGND R2093 240R AGND_SII 2n7 50V C2097 C2089 DHS_2EX 33R 1 R1 8 16V 4 3 33R R2042 AOUTR 5 HSYNC 33 4 MCLK VSYNC 34 93 AVCC2 DAC_MCLK 92 RX1+ R2043 AVCC_SII AUDIO_AGND R2044 10R C2096 2n7 50V AGND 6 R2059 DE_2EX 3 LRCK 33R DAC_WS DE 35 AUDIO_AGND AUDIO_AGND R2045 91 RX1- 10R C2098 C2090 AUDIO_AVCC5 R2058 6 5 R3 6 4 R4 5 Q23 36 1k2 3 Q22 37 VA 7 90 AGND3 CS4334 AGND_SII 5k6 89 AVCC1 R2079 88 AGND2 AVCC_SII 4k7 AGND_SII R2078 10 9 8 7 IC2002 SII9993 R2077 10R AUDIO_AGND R2046 R2057 11 AUDIO_AGND 10R 12 AMP_PIN7 AVCC_SII R2054 5k6 P1_DDC_SCL R2047 1 R1 8 R2084 P1_DDC_SDA 15 CLK_2EX OGND_SII AUDIO_AVCC5 R2083 2k32 16 OGND2 45 1 A 81 EXT_RES RX1_AVCC3 2n7 50V 17 4 D 0VCC_SII 33R 47k 3u3 50V ODCK 46 R2080 100k P1_CBL5V F 6 80 PVCC1 R2048 18 3 C OVCC2 47 AMP_PIN3 Q16 48 79 PGND1 AMP_PIN6 P1_HPD 1k2 78 OGND5 R2086 CH3 4 Q15 49 OGND_SII HDMI_3V3 R2082 2k32 3 CH2 Q14 50 77 DSCL R2089 100n MC33202 VP 5 76 DSDA 2 B 2 GND DSDA G 7 H 8 Q12 52 Q11 53 Q10 54 Q9 55 OVCC3 56 AUDIO_AGND 100n C2099 25V MC33202 19 1n 50V AUDIO_AGND 10u 50V C2104 IC2008 TP100 CM1213 AUDIO_AGND 25V DSCL C2071 CH4 6 20k C2103 AUDIO_AGND 100n 25V 1 CH1 R2091 10u 50V AMP_PIN6 4 R4 5 R3 6 3 R2049 2 R2 7 1 R1 8 DIN[2] DIN[1] DIN[3] 4 R4 5 R3 6 3 C2101 DAC_AOR 0VCC_SII OGND_SII OGND3 57 Q8 58 Q7 59 Q6 60 Q5 61 Q3 63 2 R2 7 DIN[0] DIN[15] R2050 4 R4 5 R3 6 3 2 R2 7 1 R1 8 DIN[14] DIN[13] DIN[12] DIN[11] 4 R4 5 R2051 1 R1 8 DIN[9] DIN[10] VCC_SII VCC3 64 GND_SII GND3 65 0VCC_SII Q2 68 OVCC4 67 Q1 69 Q0 70 RX1_RST# RX1_INT SCL3 R2053 4k7 RESET 72 C2070 IC2010 RSVDL2 73 10u 50V CSDA 75 L2014 C2069 Place close to pins 79&80 60R_100MHZ_3A C2068 CSCL 74 SDA3 100n INT 71 25V Q4 62 56R P1_DDC_SDA 2 R2 7 R2052 R2065 OGND_SII HDMI_3V3 SDA 5 1 R1 8 56R P1_DDC_SCL 4 VSS R3 6 R2064 3 DIN[8] SCL 6 OGND4 66 3 A2 AUDIO_AGND S2 4 S2 4 DSCL R2088 100k 3 D2 3 D2 RX1_RST# AUDIO_AGND 47k R2063 G2 5 G2 5 R2068 UPA672T 2 G1 2 G1 R2069 4k7 D1 6 2n7 50V WP 7 4k7 R2062 100n 25V C2072 1 S1 IC2003 2 A1 P1_HPD UPA672T VCC_5V VCC 8 D1 6 DSDA IC2012 24LC02 1 A0 1k P1_5V HDMI_3V3 AUDIO_AGND .„:$ R2067 470k P1_EVCC5 R2066 470k R2070 IC2013 1 S1 AM24LC02 10k DIN[0-23] C2100 AMP_PIN7 DIN[23] DIN[22] DIN[21] DIN[20] DIN[19] DIN[18] DIN[17] DIN[16] DIN[7] DIN[6] DIN[5] DIN[4] 560R R2087 AUDIO_AVCC5 Q13 51 C2102 270p R2090 50V 47k 10R 82 AVCC Q17 44 83 RXC- Q18 43 84 RXC+ Q19 42 3 13 CEC AGND_SII 50V 10u R2081 560R 4 R4 5 85 AGND1 GND2 41 GND_SII 86 RX0- VCC2 40 VCC_SII 87 RX0+ Q20 39 1 R1 8 Q21 38 2 R2 7 AMP_PIN3 C2093 C2092 C2091 14 R3 6 DAC_AOL 10R E 5 2 R2 7 R2055 AUDIO_AGND 270p 50V R2056 33R R2085 DVS_2EX WS 31 2 R2 7 DAC_WS 33R 33R AUDIO_AGND R2035 100R 0VCC_SII 4k7 R2038 VCC_SII Close to pin9 L2016 chip as possible C2062 3k9 25V R2039 VCC_5V OGND_SII K 2 BZT55C5V6 P1_EVCC5 A 1 S804 HDMI_CEC 1N5817 HDMI_3V3 100n C2106 C2105 50V 22u 100n 25V CEC HDMI_3V3 10R D2020 1n 50V C2087 1n 50V 100n 25V C2086 C2085 100n 25V C2084 C2083 50V 10u 0VCC_SII LM317 IC2009 3 IN OUT2 ADJ 1 S2004 D2022 D2021 R2071 P1_CBL5V S803 HDMI_3V3 1N5817 GND_SII 30031677 TAKILACAK VCC_5V pin8 P1_5V 1n 50V C2082 1n 50V 100n 25V C2081 100n 25V C2080 C2079 C2078 50V 10u S802 C2064 C2065 close to R2072 VCC_SII 4k7 S801 C2066 C2108 10u 50V Place cap. C 16V C935 16V 100n C934 16V 100n 100n C933 C912 16V 1000u R900 470R C932 4R7 16V R916 22u 16V 100n VCC_5V 1N4148 10k 4R7 N.9A_SMD 22u 16V 1_8VMAIN C924 4 FEEDBACK 3 GND L911 VA1_8 C941 100u 100n 16V 16V C938 C930 C929 22u 100u 100n 22u 16V L916 1_8VMAIN C926 16V 100n C913 SS33 C911 22u D911 DIG_DIM_PWM 2 SAP 30030067 ADJ TYPE R905 160R BRT_CNTL S901 IC903 LD1117 BLM21B201S 1 R904 330R 100u S900 A_DIM_PWM 3 L908 22u 16V VCC_12V STPS745 D904 10 2 OUTPUT 7 8 9 1 VIN VCC_12V C905 VCC_33V D903 1N4007 100u STBY 5 6 16V PROTECT IC223 LM2576 1N4007 VCCD_3V3 SEL SOT 223 D902 VCCA_3V3 DIG_DIM_PWM 3 4 .3 16V S904 S903 STBY_5V L905 L920 5 6 MMC SUPPLY 3 4 STBY_3V3 2 3 4 VCC_5V 2 7 5 6 3 4 L906 PL900 1 2 PL902 L917 1 PANEL_VCC VCCA_3V3 5V 2 4 3 VCC_12V N.C R913 L921 VCCA_2V5 L922 C923 100n 47u 50V C921 5 ON/OFF BLM21B201S 16V L915 C939 100u 100n 16V 16V C936 C927 100u 16V 100n VL1_8 16V 22u C925 1_8VMAIN S902 1_8VMAIN L914 C940 100u 100n 16V 16V C937 C928 100u VD1_8 16V L910 100n 22uH_3.C C914 220u 16V 100n 50V C908 C906 1000u 16V L901 16V R914 16V R902 12 D908 VCCA_3V3 A_DIM_PWM 2 1N4007 R910 100n VCCD_3V3 D910 VCC_8V 1N4148 R909 120R C919 100u 16V VDDMQ_2V5 C917 C922 100n 1R 120R R911 STBY_2V5 R915 470R 16V C918 D901 D909 1N4148 3 VIN VOUT2 GND 1 50V 22u 1N4007 1 VCC_5V 16V 16V D900 C915 100n 100n C931 L912 C902 100u R901 470R 16V 47u PL901 1N4148 CS52015-3 IC901 C903 N.C 10k R908 Q900 BC848B R917 L919 D907 R912 BC858B Q901 PROTECT 10k C909 47u 50V 16V R903 5k6 R907 C910 100n 1k 10k VCC_8V 100n 10k 47u 50V C901 L904 STBY_3V3 3 IN OUT2 ADJ 1 C904 11 BL_ON/OFF 1N4007 LM317 IC900 L902 10 STBY_3V3 STBY_2V5 D906 1 C916 100n 1N4007 2 L907 L900 L913 IC902 C920 3 SOT 223 220u +12V L903 7 8 9 D905 FAN1616AS-3.„:$ PL903 L918 VCC_12V C900 BL_ON/OFF 100u 16V 5V 1 PL904 1 LG_1 L909 STBY_5V N.
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