CUIT401: Microprocessorsand Microcontrollers Features of 16-bit 8086 microprocessor Lecture 3 Presentation Layout Lecture objectives Introduction Features of 8086 Architecture of 8086 8086 co-processors 8086 internal components Questions Conclusion References 2 Lecture Objectives At the end of the lecture students should be able to: Describe the features of 8086/88 Identify the internal components of 8086/88 Explain the functions of BIU and EU Explain the implementation of pipeline in 8086 3 Introduction All modern Intel processors owe their basic architectures to the 16- bit 8086 processor It is important to understand this structure in order to understand more complex processors 4 . internal registers and most of its instructions are designed to work with 16bit binary words 5 .16 Bit? Introduced by Intel Corporation in 1978 8086 is a 16bit processor. It’s ALU. It can read data from or write data to memory or I/O ports either 16bits or 8 bit at a time. Internal data paths are at least 16bits wide. Upwardly compatible with the older 8080/8085 series of 8-bit microprocessors. 6 .allow programs written for the 8080/8085 to be easily converted to run on the 8086 8086 has a 16bit data bus. i. 7 . 8086has a 20bit address bus/lines which means.e. it can address up to 220 = 1 048 576 memory locations 1Mbytes of memory words. 16 bit numbers are stored in two consecutive memory locations. Each of the 1 048 576 memory addresses of the 8086 represents a byte –wide location. and the second byte in another operation. 8 . the 8086 will read the first byte of the word in one operation. 8086 includes few features. which enhance multiprocessing capability (it can be used with math coprocessors like 8087. If the first byte of the word is at an odd address. Due to the 1Mbytes memory size multiprogramming is made feasible as well as several multiprogramming features have been incorporated in 8086 design. I/O processor 8089 etc. the 8086 can read the entire word in one operation. If the first byte of a word is at an even address. Frequency range of 8086 is 5-10 MHz 8086 runs at 5 MHz (standard operating speed). Operates on +5v supply and single phase (single line) clock frequency. 8086 comes with different versions. 8086-2 runs at 8 MHz. (Clock is generated by separate peripheral chip 8284). 8086-1 runs at 10 MHz It is housed in a 40-pin Dual-Inline- Package (DIP) 9 . It has multiplexed address and data bus like 8085 due to which the pin count is reduced considerably. The min mode is designed for small single processor systems whilst in the max mode the device is designed to work in medium or large systems using more than one processor. 10 . Contains approximately 29.000 transistors and is fabricated using the HMOS((High density. short channel MOS) technology . 11 . But the concept of its principles and structures is very useful for understanding other advanced Intel microprocessors. Higher Throughput (Speed)(This is achieved by a concept called pipelining). Nowadays 8086 is no longer used. The family includes several “ slave” processors that perform jobs that the processor itself cannot or not as easily .8086 MP is a member of IAPX-86 family. 8089 – I/O processor . 8288 – bus controller 5.8086 Support Processors 1. 8087 – numeric data processor 6. 8282/8283/8286/8287 – bus demuxing 4. 8259A – Interrupt controller 3. 8284 – clock generator 2. Thus the MN/MX¯ is grounded.8087. Instructions for 8087 are written in the program as needed. An 8087 instruction may perform a given mathematical computation 100 times faster than the equivalent sequence of 8086 instructions. As a coprocessor (8087) is connected to 8086. interspersed with 8086 instructions. 8087 is an actual processor with its own specialized instruction set. 14 . 8086 operates in maximum mode.Math co-processor Intel 8087 is a processor with architecture and instruction set optimized for performing complicated arithmetic operations. READY synchronization. Connected to 8086 by the RESET. 8088 and 8089 processors. RESET synchronization.Support Component Function 8259A Programmable Identifies highest-priority Interrupt Controller (PIC) interrupt request 8282 Octal Latch Demultiplexes and increases 8283 Octal Latch drive od address bus (inverting) 8284 Clock Generator and Generates system clock for driver 8086. READY and CLK pins 15 . 8088 and 8089 processors Multi processor environment 8289 Bus Arbiter Controls access of microprocessors to multimaster system bus 8237 DMA Controller 16 .Support Component Function 8286 Octal Bus Increases drive on data bus Transceiver 8287 Octal Bus Transceiver (Inverting) 8288 Bus Controller Generates bus command signals for 8086. instructions. There are also devices to perform arithmetic and logical operations. 17 . Include the temporary storage devices known as registers.Architecture of 8086 Architecture describes the functional components that make up the MPU and the interaction between them. which are used to hold data. and status information. Control devices are used to control the flow of information through the MPU. 18 . 19 . 20 . 8086 CPU is divided into two independent functional parts. the Bus interface unit (BIU) and execution unit (EU). Bus interface unit (BIU) The BIU main components are Segment Registers Instruction Pointer 6-Byte Instruction Queue 21 . It computes and sends out addresses. 22 .Functions of BIU It handles transfer of data and addresses between the processor and memory / IO. It stores fetched instruction codes in a FIFO register called QUEUE. It fetches instruction codes. It reads data from memory and I/O devices. It writes data to memory and I/O devices. This pre-fetching operation of BIU may be in parallel with execution operation of EU.Instruction Queue To increase the execution speed. which improves the execution speed of the instruction. BIU fetches as many as six instruction bytes ahead to time from memory. Then all bytes are given to EU one by one. All six bytes are then held in first-in-first-out 6-byte register called instruction queue. 23 . Execution Unit Execution Unit contains: General Purposes Registers Stack Pointer Base Pointer Index Registers ALU Flag Register Instruction Decoder Timing & Control Unit 24 . It tells BIU where to fetch the instructions or data from. It contains the control circuitry to perform various internal operations. which can perform arithmetic and logical operations on 8-bit as well as 16-bit data. 25 . It decodes it and then executes it. It has 16-bit ALU.Functions of Execution Unit It receives opcode of an instruction from the QUEUE. This type of overlapped operation of the functional units of a MP is called Pipelining. BIU and EU operate in parallel independent of each other.Pipelining While EU executes instructions. 26 . BIU fetches instructions from memory and stores them in the QUEUE. EPROM.Questions Explain the implementation of pipelining in 8086 processor? Identify the various versions and speeds of 8086 Explain the use of each : ROM. PROM. 27 . EEPROM State and explain 2 similarities and 2 differences oft he Intel 80386 chip and the Motorola 68030 chip. 80386sx e. 80286 d.Questions ctd What are the data bus sizes and address bus sizes of: a. 80486 g. 8086 c. 80586/Pentium 28 . 80386 f. 8088 b. Questions ctd Describe the difference between a Harvard architecture machine and a Von Neumann architecture machine. Where would you place 8086MP and 8051MC 29 . Conclusion Instruction set for 8086 is extended to higher processors Programs written for 8086 should run in higher processors with minimum modifications 30 . CRC Press. 2003. Introduction to Microprocessors and microcontrollers. Chen... J.References Brey. Elsevier. LLC. B. W. Microprocessor and ASIC.-K. Crisp. New Jersey: Pearson Prentice Hall International. 2009. Memory. 31 . 8086/8088-Core2 with 64bit extensions: Architecture. Programming and Interfacing. 2004.. 2nd ed.B. The Intel Microprocessors. 8th ed.