Electronic Interlocking

S 18 ELECTRONIC INTERLOCKING Issued in November 2009 INDIAN RAILWAYS INSTITUTE OF SIGNAL ENGINEERING & TELECOMMUNICATIONS SECUNDERABAD - 500 017 S-18 ELECTRONIC INTERLOCKING CONTENTS S. No 1 2 Annexure-I Annexure-II Annexure-III Chapter Introduction to Electronic Interlocking MICROLOK-II EI system Electronic Interlocking Spec. No: RDSO / SPN / 192 / 2005 Items of Microlok-II EI system (Centralised version) for a typical 4- Road Station Items of “ All Indoor Works for provision of Microlok-II EI system (Distributed version with OFC) at Stations of Indian Railways” Technical Specifications of E.I. Failure summery of Electronic Interlocking system at Stations of Indian Railways Factory Acceptance Test and Site Acceptance Test of Microlok II SIMIS S EI system ESA11- IR Electronic Interlocking System Manufactured by AZD Praha GE system of Electronic Interlocking Pre-commissioning Checklist Review Questions P. Raju, IMS-2 , S.V.K. Hanuman, IES-5 Jyotirmoy Ray, Asst Prof /Sig Ch. Mohan, Sr. Prof / Sig P.V. Surya Narayana, JE I (D) 145 November 2009 A4 Page No 1 14 49 65 70 72 81 85 101 122 131 136 144 Annexure-IV Annexure-V Annexure-VI Annexure-VII Annexure-VIII Annexure-IX Annexure-X Annexure-XI Drafted By Checked By Approved By DTP and Drawings No. of pages Date of Issue Version No © IRISET “ This is the Intellectual property for exclusive use of Indian Railways. No part of this publication may be stored in a retrieval system, transmitted or reproduced in any way, including but not limited to photo copy, photograph, magnetic, optical or other record without the prior agreement and written permission of IRISET, Secunderabad, India” http://www.iriset.ac.in (a) First EI (Microlok I ) is installed at Srirangam (SR) in 1987. Two Officers from Railways were posted on this project to IlT. consumes less power. These lever frames not only increased in size occupying more space but also required intensive maintenance. The wiring diagrams for such installations run into hundreds of sheets. the advantages of relay based interlocking installations are being nullified. Brief history of EI s in Indian Railways is follows. RDSO and DOE funded the project for design. This system occupies considerably less space. electronics and particularly microprocessors have found acceptance in the area of railway Signalling world over. 1997 CGL. it was decided by Railway Board to manufacture four engineering models incorporating necessary improvements. development and prototype fabrication jointly. Individual relays. Even for small yard re-modeling like addition of a loop line. 1998 . Railways and DOE funded these jointly on 50:50 basis. Two industries (M/s DCM & CGL) were also associated in development and fabrication of the prototype. Page 1 (S18) ELECTRONIC INTERLOCKING .1 Introduction of Electronic Interlocking : The era of interlocking started with mechanical lever frames. North America & Australia have gone for large scale introduction of microprocessor based Electronic Interlocking system (EI). Based on field trial results. This development resulted in relatively faster operation. This exercise requires traffic blocks of long durations and large manpower to manage the traffic during blocks. these lever frames gave way to relay interlocking based installations. all the above activities are required to be redone.INTRODUCTION OF ELECTRONIC INTERLOCKING CHAPTER 1 : INTRODUCTION 1. Delhi. a project was started at IIT Delhi in July 1983. A design of the system was evolved in March 1985. Route Relay interlocking (RRI) and Panel Interlocking (PI) installations use Electromechanical relays requiring complex wiring and Inter-connections. through a centralized control panel or through VDU. More than 350 EI have been installed in Indian Railways so far of various makes and 75 more in various stages as on 2009-10. The prototype was installed at Brar Square Station of Northern Railway for field evaluation. Also. signals. like existing relay based/ mechanical interlocking systems. (e) Third indigenous EI – Installed at Uppugunduru (SCR) – Stand alone – Warm standby . initial commissioning & changes due to yard re-modeling can be carried out in negligible time requiring skeleton manpower for traffic management during the blocks. (b) First indigenous EI – Installed at Brar Square (NR) – (Parallel operation)-1987-88 (c) First indigenous EI – Installed at Dushkheda (CR) – Stand alone – October. Delhi. fail safety in operation and reduced size of buildings required for housing of interlocking installations. level crossing gates etc. large number of Route Relay Interlocking and Panel Interlocking installations were commissioned. used for controlling points. design and fabrication of SSI Mark-II system was taken up by RDSO in association with lIT. wiring and interconnections along with thousands of soldered joints are required to be physically examined and certified.) . Thereafter. Therefore. (d) Second indigenous EI – Installed at Bhadli (CR) – Stand alone – March. Railways in advanced countries of Europe. Based on a proposal for development of Electronic Interlocking System. is more reliable and is easy to install and maintain. 1995 DCM.RPIL. With development of modern fault tolerant and fail safety techniques. With the advent of Electro-mechanical relays. With further increase in traffic and expansion of railway network.April. size of lever frames also increased. The design was evaluated through software simulation at IIT Delhi and a prototype based on this design was fabricated in 1987. submitted by IIT Delhi to DOE. EI is a computer based electronic interlocking system. (Microprocessor or Micro controllers are used in EI’s. As the size of yards & train movements increased. e. Hence easy for rectification of failures and reduces the failure duration. less wiring. error code/ alarm code messages will be displayed on display cards or on the front panel of printed circuit boards. Datalogger / Event logger is an integral part of EI. Such proposals for EI at signalling installations below 50 routes have to be justified on a case to case basis based on life cycle cost including capital cost. Dated 30th January. (f) Enables usage of OFC (with Object Controller) which reduces requirement of Copper cables . and level crossings controls is feasible.) both for initial installation and also for yard alterations (which can be done using application software compiler which is user friendly. RRI with relay based interlocking of Metal to Carbon or Metal to Metal type according to the expertise available on the railway. Thus Compatible with centralized traffic Control. (g) Remote operation of signals. 2006 Up to 50 routes Relay based interlocking of Metal to Carbon or Metal to Metal type according to the expertise available on the railway. (b) Non-Interlocking period is less (Typically few hours instead of few days. Expertise of hardware and software is not much needed for maintaining the equipment at initial stage. points. (In special cases.) 50 to 200 routes Above 200 routes Electronic interlocking.vital EI replaces interlocking circuits Thus less space required for signal equipment room (Relay rooms). (k) Self-diagnostic in feature: i.The above policy will be applicable to all new works and such of those sanctioned works where detailed estimates are not yet sanctioned. thus requiring less staff . (e) Less power supply as compared with existing PI/ RRI’s. (h) All EI’s are designed and manufactured as per the international safety committees – such as CENELEC STANDARDS (European countries). Less failures. and concurrence of the associate finance obtained.) (c) Modular in design and easy for maintenance. IRISET Page 2 . depreciation provision. less soldering.INTRODUCTION 1. 10-09-2003 and 2003/Sig/G/5/Pt. EI may also be adopted in installations below 50 routes on a case to case basis. their cost & maintenance. (i) (j) Standard of safety and reliability is higher as compared with existing relay interlocking systems (PI/RRI). ( Note : Bd has directed RDSO to finalise new Specification for EI for above 200 routes also vide Lr No . annual maintenance cost. 2003/Sig/G/5 dt.2 Advantages of Electronic Interlocking System: (a) System can be tested at factory level using simulation panels. (d) Requires less number of relays . Policy on type of Interlocking to be adopted : Board has decided the following policy to be adopted on IR vide Board’s letter Nos. less complexity in the circuit.2008/SIG/SGF/4 /EI /GEN dt 29/07/09) Note :. saving due to avoidance of repeated relay wiring due to anticipated yard remodeling etc. Point Indication.) through relays and take feedback (input) from various field gears (Track. (used for storing Executive and Application software) (d) EEPROM – Electrically Erasable Programmable Read Only Memory. Page 3 (S18) ELECTRONIC INTERLOCKING . (used for storing Executive and Application software) (e) OBJECT CONTROLLERS (OC): (i) Object controller is the equipment which drives the field function through conventional Relay or directly through its own electronic circuitry. It also takes inputs from the field.. (ii) Object Controllers drive the field gears (Points. (v) By using Object Controllers Main signalling cables between Equipment Room (Relay Room) and Location Box of field functions can be eliminated. (iii) Object Controllers are used as slave unit of Main system .VARIOUS TERMS USED IN E I 1. Signal etc. (iv) Object controller and Main system can be connected by copper cable or Optical Fiber Cable (OFC) or wireless.3 Various Terms used for EI’s:(a) CPU – Central Processing Unit ( Micro processor or Micro controller) (b) RAM – Random Access Memory (used for vital data processing and event / error logs) (c) EPROM –Erasable Programmable Read Only Memory. Aspects etc) through concerned relay contacts. 1 (a) NO YES YES YES At command level and I/O cards level processor cold stand by YES YES AZD-PRAHA ESA 11. Mahaboob Nagar (HYB division).Vizianagaram Palasa section. SNE. Leelapur Road.IR (See Annexure-VIII) - 2 out of 2 YES At control level Processor SC division.1 (a) NO YES NO YES SIEMENS SIMIS S (See Annexure-VII) - NO YES YES YES WESTING HOUSE WESTRACE 7. KOP-KRD section.. Naupada. Mahalimarup station. Manufacturer MODEL RDSO/SPN/ 192/2005 clause No Hardware Redundancy Software Diversity Standby arrangement HotWarm standby standby Some of the installations ECoRly. etc. Tilaru. Rajkot Division of Sabli Road.-12 Nos GE ALSTOM KYOSAN VHLC (See Annexure-IX) ASCV SMARTLOK KB-5 7. Lakhtar. Walter division of Kottavalsa . Shirwade.. Vani Road. CKP division. DMRC On BRC Division. SERly. Pundi. BZA-BBQ Section SCRly. Kotabomalli. etc. WRly.INTRODUCTION Different types of Electronic Interlocking Systems currently used in Indian Railways. PA division. US & S MICROLOK-II 7. etc. Bala Road. Western Railway. 7 Kyosan Systems of have been installed in 2005-2008 IRISET Page 4 .1(b) - YES NO 2 out of 2 YES YES NO NO YES CRly. SCRly.. 1.4. 1.4.1 Single Hardware with software redundancy.CLASSIFICATION OF EI’S 1. (b) Hardware Redundant. Ex: (i) VHLC – GE Transportation (ii) SICAS S5 – SIEMENS EI (iv) ESA 11 – AZD Praha (vi) ESA 12 – AZD Praha (vii) EBI LOCK 850 – Bombardier Transportation.3 Triple Modular redundancy . Ex: (i) (ii) (iii) (iv) (v) MICROLOK -II US&S.SIEMENS SICAS – SIEMENS ESTWL90 – ALCATEL In this TWO out of THREE hardware (identical) system Software used in hardware may be identical or diverse. Page 5 (S18) ELECTRONIC INTERLOCKING .Hardware redundant .4 Classification of EI’s: Depends on redundancy EI’s are classified as : (a) Software Redundant.2 out of 3 system Ex: (i) (ii) (iii) (iv) ALSTOM – SSI SIMIS –W .4. Software used in both hardware may be identical or diverse.SIEMENS EI With this configuration hot standby or warm standby with auto changeover arrangement is required. ASCV (SMARTLOK) – ALSTOM. SIMIS S .2 Dual Hardware with Hardware redundancy – 2 out of 2 system. With this configuration hot standby or warm standby with auto changeover arrangement is required. WESTRACE – WESTING HOUSE VPI – Vital Processing Interlocking – ALSTOM. 1. 1 Any computer-aided systems require the study of both hardware and software of the system. Field relay contacts) are connected to these input cards of EI system. NWNs. GNs . RWNs.1 (a) Input Cards : All the field conditions (i. Total inputs means: (i) Field inputs (ii) Panel inputs : : ECRs. These cards will read the conditions of inputs and passes the information to EI system. A brief description of common hardware features for different Electronic Interlocking Systems are discussed as follows.2 Common Features of Hardware: (a) Electronic Interlocking System is a microprocessor based electronic device with fail-safe information processing used in place of conventional relay interlocking systems. WNR. Software (Program) is a set of instructions given to a microprocessor (computer).5 TYPICAL HARDWARE USED IN EI 1.1. Fig.e.No. etc. 1. The total number of inputs will depend on the yard layout. printed circuit boards (PCB’s) provided in the computer aided Signalling system. UNs. WRR etc (iii) Read back inputs : Opto couplers are provided to isolate field optically from the system in Input cards.INTRODUCTION 1.5. TPRs. Study of hardware involves the study of components. IRISET Page 6 . NWKR etc. HR.5. DR. The maximum inputs capacity of each RI card will depend on design of the RI cards by different manufacturers. The output of this card is terminated on phoenix terminals from there the output relays are connected. This is provided with microprocessor. ROM. EPROM. Processor card will sense the operation of the panel operation of the panel operator (through inputs cards) and process according to the program available in EPROMS and finally gives output if the conditions are favorable (i. Application Software. Page 7 (S18) ELECTRONIC INTERLOCKING . Whenever the panel operator operates the push buttons. Some manufacturers are providing EEPROMs. EEPROM Memory IC’s. Before sending the output-to-output relays safety checks will be done internally.e. i.COMMON FEATURES OF HARDWARE (b) Processor card: This card is also called as central processing unit card of the System. field condition relays are favorable as per principle of interlocking). Factory installed software Performs all operations This is as per table of control of specific station Can be installed at site by signal engineers. RAM. Different for different stations. DATA EPROM’s are to be replaced with new DATA EPROM’s at the time of yard alteration works. Executive Software This software is common to all EI’s for the This software is specific to each station. The output voltage generated by the CPU card will be connected to Relay output cards. in which program can be erased electrically and reprogrammed with new software as per new changes using a debug port. Function of CPU Card : This card will execute the commands given by the user (station master/panel operator).e. Output card (Relay Drive Card): This card receives the output of CPU card as input and picks up relevant output relay as per the panel operators’ request. These EEPROMS or EPROM’s (ROM’s) are programmed with software required for executing the system commands. Cuts off vital supply voltage to output Logic installed through Boolean expressions relays. or user-friendly equations. same company manufacturing. System software consists of the following: Executive software programmed in system EPROM’s Application software programmed in DATA EPROM’s. the relevant push buttons will be operated. in case of unsafe failures.. yard data as per new table of control software is to be programmed in the EPROM’s For doing yard alterations as per the new table of control (interlocking) EI compiler software is used. In all EI installations. After processing the interlocking logic the output is written in RAM and then according to a fixed program.No. CH slot circuit etc). and CPU card with RAM and ROM are inter connected.3 Basic Principle of Hardware design : The Basic principle of design is shown in Fig. Microprocessor based equipment cannot be designed to work on fail safe principle at all times.e. During execution of commands it reads the status of all inputs and writes on the RAM..2 System Bus for information (data) exchange.5. reliability has a much more importance role to play which is achieved by redundancy.4 Safety and Reliability of Hardware : Prime objective of EI design for Railway Signalling shall be. Fig No: 1. CPU will execute the panel commands as per the program stored in the memory chips. to obtain fail safe features similar to that obtainable in relay interlocking systems which are already existing. point operation circuit. Input/output cards.INTRODUCTION 1.5. To ensure safety and reliability there are three approaches to the hardware (redundancy) design of EI’s globally.1.2. Input cards gives information of all inputs to system Bus. (a) Single processor system – with extensive safety checks. CPU card will read the status of inputs and output cards are connected to output relays for operating the circuits (i. 1. all the EI’s should have self-diagnostic features so as to achieve fail to safety condition. (b) System with redundancy (two out of two) – failsafe (c) System with redundancy (two out of three) failsafe and failure tolerance. these are written to the output registers of the output cards through which output relays are actuated. signal lamp circuit. The output of the system should be cut off whenever the system detects any unsafe condition. IRISET Page 8 . Therefore. Fail-safe EI system can be obtained only when it is made possible to detect any fault in the system instantly on occurrence to apply remedial measures. So. Stage-3 Overall system.TESTING AND VALIDATION 1. Testing at this stage can be carried out by simulation for accelerated testing using computers. etc. 1. (d) System architecture should be such as to give very high overall availability while ensuring high degree of safety. 1. electromagnetic interference. Stage-2 Each card or the circuit module of the hardware is tested under normal as well as fault conditions.6 TESTING AND VALIDATION Testing and validation of a microprocessor based safety system is carried out in four stages as described below: Stage-1 Theoretical design of the hardware and program structure of the software are examined for reliability and fail-safety at the initial design level. availability. functional testing shall be done by the purchaser as per the Selection table. In the case of software. maintainability & safety apart from meeting full functional requirements. various architectures have been suggested in Para 7.7 REQUIREMENTS FOR ORDERING OF ELECTRONIC INTERLOCKING SYSTEM While ordering EI. each routine is tested with diverse test data. The main features are: (a) System should meet functional requirements and have future expandability.8 CRITERIA FOR THE SELECTION OF EI SYSTEM The main criterion for the selection of EI System is its reliability. Stage-4 Exhaustive field trials of the equipment is conducted under the field conditions. (e) System validation to international standards to meet safety integrity level 4 (defined in CENELEC Standards). purchaser is required to furnish the following documents to the supplier: (a) Approved Interlocking Plan (b) Approved Panel / Front Plate Diagram (c) Selection table. RDSO/SPN/192-2005.1 of the specification No. (b) Meet the requirements of environmental conditions. After installation at the station. after integration of hardware and software is tested under different input data conditions. Page 9 (S18) ELECTRONIC INTERLOCKING . To meet above main requirements. (c) System should be user friendly and economical (example – object controller for yards). 3 (b) Dual Hardware with Hardware redundancy – 2 out of 2 system: DUAL HARDWARE WITHOUT STANDBY Fig No : 1.INTRODUCTION 1.8.4 IRISET Page 10 .1 Block diagrams of various available systems is given below: (a) Single Hardware with software redundancy: Fig : Single Processor without any Standby SINGLE PROCESSOR WITH STANDBY (TWO EI’S CONNECTED IN PARALLEL) Fig No :1. BLOCK DIAGRAM OF VARIOUS AVAILABLE SYSTEMS DUAL HARDWARE WITH WARM STANDBY Fig No : 1.5 DUAL HARDWARE WITH HOT STANDBY Fig No : 1.6 DUAL HARDWARE WITH OBJECT CONTROLLERS Fig No : 1.7 Page 11 (S18) ELECTRONIC INTERLOCKING . 8 TMR WITH OBJECT CONTROLLERS Fig No : 1.Hardware redundant .2 out of 3 system: TMR WITH RELAY INTERFACE Fig No : 1.INTRODUCTION c) Triple Modular Redundancy (TMR) .9 IRISET Page 12 . the following are to be considered for any Electronic component – based Railway Signalling equipment. (b) Random failure integrity. ATP.2 Various Design aspects of the System to achieve viability & safety: Design of electronic Railway Signalling Equipment based on processor and/or software has to ensure that safety integrity of whole system/sub-system is maintained through out the life of the equipment.The Specification & Demonstration of Reliability.9 European Committee for Electro technical Standardization (CENELEC) has come up with several Standards. Level-4 has highest level of safety integrity. EN 50121 EN 50126 EN 50128 --. EN50126 for RAMS fail-safe systems like EI. Safety integrity of any system covers mainly two components: (a) Systematic failure integrity.Railway applications .Electromagnetic Compatibility (EMC). another Standard.Software for Railway Control and Protection Systems.8.4. Safety integrity is specified as one of 4 discrete levels by IEC/CENELEC Standards. EN 50159 --. EN 50129 Besides these Standards if Communication Line is used in Railway Signalling as in the case of Block Signalling or Axle Counter.Railway applications .4 standard of EN50129 and EN50128. dangerous failure rate per hour for continuous mode of operation should be less than 10-10. --. AFTC are verified and validated to SIL.is also to be considered.Safety Related Electronic Systems for Signalling. --. Availability. out of which. Maintainability and Safety (RAMS). 1.Signalling and Communications — Safety-related Communication -. --Railway applications . *** Page 13 (S18) ELECTRONIC INTERLOCKING . It is necessary to specify both the Systematic & Random failure integrity requirements of the system if adequate safety is required to be achieved.VARIOUS DESIGN ASPECTS OF SYSTEM 1. For Safety Integrity Level . (a) Monitoring all Vital and Non-vital cards.1 Introduction: Microlok is a trade name of US&S currently known as Ansaldo STS India Pvt Ltd.3 Software used in this system: 2. CPU PCB. Vital Input PCB. Initially Microlok I was introduced in early 1990 s . IRISET Page 14 . (e) Execution of application software. installation. The current version is Microlok II . commissioning and maintenance of MLKII with the update post commissioning changes in yard is detailed as under :- 2. Wiring hardware 2. decision making and issuing commands.3. (b) Processing inputs. testing.2 Application Software: User develops Application Software based on Interlocking requirement and Yard Size. Vital Output PCB.1 Executive Software: Executive software used in this system does the following functions.II : EI SYSTEM CHAPTER 2: MICROLOK . The hardware used in Microlok II (MLKII). 2. All Microlok II CPU boards are shipped with executive software loaded in memory.Vital Cut Off Relay. which is a multipurpose monitoring and control system for line side interlocking equipment. VCOR. (d) Management of serial data ports. With this system we can have Direct control of wayside signals. Control and monitoring of Point Machine. Non-Vital-Input / Output PCB.EI SYSTEM 2. various aspects of design. Upgrade is possible using Maintenance Tool.MICROLOK . (c) Continuous internal and external diagnostics. Power Supply PCB. Control and monitoring of track circuits Vital communication to other compatible interlocking systems and Cab signalling.2 Hardware used in this system: Microlok II equipment consists of : (a) (b) (c) (d) (e) (f) (g) (h) Card file.II .3. 1 REAR VIEW OF MICROLOK-II SYSTEM Fig No : 2.HARDWARE USED IN THIS SYSTEM FRONT VIEW OF MICROLOK-II SYSTEM Fig No : 2.2 Page 15 (S18) ELECTRONIC INTERLOCKING . Slot nos. Port 4 is RS 232 type for other Non-vital control systems such as indication panel / Genesys. Slot no.4.2 CPU PCB Each card file to have one CPU PCB and always placed in slot no. It has Five serial ports to communicate with peripheral devices. In this card Micro Controller used is Motorola 68332 and its speed is 21 MHz.18&19. exclusively for diagnostic purpose.18&19 are used to accommodate CPU PCB. Slot no. It processes application logic based on inputs received and deliver outputs to drive external gears. It controls power to vital outputs through external VCOR relay. Port 3 is RS 432 type for other Nonvital control systems such as operators PC.4. It also monitors system internal operation for faults and responds to detected faults.1 Card File: Power Supply card CPU card CSI card 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 Vital Input. Ports 1 & 2 are RS 485 types to interface with vital control system such as MLKII. of fast Static RAM (each 64KB) are used to process the vital data and Four nos. This cardfile is suitable to mount on a 19” rack. IRISET Page 16 . In this cardfile a mother board is available in the rear side connecting all the 20 Slots. of Static RAM (each 64KB) are used to store events and errors.4 Hardware: 2.MICROLOK . In this card.II : EI SYSTEM 2.3 Each card file is like a shelf having 20 Slots to accommodate various PCBs that are used in a system. The main functions of CPU is described as under: It monitors continuously status of Vital Boards. It records system faults and routine events in user-accessible memory.1 to 15 and 20 are used to accommodate Non-vital Input-output or Vital Input or Vital Output PCBs. Nonvital I/O cards. 20 Microlok-II Card file layout Fig No: 2. It monitors and controls the serial communication ports.16&17 are used to accommodate Power supply PCB. 4 nos. Two nos. Vital Output. 2. Port 5 is used to interface with Maintenance PC provided with maintenance tool software. of flash EPROMs of 8 MB are used to store executive and application software. CPU PCB CPU Board Front Panel Layout Fig No : 2.4 Page 17 (S18) ELECTRONIC INTERLOCKING . 2 1.7. indicates normal system operation (successful diagnostics) When Lit . Executes or Cancels configuration value selected with ADJUST switch. CPU Printed Circuit Board ( Refer Fig : 2. When Pressed .4 ) Fig No:2. Also used to replace the CPU in the RESET mode.B. 3 4 5 A.5.2.E 1.6. Used to select main program menu items shown on displays. indicates FLASH + 5 V or +12 V programming voltage enabled (via board jumper) When Lit . Used to search main program menu items shown on displays. RESETs the CPU.3.D.MICROLOK . Used to cycle through configuration values to be selected with ACTION switch.4. 3 – Position (Return to Centre) toggle switch 3 – Position (Return to Centre) toggle switch 10 MENU UP.8 ON LINE 6 VPP ON Yellow LED 7 8 RESET RESET Red LED Momentary Push Button 9 MENU L-R 3 – Position (Return to Centre) toggle switch 3 – Position (Return to centre ) toggle switch .II : EI SYSTEM Various indications/buttons available on front side of the CPU card is tabled below.defined in application software When lit .2 LABEL DEVICE PURPOSE (None) 4 – Character alpha numeric displays Yellow LED s Red LED s Green LED s On site Configuration programming menus and options Reserved for serial link status User.C.DOWN 11 ADJUST UP-DOWN 12 ACTION ACCEPTREJECT IRISET Page 18 . Indicates that the system is in RESET mode. OUT. -12V @ 1A To VCOR Relay +12V into 400 Coil * Not used to power vital or non-vital external devices or circuits The table below is a list of the worst-case current draws for Microlok-II system boards: BOARD IN16 N17061001 OUT16 N17060501 IN8. This card provides isolated supply to internal circuit.12 V 276ma 147ma 12 ma 12 ma - No serial links ON 840 ma Serial link ON 64 LEDs ON 1000 ma 576 ma Page 19 (S18) ELECTRONIC INTERLOCKING . of signal lamps.IN32.5 12V dc VDC Determined by Installation (No. Based on diagnostic check by CPU.OUT8 N17061601 CPU N17061301 CPU N17061301 NV.POWER SUPPLY PCB 2. Power supply PCB is basically a DC-DC converter that converts 12V DC input supply is +12V. Maximum Start-Up Ripple 11.5 to 16.32 N17000601 CONDITION 16 LEDs 16 LEDs 16 LEDs + 5V 170 ma 155 ma 150 ma + 12 V 6 ma 4 ma 4 ma 4 ma - .5V P-P Current Draw 9.4.) Cardfile Power Supply Printed Circuit Board Outputs* For System Cardfile PCB 5V Internal Circuits +5V @ 3A For System Cardfile PCB 12V Internal Circuits +12V @1A. -12V and +5V required for various board functioning. Sys.5V dc 0.3 Power Supply PCB: Each card file to have one Power Supply PCB and always placed in slot no. etc. Power Supply Card receives 250Hz signal from CPU and extends supply to VCOR relay. System Operating Power Power Input to System Cardfile Voltage Range Nominal Voltage Min.16&17. cab carrier frequency. MICROLOK - II : EI SYSTEM POWER SUPPLY CARD Fig No : 2.5 OUTPUT CARD Fig No : 2.6 IRISET Page 20 VITAL OUTPUT PCB 2.4.4 Vital Output PCB: Each Vital Output PCB has 16 Outputs. It is available in 12V and 24V DC applications. Each Vital Output can drive an output device such as any Q-series relay. This output relay in turn controls signals, points, crank handle, siding control, level crossing etc. Since Vital Output drives the relay, which controls important outdoor gears, all the Vital Output boards are continuously diagnosed by a CPU. Any abnormality in any of the outputs will shut down the system to ensure safety. The status of vital output is known from LEDs available in front of the PCB. Vital Output PCB VCOR Relay B 24 Standard Vital Output card (24V) Output “X” Controlled External Relay Poly switch Protected Output “Contact” N24 Analog Ground CPU Control Standard Vital Output Fig No : 2.7 Page 21 (S18) ELECTRONIC INTERLOCKING MICROLOK - II : EI SYSTEM 2.4.5 Vital Input PCB: Each Vital Input PCB has 16 Inputs. It is available in 12V and 24V DC applications. Each Vital Input is assigned to read the status of outdoor gears such as Track circuits, Point detectors, Crank handles, Siding controls, level crossing etc. Since the Vital Inputs read the status of outdoor gears, they are normally configured with double cutting arrangement using relay contacts. The status of Vital Input is known from LED indications available in front of the PCB. INPUT CARD Fig No : 2.8 Non-Vital Input-Output Card Fig No : 2.9 IRISET Page 22 4. which in turn controlled by CPU. GD tubes (EPCOS EC90) have been connected at non-vital input from panel and non-vital output to panel and grounded with system equipotential earth.7 Vital Cut off Relay. Vital Cut-Off Relay (VCOR) Fig No : 2. 2. thus ensuring safety. It is available in 12V and 24V DC applications.6 Non-Vital Input/output PCB: Each Non-vital I/O has 32 inputs and 32 outputs in one PCB. Non-vital inputs are Panel push buttons and keys.4. When system is healthy the coil receives voltage from PS PCB.4. An augmented surge protection arrangement (external protection box) introduces surge suppression for the Non Vital Board output lines safeguard the system against lightning surges & other switching surges: • • Page 23 (S18) ELECTRONIC INTERLOCKING . The status of Non-vital Input/output is known from LED indications available in front of the card. VCOR has 6 F/B dependent contacts each rated for 3 Amps.NON-VITAL INPUT/OUTPUT PCB 2. counters and buzzers. Non-vital outputs are Panel indication LEDs. Microlok Non Vital Output Filter is a surge protective device which protects the non vital output board from electrical surges caused by lightning or power faults in Microlok system.VCOR: Each card file will have one VCOR to ensure the healthiness of the system. Power to Vital output board is controlled by VCOR.8 Lightning & Surge protection arrangements in MicrolokII • The interfacing of CCIP with I/O gatherer cardfile is on PIJF cable. GD tubes have been provided at T1 rack for protection of Non-vital Input /output boards against surge. transient / lightning.10 2. 07.2008. dated 14. implementation of an earthing improvement scheme comprising of following three stages was decided.09) Consequent to damage of Microlock-II EI due to lightning at a few stations on ECoR.STG/IH/ML dt.10. • • (* Extract of RDSO Guidelines vide L.5KE30A) and MOV (V36ZA80). Ensuring proper copper connection of Room Earth Bar and Earth points Ensuring earth resistance value <1 ohm. Separate DC 24V supply to be used for Microlock-II cooling fan. The external protection box also provides protection to the 24V common line for every Non Vital board. Microlock-II Racks which are having epoxy coating will be provided with copper foil. Every Non Vital Board output line is provided with GD Tube (CG2 145L) and MOV (V36ZA80).MICROLOK .03.) IRISET Page 24 .5KE30A) and MOV (V36ZA80).No. The RS-5 Resistor is provided in each of the output lines which is capable of withstanding 5 joules energy. The Tranzorb connected to the +24V DC signal line & MOV connected to the 24V DC Common line.II : EI SYSTEM • Every Non Vital Board output line is provided with 30V Tranzorb (1. The RS-5 Resistor is provided in each of the output lines which is capable of withstanding 5 joules energy. Stage 02 the serial port of one Microlock-II to another Microlock-II will be isolated (using optoisolators) if the stations is located in high hazard lightning area (having more than 50 Average thunder Storm days per year) Stage 03 Provision of augmented surge protection arrangement for the non-vital output board lines in case the operating panel room (SM’s room) and the equipment room (EI room) are located in two different buildings. Zonal Railways and the firm were accordingly advised vide this office letter of even no. Every 24V common line is provided with 30V Tranzorb (1. Stage 01 - Shielded cable between Termination Rack and Control Panel is to be properly grounded at the Termination side. GD Tube is grounded to the earth & MOV connected to the 24V DC Common line. The Tranzorb is connected to the +24V DC signal line & MOV is connected to the 24V DC Common line. 48 Pin Connector Assembly is provided for PS and CPU PCB.WIRING HARDWARE 2. Keying plugs are provided in the cardfile to ensure coding to each type of cards. EEPROM PCB which is provided on rear side of the CPU connector to configure various serial communication ports. 96 Pin Address select PCB and Connector assembly is provided for Non-Vital I/O cards.11 Page 25 (S18) ELECTRONIC INTERLOCKING . PCB Wiring Connector Mounting and Address Select PCB Fig No : 2.5 Wiring Hardware: 48 Pin Address select PCB and Connector assembly is provided for Vital Input and Vital Output cards. relay contacts and panel with help of pre-wired cables.7 Connector Assembly Each connector assembly consists of connector receptacle (i. The 96 Pin connector assembly is used for Non-vital I/O boards.II : EI SYSTEM 2. PCB Jumper selection Table is given below : Board Order 1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Non – Lamp Board Jumpers 2 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 3 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 4 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 5 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2. cover). 48 Pin address select PCB is used for Vital Input and Output boards. These jumper settings are unique and shall match with the definition of cards in application program. of Jumpers. Connector Assemblies are used to connect MLKII cards with Relays. Each address select PCB consists of 6 nos. The 48 Pin Connector assembly is used for Vital Input and Output boards. guide pair to fix the connector on the cardfile & crimp contacts. IRISET Page 26 .6 Address Select PCB It is used to address particular slot of the card file. 96 Pin address select PCB is used for Non-vital I/O boards.e.MICROLOK . In principal keying Plug is similar to the index pin of the relays.Vital I/O ( N17000601 ) Non-Vital I/O (N17061501) Keying Plug Location 5 6 7 8 9 10 √ √ √ √ √ √ √ √ √ √ √ √ √ √ 1 √ √ √ √ √ √ √ 2 √ √ √ √ √ √ √ 3 √ 4 11 12 √ √ √ √ √ √ √ √ √ √ √ √ √ Page 27 (S18) ELECTRONIC INTERLOCKING .12 Card File Mother Board Keying Plug Locations : Printed Circuit board CPU Power Supply (with out Panel ) Standard Vital O/P (24 v) Vital I/P (24v ) Code System interface Non. The purpose of EEPROM PCB is to store Site-specific configuration data. of keying plug and to be inserted according to type of the board. CARDFILE SLOT KEYING PLUG INSTALLATION Fig No : 2.9 Keying Plug The purpose of the keying plug is to avoid insertion of wrong type of board in card file slot.KEYING PLUG 2.8 EEPROM PCB The EEPROM PCB is placed on the 48 Pin connector assembly of the CPU PCB. Each slot requires of 6 Nos. 2. IRISET Page 28 . (e) Interconnection of various racks and interlocking equipment. (g) Type of block working with adjacent stations. Power supply. direct/indirect feed. which is easy to understand.MICROLOK . 2. (c) Motor points/Hand operated points. panels. (d) Level crossings.11 Inputs for Design (a) Approved Signal Interlocking Plan.II : EI SYSTEM 2. (d) Relay room building layouts. (b) Vital and Non-vital board calculation. (f) Axle counters. (c) Power supply scheme. (c) System configuration and serial communication. bells etc.12 Process of Interface Design (a) Vital and Non-vital I/O bit calculation. (f) Details of any additional interlocking equipment to be interfaced with MLKII.1 Calculation of I/O Bits Gather following information from Interlocking plan: (a) Type of signals. (b) Approved Front Plate Drawing. (e) CT rack termination details. (d) Power calculation. 2. (b) Application Program Design: Complete Interlocking program. (b) Number of indications. (e) Track circuits. (f) Manuscript of complete wiring diagram.10 Design : (a) Interface Design: Microlok II Design consists of : Wiring diagram of relays. To start design of MLK II based Interlocking system. buzzers. Inputs required are: 2. further converted in conventional circuit. CT racks. (b) Points/Cross over and type of control/operation. Gather following information from Front Plate Drawing: (a) Number of push button controls and key controls. (Mainly external to MLKII). The Information gathered from “Signal Interlocking Plan” and “Front plate Drawing “ is used to calculate Vital I/O and Non-Vital I/O respectively. Microlok II card file etc.12. counters. siding control and crank handles. quantity of various boards is derived as below: (a) 16 Vital Inputs per one Vital Input Card. (b) 16 Vital Outputs per one Vital Output Card.2 Calculation of Board & Relays After finding out final quantity of Vital and Non-vital I/O bits.DESIGN Example of I/O Bits Outdoor Gear 3A Signal (HOME) Vital Output DR HR Co HR UHR Vital Input DECR HECR RECR Co HECR UECR DECR HECR RECR HECR RECR Non-vital Input GN Non-Vital Output DGKE HGKE RGKE UGKE AJKE COKE DGKE HGKE RGKE AJKE HGKE RGKE AJKE NWKE RWKE WLKE ACKE ACKRE ANKE ANKRE BCKE BCKRE BNKE BNKRE TKE TKRE CHKE CHKRE KLKE KLKRE LXKE LXKRE Relays ECR.3 QN1-2 2A Signal HR GN ECR. CHYR KLR LXYR - TPR CHLR KLCR LXCR LCPR TOLR CHN CHR KLN KLR LXN LXR QNA1-1 QN1-2 QN1-2 QN1-1 QNA1-1 2.1 Points WNR WRR NWKR RWKR WN QN1-2 QNA1-2 Track Circuit Crank Handle Siding Control Level Crossing Block Inst.5 QN1-4 3A Signal DR HR GN ECR.2 QN1.12. (c) 32 Non-vital Inputs and 32 Non-vital Outputs per one Non-Vital card. Page 29 (S18) ELECTRONIC INTERLOCKING . (e) Calculate various relays on the basis of above table and decide .MICROLOK . VDU CONTROL PANEL CONTROL PANEL To Adjacent Station P1 P1 To Adjacent Station MLK-II MLK II UNIT-AA P5 P3 P4 OP VDU Link NV P4 MLK-II -B UNIT-B P3 P5 Maint . MLK II is connected with the peripheral equipments such as VDUs and another MLKII units. (d) 96 Pin Address select PCB: Sum of Non-vital Boards.12.13 Configuration of MLK II Place maximum of 16 nos. (c) 96 Pin Connector Assembly: Sum of Non-vital Boards. 2. On the basis of requirement of installation/site. 2. of either vital or Non-vital cards per Cardfile. Configuration of MLK II OP.3 Estimation of MLK II Hardware (a) 48 pin Connector Assembly: Sum of Vital I/O Boards.the size and design of relay rack. All the peripherals are connected with MLK II with serial communication cable. (b) 48 Pin Address select PCB: Sum of Vital I/O Boards. one PS PCB and one VCOR. No: 2.II : EI SYSTEM (d) 8 Vital Inputs and 8 Vital Outputs per one Mixed Vital I/O Card. Arrive at final quantity of card files. CPU and Power Supply PCB. VDU DOUBLE DECK TERMINALS (PHOENIX TERMINALS) RELAY RACK CABLE TERMINATION RACK MLK II UNIT Fig. VDU Link NV Diagnostic Link MAINT. allocate 16 cards either Vital or Non-Vital. (f) Each CPU will have one EEPROM PCB. (e) Each cardfile will have one CPU. (f) Per Card file.13 IRISET Page 30 . Inputs and Outputs from / to control panel are connected through multi core cables. (d) Relay rack and CT racks are connected to MLK II with “Single Strand Multi core “ cable. Single core” wire. (o) Rack assembly drawings. (b) Communication between A and B MLK II are wired with Twisted Pair-communication cable. (k) Non-Vital & Vital board wiring.15 Design of Relay Room Floor Plan Once calculation of boards. (l) All field gear driving circuit. Interface Drawings consists of: (a) Index. 2.CONFIGURING MLK II 2. (i) CPU&PS PCB wiring detail. (m) Power supply distribution drawing. (e) Relay Room Floor Plan.16 Interface Design All the required details now available to design interface drawings. (q) Contact analysis. (c) Control panel Inputs and Outputs are connected to MLK II with help of “Single strand Multi core” cable. (h) Address select PCB. (f) Relay wiring is done with the help of “Multi strand. (g) Serial Ports wiring details. (n) Fuse chart. (d) Route control chart. relays and MLK II configuration is finalized Design of Relay Room Floor Plan is taken up with following criterion: MLK II Rack: Relay Rack: Termination Rack: Size: Capacity: Size: Capacity: Size: Capacity: 2100mm X 800mm X 600 mm 2 Card files 2100mm X 1120mm X 300 mm 96 Relays 2100mm X 700mm X 300 mm 12 Non-vital boards 2. (e) Vital Input and Vital Outputs are wired with help of “Twisted Pair” wires. (c) Panel Front Plate drawing. (j) I/O Bit Charts. (b) Signalling Layout Plan-Replica of Signal Interlocking Plan. (f) Configuration drawing. (p) Interconnection details.CPU through “NonTwisted pair-communication” cable. Jumper settings and keying plug details.14 Configuring MLK II : (a) Operator VDU and Maintenance VDU are connected to MLK II. Page 31 (S18) ELECTRONIC INTERLOCKING . (d) Timer Section. UNR GNCR. Route Control Chart & Front Plate Drawing.14 UP IRISET Page 32 . (b) Boolean bit definition section. Application Program is written in form of equations called Boolean equations.UN GNR. The design is based on Signal Interlocking Plan.MICROLOK .II : EI SYSTEM 2. (e) Log bit definition section.18 Conventional PI Logic GN. (c) Serial bit definition section.17 Application Program Design Application Program is nothing but another form of Interlocking Circuit. Program is divided in various parts : (a) Local I/O bit definition section. 2. UNCR NRR NNR WNR. All the relays used in conventional circuits are called as BIT when referred to Application Program. WRR Pressed WKRs UCR UP ALSR Down WLR UP Down HR UP UP TPRs UP Down Down Up UP RECR RGKE Down HECR Down HGKE UP Fig No : 2. (f) Logic section. CONCEPT OF MLK II APPLICATION LOGIC 2.19 Concept of MLKII Application Logic: Fig No : 2.15 Page 33 (S18) ELECTRONIC INTERLOCKING . 23 Serial Section This section is required to communicate the STATUS of any bit to other compatible system like VDU.25 Conversion of Circuit to Equation A B C D XYZ E . 2. The definition works as Condenser-Resistor combination generally used in conventional installation. UCR.. IRISET Page 34 .. “Slow to Release” is as “CLEAR=1 SEC”. MLKII etc.. HECR. DR.. The relays such as GNR...... 2. “Slow to Pick” is defined as “SET=1 SEC”. ASSIGN A * B * (~C* D+E) To XYZ .. These logics are written as “ASSIGN” statement..MICROLOK . WLKE etc.. Output BIT from one system becomes Input BIT to other system and vice a versa. TLSR etc.20 Non-vital Section: It consists button relay logics and indication logics. UNR and indications such as RGKE..21 Vital Section It consists complete interlocking logic except button relay and indication logics.... 2.. END OF STATEMENT/ SECTION // SINGLE LINE COMMENTS % MULTI LINE COMMENTS . BIT SEPARATION ... These logics are written as “NV ASSIGN “ statement..II : EI SYSTEM 2.. are defined in Vital I/O board definition section and rest of the relays such as ASR. UNCR are defined in NV Boolean bit definition section.24 Symbols Used in Application Program * SERIES + PARALLEL ( START OF PARALLEL PATH ) END OF PARALLEL PATH ~ BACK CONTACT .22 Timer Section “Slow to Pick “or “Slow to Release” time delay for any function are defined in this section...TYPE 1 */ 2. RECR. HGKE. Rest of the relays GNCR.. The order of BIT definition shall be same in both systems. TPR etc. 2. are defined in Non-vital I/O board definition section. The names of Vital relays such as HR. Output BIT and Input Bit definition sections are different. are defined in Vital Boolean bit definition section.TYPE 1 \ /* MULTI LINE COMMENTS . 17 Page 35 (S18) ELECTRONIC INTERLOCKING .16 Fig No : 2.CONVERSION OF CIRCUITS TO EQUATIONS Examples:Typical examples are given below : Fig No : 2. Result of compilation will be two files viz. Interruption of visual indications on control panel for few seconds. c) Non-vital Output: Outputs are not compared before delivery as it is difficult to compare status of Flashing Output. VCOR are in duplicate. Once output is delivered. it is ensured the other system is available to take care of Station Interlocking. no. When system which is delivering Non-vital Outputs is KILLED. System need to be RESET manually.28 Evolvement of Hot Standby Logic Both systems shall work all the time. it needs human intervention to restore back ONLINE.28. Power Supply PCB. Duplicated MLKII systems are identified as “SYSTEM-A” and “SYSTEM-B”.1 Design Concept: a) Vital Output: Vital output will be delivered only when status of the BIT is same in the both the systems. Mismatch will be generated in as system that has not read Input and it will be KILLED. ‘PROGRAM. Input LOW is most restrictive state. When RESET. Nonvital Input is ANDed with its corresponding bit from other system. 2. Further process is negated in the system. MLK II being an Electronic System. “MLL” file is a listing file.27 Concept of Hot Standby Any Signal Interlocking System needs to be uninterrupted as it deals with safety. When one system fails due to any reason. which gives any errors. which is loaded in memory of CPU of MLK II using MLK II Maintenance tool. IRISET Page 36 .ML2” file name. CPU. of time one bit used and so many other important information. When one system is KILLED. “MLP” file is a data file. Train detentions shall be minimal. MISMATCH is generated in the system which has Input in HIGH state and System-A will be KILLED. MISMATCH indication will appear on Control panel and VDU. This also gives unique identification numbers called as “CHECKSUM” & “CRC”. of BITs used. Output is delivered only by one system. MISMATCH is generated and system will be KILLED. Inputs are read by both the systems independently and compared continuously. warnings. 2. Compilation is carried out with help of Microlok II Compiler. any change is STATUS of other system will not affect status of delivered bit. it is mandatory to duplicate entire system. Both the systems’ outputs are connected in parallel to one interface relay through a DIODE to avoid back feeding. Any mismatch in the STATUS of bits between the system will KILL the system ensuring other unaffected. Concept of Vital Output.MLP”. Vital Input and Non-vital Output is same as above. it is considered to be valid. d) Non-vital Input: The inputs are compared for its STATUS in both systems. Parallel delivery of Output by both the systems after comparison. b) Vital Input: System-A read Input as HIGH and that in B as LOW. Processing application logic simultaneously and comparison at various stages. it will not update itself from already ONLINE system. All the Vital and Non-vital boards.MICROLOK . no.MLL” & “PROGRAM. the control will be shifted to other system. 2. In case of MISMATCH no outputs will be delivered by either system.II : EI SYSTEM 2. which has not read the Input.26 Compilation of Application Program Program shall be stored as “PROGRAM. e. integrity of the cards and whole system cannot be ascertained unless Powered ON next time.2 Disadvantages: Momentary button inputs cause Disabling/Shutting down of one system or some time both the systems. external change over circuit is developed to switch on second system.28. The disadvantage is the system which is Powered OFF. In these stations warm standby logic is introduced i. 2. The main advantage of this warm standby logic is to maintain only one Application Program and its testing is easy and time saving. Page 37 (S18) ELECTRONIC INTERLOCKING .29 Warm Standby Logic: Hot Standby Logic working in some stations. though having stable design.CONCEPT OF HOT STANDBY 2. due to climatic instability / lightening caused failure of cards and both the systems were shut down which has interrupted train movements. MLKII power supply is controlled by “External Changes Over” circuits. In stations both the systems are working on actual Hot Standby logic is most satisfactorily and stable. This is a Worm Standby Logic and working satisfactorily in stations. when first has failed due to some reasons. Killing incidences are then reduced and system is made STABLE. This intermediate bit is nothing but next level steady bit(which has its own holding path). Both the systems’ cards are kept inserted in slots and in ready condition to switch ON when intended. which proves back contact of VCOR relays. Remedy: Intermediate bits are compared to generate MISMATCH. Incase of MISMATCH indication will appear on control panel and VDU and further process in the both the systems will be negated. Only one system is ONLINE and other is power OFF. Traffic interruption for 3 to 5 Minutes. MICROLOK . Maintenance tool is loaded in Maintenance VDU Using the tools provided in this Maintenance tool program. and diagnostics functions. This main menu displays the selection buttons that activate the primary functions of the program. configuration. as shown in Figure below. (a) (b) (c) (d) Run-time Monitor Historical Data System Adjustment/Setup Other Tools IRISET Page 38 .II : EI SYSTEM 2. The program provides these tools as selections on the Microlok II Maintenance Tools main menu.30 Maintenance: MLK II based Interlocking System is provided with Windows based Maintenance Tool package. These selection buttons are grouped into four main categories. maintenance personnel and application engineers can perform a wide variety of Microlok II system maintenance. the displayed date also includes the year in which the associated event occurred. while the dynamic bit/variable display represents the indications graphically in strip-chart view of bit and variable changes. These two displays provide the same information in different ways. (a) System Information: It views system events and appears as shown below. (c) Free-run Variable Display and Dynamic Bit/Variable Display: These two tools enable you to view the real-time status of Microlok II system variables. This display shows the current version number of the executive software and an abbreviated "snap-shot" of the most recent system events.MAINTENANCE 2.1 RUN-TIME MONITOR These buttons lead to display data about an operating MICROLOK II and its application. Each board type is dynamically updated. The system information display lists the time and date when the following types of events last occurred: (i) System resets (ii) System errors (iii) Unit configuration (iv) Clearing of the system log clear (v) Clearing of the user data log clear (vi) Time changes (vii) Clearing of conditional power supply (CPS) trips Since some of these events occur infrequently.30. These tools list the current values for selected variables and bits as well as a real-time list of changes. (b) Board Information: It displays the status information about Input – Output interface cards (Printed Circuited Boards) of a Microlok II or Serial link. It displays the current status of each enabled PCB in the Microlok II cardfile. This group of tools enables you to view the current status of equipment and related systems. The free-run display presents the status information in a text mode. the display defines the action taken in response to an event. Where appropriate. Page 39 (S18) ELECTRONIC INTERLOCKING . (c) System Error Log: The system error log is limited to critical errors. Any system critical error or warning will be logged in the system log. The Microlok II system logs and reports information of critical errors. System Error log and Dynamic variable changes merged onto the same time axis. and events as in the User Data. (a) Set Time of Day Clock: This function displays the date and time settings for both the Microlok II system CPU and the laptop computer and sets the Microlok II on-board clock.000 of the most recent specified Boolean changes.30. (b) System Event Log: The system event log records up to 5000 of the most recent critical errors. warnings. This log is capable of recording up to 90. the system error log contains a list of the last 50 time stamped critical system errors. The reset function is used mainly to clear system faults and return the system to normal operation.MICROLOK . IRISET Page 40 .30. or at least 64.2 HISTORICAL DATA: These buttons lead to views which display data which an operating Microlok II has collected and stored. This section contains four tools that enable you to review the logged system information in several ways. This log also provides graphic displays of parameters and events as specified in the user data log. (b) Software Upload: This tool is used for uploading a custom-designed application software program from the laptop PC to the Microlok II CPU. (d) Merged Events Log: The merged events log enables you view errors.000 Boolean and/or numeric changes.3 SYSTEM ADJUSTMENT / SETUP These buttons lead to views which modify parameters of the Microlok II. Since the older events may be lost in system event logger. and events. therefore. (c) Reset Microlok II: This tool enables you to reset the Microlok II CPU from the laptop computer. 2. (a) User Data Log: The user data log records only those events that the user specifies. you should be familiar with application software and Windows file navigation to use this feature. warnings. System Event. This tool interacts with Windows-based files.II : EI SYSTEM 2. Events are used to relay miscellaneous system information and may be limited by use of the configuration. warnings. and operational events. It displays changes of selected bit and numeric variables as requested by the application or configuration. 2. (c) Serial Message Monitor: This tool enables you to monitor serial message traffic on a selected active serial link. or directly from the PCMCIA card in the card reader on the individual PC.4 OTHER TOOLS: These buttons lead to views which allow special diagnostic functions to be performed. and to assign specific parameters to the user data log. (iii) Link configuration options enable you to configure the Microlok II system communication links. These options can also change the general appearance of the screens. As a default.Vizianagaram Palasa section of ECo Rly ) (a) Object Controllers (OCs) are used as slave unit of Central Interlocking Unit (CIU) through duplicated serial communication. (e) Application Download : This tool lets the user download the application image from the EEPROM on the Microlok II unit. This file can be viewed in Microsoft Excel. if necessary. (ii) Board configuration options enable you to enable/disable and configure the individual Microlok II system PCBs (Printed Circuit Boards). (d) Save Comma Delimited download: This tool lets the user download the user data log in a comma-delimited format.OTHER TOOLS (d) System Configuration: The configuration tool provides a wide variety of options for checking and modifying the configuration of the Microlok II system hardware and software. (b) Program Settings: The Program Settings dialog is used to modify the way in which the system stores and displays data. (a) System Memory Dump: Allows Ansaldo STS personnel to provide specialized debugging assistance. 2.31 Microlok II as a Distributed Interlocking System : (Working in Kottavalsa .mlp extension so it can be easily uploaded to the system. The file can be saved via the diagnostic port link. It is for to download present working application program. the file is stored with a filename. The system memory dump tool enables Ansaldo STS system developers and maintainers to perform debugging operations when a customer encounters a software problem. Page 41 (S18) ELECTRONIC INTERLOCKING . Three types of options are provided within this tool: (i) System configuration options enable you to modify the general system parameters and the user parameters.30. (c) The medium of communication between CIU and OC shall be Optical Fiber Cable (OFC) provided on a ring basis. Signal etc. (iii) 485 LDRC - (iv) OSD 136L - 2. (e) In place of Control cum Indication Panel.II : EI SYSTEM (b) As on date.32 Advantages of Distributed Interlocking System : (a) As Main Signalling Cable is totally eliminated. (g) Although system has inbuilt Data logger system. Damage of equipment due to short circuit of main cables is prevented. All the terminals should have tightness. (d) Any error in any OC or hardware fault leading to unsafe condition shall immediately withdraw all output commands. Expenditure has been reduced considerably. Used between Microlok to Operator’s PC / Maintenance PC. (h) All vital outputs are drive to field through relay only. Main Cable failures are prevented. Damage of main equipments under short circuit condition of traction supply (OHE catenary wire broken and fallen on the rails) is minimised. (f) OC and CIU have been interfaced by OFC with ring by providing Optical modem (OSD-1250). the system has been provided with external data logger for networking purpose with other station. (b) (c) Main Cable Maintenance and testing is Reduced. (i) Here OC and CIU are represented by each Microlok II. Used for communication between Microlok-II to Datalogger. VDU panel have the auto change over facility as well as manual change over facility. Battery shall be maintained properly. Object Controllers drive the field gears (Points. User data log shall be downloaded regularly. Optical modem without ring protection. Point Indication. Designing and modification has become more easier. Aspects etc) through concerned relay contacts.33 General Maintenance of MLK II: System must be protected from the dust. Simulation can be more simplified. Wires should be properly inserted of wires in terminals.. IRISET Page 42 .MICROLOK . 2. two number of VDU panel with LCD monitor of 22’ (One working & one standby) are provided.) through relays and take feedback (input) from various field gears (Track. (j) Communication equipment used : (i) 422 CFCR Used as interface between Microlok and Redundant modem(OSD1250LC) (ii) OSD 1250LC Redundant optical modem ( 2ch-OFC) Communication between Microlok-II to Microlok-II RS232 to RS485/422 converter cum Isolator. Don’t change jumper settings in CPU board & Address select PCBs. Don’t delete/Modify Application logic programs without authorization. Don’t use vacuum cleaner inside the Card file. Don’t alter Microlok II system. Don’t repair boards on your own. Don’t use any kind of Solvents. . Don’t use non-conductive materials such as Styrofoam cups.Maintain 24V to 28V DC at the Microlok II Input /Output power Modules.After completion of diagnostics.Check Microlok II system fuses at regular intervals. Detergents or Abrasive cleaners on the Card file or internal components. .5 V to 16. Don’t reset the system using Maintenance Tool/CPU front panel Reset push button when working. Don’t touch the board components. Don’t force boards into the Slots during insertion.During Maintenance changeover of one system to other system. SGE block Instrument must be kept in TOL Condition.Finger Tighten the boards after insertion. Use Vacuum for the externally accumulated dust and dirt.Maintain Minimum 13. Plastic ashtrays and Cell phone wrappers in the vicinity of Microlok II.DO’S & DON’T’S 2. .Place the removed boards with a tag into a conductive shielding bag. VCOR relays. .Keep the Microlok II room free from dust. Don’t remove boards.Ensure all terminations are fully tightened.Take back up of User Data Log / Event Log / Error Log data files weekly. . Reset that system and enable CPS in up mode (Ref: ”CPS CLEAR FUNCTION” details). *** X DO NOT Page 43 (S18) ELECTRONIC INTERLOCKING . . Don’t attempt Troubleshooting if you do not have proper Microlok II training. . . fuses / Links and 48/96 pin Connectors when the system is ON.34 √ DOs DOs & DON’Ts of MICROLOK II System: . Don’t switch ON Radio Equipment within the vicinity of Microlok II.Ensure synchronization of Microlok II clock time with Maintenance PC after the System changes over. . . Don’t apply blower for cleaning dust.5 V DC at the power supply board terminals. Maintenance PC & Operator PC settings without authorization. (a) All the items with Centralised EI are same with Distributed EI except: (b) Copper cable from Central Interlocking Unit to Goomties is replaced by OFC by ring path. termination of cable at both ends. Lakhs 3. Total cost = Rs 40.II : EI SYSTEM 2.59 2.8 5.2m Workmanship cost for trenching. modem and other cards: Cost of OFC 3 Km Laying of OFC 3 Km = 3 X 0. cable laying. *** (Disclaimer : Cost shown in this notes is for general information only and may vary .) IRISET Page 44 .7 Lakhs per station.42 6.4 5.4 Lakhs = Rs 2 Lakhs = 7.80 Lakhs + Rs 10 Lakhs (c) = Rs 50. Cost of OFC cable.5 Lakhs (Inclusive of HDPE pipe in ring path also) Optical modem 6 nos. storage space.6 9.1 Lakhs only Thus.80 Cable Trench size = 1400m X 0. 10 Lakhs. 1.4 Lakhs = 2 X 1 Lakhs = Rs 2.2 Lakhs = Rs 1. Readers have to verify from relevant sources for accurate information.66 40.80 Lakhs – Rs 7.MICROLOK .4 Lakhs = 3 X 0. Lakhs 2.35 Cost Saving for a 4-road Station with Distributed Interlocking over Centralised Interlocking: In case of Distributed Interlocking system Object Controllers and Optical Fiber Cable are used in place of Main Signalling Copper Cable between Relay/Equipment Room and Location Boxes/ Goomties.3m X 1. cut and theft of cable and maintenance cost all tighter the total cost shall be approximately Rs. transport. freight. (All other cards are remain same) In case of Centralised EI.1 Lakhs = Rs 43.19 Total Cost in Rs.09 18.6 Grand Total Cable Cost per KM in Rs. Modems are required for interfacing. CPU and Power supply cards are required. Cost of Copper cable from Central Interlocking Unit to Goomties: Sl. location boxes. Other cards at OCs Total cost = 6 X 0. there is a net saving of Rs 50.88 1.62 12. At both end Object Controllers.16 1.5 Lakhs = Rs 1. No 1 2 3 4 Cable Size 30 Core 24 Core 18 Core 12 Core Length in KM.80 Lakhs In case of Distributed EI. . FAT is carried out for each station interlocking separately.ML2.ML2.MLL. It is carried out only through VDU panel. whereas Site Acceptance Test (SAT) is carried out through CCIP and VDU panels. System testing at site called as Site Acceptance Test. the I/O boards are not physically present and the same is simulated using the test setup (MISS). . Therefore.36 Testing: Testing of Microlok II electronic interlocking system is carried out in two phases. Minimises the site errors & risks and reduces the corrections at site. . Application logic is modified for the FAT testing for Timer values used for signal. 1. 2.36.MLP) Ansaldo STS Total Management System (TMS) Forms FAT Certificate • • • • • After carrying out FAT. the following are the outputs: • • • For detailed testing procedure of FAT please Ref: Annexure • If Railways/Customer testing is completed. the following inputs are required: • • • • • Signal Interlocking Plan (SIP) Route Control Chart (RCC) Control cum Indication Panel Diagram Cross Table Microlok II Station Interlocking Application Software files as designed (. o • FAT is carried out through simulation set up (using Simulator Panel with toggle switches or Simulator PC with Microlok Interlocking Simulation Setup .TESTING 2. It is essential that the original times are reinstated and validated at the completion of testing. overlap and cancellation are reduced from 120 secs to12 secs to speed up the testing. In FAT setup. then the Checksum and CRC values of the FAT simulated application logic will be recorded as per the Application Logic and it is to be jointly signed by Ansaldo STS and Railways representative. . designer issues it to the validation department for carrying the Factory Acceptance Test. Page 45 (S18) ELECTRONIC INTERLOCKING .MISS software) in which all field inputs are simulated. System testing at factory premises called as Factory Acceptance Test.MLP) Microlok II Station Interlocking Application Software files as tested (. field inputs and outputs delivered by Input and Output card will be disabled and will be directly delivered into simulation VDU. To carry out FAT. However this will not affect the interlocking part of the application logic.1 Factory Acceptance Test • • Factory Acceptance Test (FAT) for Microlok-II EI system shall be tested in Factory environment with simulation setup to validate application software. point.MLL. if both the options are available at site. The purpose of Factory Acceptance Test is to: o Ensure that the Microlok II Interlocking system fulfils the station Interlocking & Rout Control Chart requirements and working in safe manner even if any false inputs / information received. This results in saving of time at site testing. 2. After designing the Application Software. Microlok II.e. the following inputs are required: Microlok II . SAT mainly involves the System integrity and functional testing of all equipments and interlocking testing also shall be carried out with full setup except the trackside equipments. Power supply equipments.ml2.mll & . Communication equipments. The Site Acceptance Test ensures that all the equipments installed at site i.2 Site Acceptance Test • • Site Acceptance Test (SAT) defines the procedure for Site testing of Microlok II Station Interlocking System. SAT ensures the overall system safety and error free system is being delivered to the client. All the field inputs are simulated by using simulation panel through toggle switches and inputs are sending to Microlok II via relays and the field outputs are sending to lamps through relays.II : EI SYSTEM 2. where tests are executed at site environment. so there is no need of separate set up is required except to simulate the field inputs with Simulation panel. Results of the tests are observed and documented in a Test Report. To carry out SAT. SAT is carried out for each station separately. Relays and Control cum Indication Panel are functioning correctly as per approved system configuration & station interlocking requirements and working in safe manner and failsafe even if any equipment fails / false inputs/information received.36. .mlp file (Hardcopy & Read-only Softcopy) Station SIP Station Route control chart Station Control cum indication panel diagram Cross tables Wiring circuits • All the equipments involved for station working is being installed before proceeding SAT. IRISET Page 46 . • • • • • • • • • • • • Visual test Wire count test Bell test Insulation resistance test Earthing test Power On VCOR Communication testing Correspondence Test System Integrity Test Interlocking testing Change over test • • • • • • The following testing shall be carried out while doing SAT For detailed testing procedure of SAT please Ref: Annexure -VII.MICROLOK . Keep one updated version of application software in CD at Site. ( edit plus software is required. Implement this changes in Route control chart Implement these changes in Bit chart Implement this changes in all Interface circuits ( see below for detailed steps) Implement changes in VDU Panel Implement changes in Application Logic. Application software needs to be amended and Application version No. UP LOAD the Application program.for Application Software.37 ALTERATIONS TO SIGNALLING -APPLICATION LOGIC MODIFICATION: “Microlok II Interface Design Modification” and the steps involved in implementing the modifications are briefly described here.ALTERATIONS TO SIGNALLING -APPLICATION LOGIC MODIFICATION 2. Steps involved in implementing the modifications: • • • • • • • • • • Compare New SIP with old SIP and find out the changes List out the additional gears List out the gears which are removed System configuration for Information purpose Additional hardware required. Head Quarters and also at Company. • • • • • Steps involved in implementing the changes (Deletion of Shunt Signal and addition of Crank handle) in all Interface circuits: • • • • • • • • • • • • • • Control cum Indication Panel layouts Microlok II Non-Vital I/O Bit chart – A1/B1 Microlok II Vital I/O Bit chart – A2/B2 Microlok II Non-Vital Input circuits Microlok II Non-Vital Output circuits Microlok II Vital Output circuits Microlok II Vital Input circuits Signal Repeater relay & Lighting circuit – Shunt signal Crank Handle Control circuit Relay Rack Layout – R2 Terminal chart – (R2 rack & T1 rack) Fuse & Terminal chart Contact analysis Control Panel LED Identification layout Page 47 (S18) ELECTRONIC INTERLOCKING . Site Acceptance Test – for application software with actual gears. has to be changed) Compile the Application software (Compiler software is required) Factory Acceptance Test -. It necessitates the requirement of external data logger for maintenance friendly interpretation. the propose of provision of internal data logger or data storage is defeated due to unsuitable maintenance diagnostic software loaded in Maintenance Tool. i. there is need of modification in testing procedures / devising of suitable arrangement including software changes so that there is no change in checksums. In view of above. testing with fully hardwired test zig and keeping all timers at their standard value. • *** IRISET Page 48 . To avoid the duplication of testing. maintenance diagnostic software loaded in Maintenance Tool needs to be improved. In absence of external data logger. In connection with this problem M/s Ansaldo STS has already developed user friendly software and same shall be installed in all future installations of Microlok-II. Even alter that to keep the checksums same there should not be any last minute changes in interlocking logic by the railways. The checksum at the time of FAT varies from the checksum at the SAT due to hard wired testing not done at FAT.e.38 • PROBLEMS REPORTED IN MICROLOK II It has been noticed that data in internal data logger of EI is stored in raw form which is difficult to interpret.II : EI SYSTEM 2.MICROLOK . The possible solution is the checksum at the time of FAT matches with checksum at the site is creating the similar conditions as exists in the field. 0 2 3 3.3 11. the year of latest revision.2 8. This specification requires reference to the latest version of following specifications: — 1 2 3 4 5 IRS : S 36 Relay Inter Locking Systems IRS : S 23 * Electrical Signalling and interlocking equipment RDSO / SPN /144 Safety and reliability requirement of electronic signaling equipment IS : 9000 * Basic environmental testing procedures for electronic and electrical items IS :2147 – 62 * Degrees of protection provided by enclosure for low voltage switch gear and control gear.0 9 10 11 11. 6 7 8 8 8 9 9 9 11 12 13 13 14 15 16 17 17 17 18 20 20 20 0.No 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 Item Foreword Abbreviation Scope Terminology General requirements Requirement of Electronic Interlocking Interlocking Requirements System Composition Hardware & fail safe System Architecture Maintenance and diagnostic aids Software Requirement Power supply requirements Information to be furnished by the manufacturer / supplier Test and Requirements Type test Acceptance Test Routine tests Test Procedure Quality Assurance Packing Information to be furnished by the Purchaser Clause no.3 1. 0.5 12 13 14 15 Page no.1 FOREWORD : This specification is issued under the fixed serial No. 0. RDSOI SPN/192/2005 followed by the year of original adoption as standard or in case of revision. 0 0.13 4 5 6 7 7.4 11. RDSO / SPN / 192 / 2005 ELECTRONIC INTERLOCKING INDEX S.RDSO / SPN / 192 / 2005 Annexure – I Specification No.2 Page 49 (S18) ELECTRONIC INTERLOCKING . installation and serving.electrostatic fast transient/burst immunity test and basic EMC publication.3 ABBREVIATIONS: SNO. The supplier shall submit a copy of the same for verification.signaling and communication Software for Railway control and protection system. EN 61000. ISO :9001 Whenever. 1 2 3 4 5 6 7 8 9 10 ABBREVIATION ABS ATP CA CCIP CD CENELEC CIU CMU CTC EI EXPANDED FORM AUTOMATIC BLOCK SIGNALLING AUTOMATIC TRAIN PROTECTION CROSS ACCEPTANCE CONTROL CUM INDICATION PANEL COMPACT DISC EUROPEAN COMMITTEE FOR ELECTRO TECHNICAL STANDARDISATION CENTRAL INTERLOCKING UNIT CNTRAL MONITORING UNIT CENTRALISED TRAIN CONTROL ELECTRONIC INTERLOCKING IRISET Page 50 .(IP code) EN 61000. IEC 529 / EN Specification for degree of protection provided by 60529 enclosures. it shall be taken as a reference to the latest version of that specification.testing and measurement techniques – surge and immunity test. EN 50128 Railway applications.testing and measurement techniques . reference to any specification appears in this document. maintainability and safety. 0.electrostatic discharge immunity test and basic EMC EN 61000. availability .specification and demonstration of reliability . IRS : S – 99 Data logger system RDSO / SPN /186 Domino Type Control Panel for Railway Signalling Or equivalent Recognized International standard.5 Electromagnetic compatibility .2 Electromagnetic compatibility (EMC) . EN 50126 Railway applications .testing and measurement techniques.Safety related electronic systems for signaling EN 50159 – 1&2 Railway applications Signaling and Communication Safety related communication in closed and open transmission system.4. development.4. production. EN 50129 Railway applications.4.SPECIFICATION OF ELECTRONIC INTERLOCKING 6 7 8 9 10 11 12 13 14 15 16 * Quality Systems.4 Electromagnetic compatibility .model for quality assurance in design. 2 SCOPE: ABBREVIATION EMU EPROM IBS I/O ISA MTBF MTBWSF MTTR MT OC OFC PC PCB QA QAP SEM SIL STR TOT UV VDU VGA EXPANDED FORM ELECTRICAL MULTIPLE UNIT ERASABLE PROGRAMMABLE READ ONLY MEMORY INTERMEDIATE BLOCK SIGNALLING INPUT / OUTPUT INDIPENDENT SAFETY AUDITOR MEAN BETWEEN FAILURE MEAN BETWEEN WRONG SIDE FAILURE MEAN TIME TO REPAIR MAINTENANCE TERMINAL OBJECT CONTROLLER OPTICAL FIBRE CABLE PERSONAL COMPUTER PRINTED CIRCUIT BOARD QUALITY ASSURANCE QUALITY ASSURANCE PROGRAM SIGNAL ENGINEERING MANUAL SAFETY INTEGRITY LEVEL SCHEDULE OF TECHNICAL REQUIREMENTS TRANSFER OF TECHNOLOGY ULTRA VIOLET VISUAL DISPLAY UNIT VIDEO GRAPHIC ARRAY This specification covers the technical requirements of Electronic Interlocking. The El covered in this specification shall be a microprocessor based equipment used for the operation of points.RDSO / SPN / 192 / 2005 SNO. In case of End Cabin / Multi Cabin working. it shall be possible to interface more than one CCIP or VDU control terminal or both with the El. through a control cum indication panel or VDU based control panel.3 Page 51 (S18) ELECTRONIC INTERLOCKING . signals. It shall be capable of future interfacing with ATP & CTC systems. level crossing gates. block working with adjacent station. 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 1. releasing of crank handle for manual operation of points and other controls like slots etc.1 1. 1.0 1. IRISET Page 52 .7 3.6 3.13. The system shall be capable of working in conjunction with the control cum indication panel or a VDU or both as per clause 5.2 3. double cutting arrangement shall be provided.1 Both hardware & software of El must meet SIL-4 as defined in CENELEC Standards. selection table and panel diagram of the station. The failure of any one of the fans shall give an alarm to the operator. GENERAL REQUIREMENTS: The system shall provide all the interlocking.3 as required by Railways.12 3. the terminology given in latest version of IRS: S 23 and RDSO/SPN/144 shall apply. The system shall have facility of monitoring of internal variables as well as status of I/O. El shall have user-friendly graphic based design tool to generate station specific application software to carry out future yard modifications.4 3.9 3. User Railway shall verify application software pertaining to yard data.13. REQUIREMENT OF ELECTRONIC INTERLOCKING: 3 31 3. It should also be capable of interfacing with IBS. The system shall be suitable for working on sections having 25 kV AC traction and where passenger/freight trains hauled by single phase thyristor controlled or three phase induction motor controlled AC locomotives or chopper controlled EMU stock are operated. For large stations. For all vital inputs! outputs. 3. the cooling fans shall operate on system power supply with over current protection arrangement.11 3.SPECIFICATION OF ELECTRONIC INTERLOCKING 2 2. Either OFC or twisted pair cable shall be used for all vital connections.3 3.13 3. The system shall be capable for working in non air-conditioned environment and ambient temperature range between –10 0 C to 70 0 C and Relative Humidity unto 95% at 40 0 C.5 3. ABS including interfacing with outlying yards and sidings. a copy of standards followed shall be submitted with application. The system shall be provided in a dust protected cabinet.2 The El system software as well as warm/hot standby changeover software should have been independently verified and validated including its offered configuration by third party. The certificate of validator certifying that the system is equivalent to SIL-4 compliant shall also be submitted. which cannot be covered by one El. The communication channel provided between various El shall comply with the requirements for transmission of vital safety information as laid down in relevant clause of latest version of RDSO/SPN/144/2004.8 3. it shall be possible to connect more than one El preferably through a serial channel.1 TERMINOLOGY: For the purpose of this specification. If the system is developed using any equivalent International standard other than CENELEC.10 3. Necessary provision shall be made in the hardware and software for modular expansion of the system. The equipment shall be so constructed as to prevent unauthorized access to the system. Supplier shall submit interface details. If forced cooling is required. control and indication functions as per approved interlocking plan. The system should have capability to interface with Block Working. acceptance approval shall submit documentary proof of independent validation as per CENELEC Standards or equivalent standard along with complete safety case. Emergency Point operation. All modifications must have got approval of original validating agency! approving agency. then proper working of counters shall be possible and readings of all counters can be read as and when required.13.5 5. Red lamp protection etc. Overlap release operation etc. printer and event logging facility for minimum 10. 3. in El.1 OC shall be a Processor based system having similar architecture as of CIU. Domino type Control Cum Indication Panel (CCIP) with panel processor having standby processor or VDU control terminal as required by purchaser.1.1.1. Requirement of spare parts of each type for the first line maintenance shall be indicated to meet system availability with Mean time to repair (MTTR) being not more than 6 hours.1.1 5.7 5.2 5.6 5. Signals & Relays) and take feedback (Inputs) from various field gears without any modification! change in the design of outdoor Signalling equipment. OBJECT CONTROLLER: 5.1. Relay rack along with required number of approved type of relays or OCs. shall be achievable through Software only. Date of each modification with brief reasons for undertaking modifications shall be given.13. when applying for type approval or cross . Maintenance terminal (MI) with display.5 The next level Signal control circuits like Cascading of Signal aspects. Button stucking etc. Cycle time and response time of the system shall be clearly indicated.4.00. IRS: S-99. It shall work as slave unit of CIU through duplicated serial communication and placed within 15 Km. The system shall have facility for automatic serial data transfer to a central monitoring unit through data logger.13.13. radius from CIU. 3.1.7.INTERLOCKING REQUIREMENTS 3. 4.4 The firm shall give details of all modifications carried out in the system after initial validation! approval.1 5. so that in case.000 events. Cycle time and response time to read and process the input shall be fast enough to ensure safety and avoid any apparent delay.13. 3. INTERLOCKING REQUIREMENTS: The system shall meet the interlocking requirements as specified in Cl.1 5.1. 3. The protocol for this communication shall be as per Data Logger specification No.7 CIU shall have log of all counters provided at Panel like Emergency Route cancellation Calling on signal.0 of IRS: S 36.3 The firm manufacturing El. 4.1.4 5. The OC shall drive the field gears (Points. operation commands are given through VDU in place of CCIP. process them in a fail-safe manner as per the selection table and generate required outputs. SYSTEM COMPOSITION: The El system shall consist of the following: Microprocessor based interlocking equipment to read the yard and panel inputs.3 5. Page 53 (S18) ELECTRONIC INTERLOCKING .6 The audio-visual alarm shall be available for Approach locking. keyboard. 5 OC shall carry out the supervisory function to check the proper level of system voltages at critical points to ensure proper working of the system and sf4alI also check the health of the complete system.7.8 In case of Cross Acceptance.2 OC shall be normally placed in field locations. after successful testing & working of above mentioned system for specified time as decided by RDSO. lB signal. a control terminal with VDU display in lieu of or in addition to conventional CCIP shall be supplied. Functionally. each OC should be independent from other OC.3 CONTROL TERMINAL WITH VDU DISPLAY: 5.1. In case of communication failure between CIU & OC.SPECIFICATION OF ELECTRONIC INTERLOCKING 5. It shall be provided with push buttons/control switches for individual operation of points.1. 5. to facilitate indication or operation aim indication as per requirement.7. 5. 5. The approval shall be given to provide system with this arrangement over the stations of Indian Railways.4 All the inputs and outputs of OCs shall be isolated. 5. IRISET Page 54 . (ii) 5.7.1. El with OCs may be directly accepted provided these have performed satisfactorily for the quantity and period as specified in Cross Acceptance procedure of RDSO. In second phase. Solid State Point and Signal lamp modules shall be developed to the satisfaction of validators and RDSO. auto signal.7. 5. Three dot markers in Red. This will consist of: i) ii) iii) A latest PC.3 The medium of communication between CIU and OCs shall be OFC provided on a ring basis. all the outputs shall be brought to safe state whenever two consecutive telegrams are not received in stipulated time period.7.1. colour VDU monitor with minimum size of 17”(43 cm.6 Occurrence of any error in any OC or hardware fault leading to unsafe condition shall immediately withdraw all output commands and remove the source supply to outputs. adjacent yard layout. releasing of crank handle/ground lever frame. communication channel and panel processor.) as specified by purchaser. the object controller shall have only Relay driver cards duly validated and meeting all safety requirements to drive Points. gate controls. Signals and other field gears. cancellation of routes and other functions as covered by IRS: S 36 including block signalling. A flashing indication shall be provided on the VDU to indicate healthy condition of the main system. Blue & Green colours respectively shall also be displayed prominently at conspicuous location on the VDU terminal to indicate that the colour monitor is healthy and all the three colours (Red.1 If required by the purchaser. 5. clearing of signals.1. A Key Board & mouse and Suitable interface to continuously display the current position/status of various field equipment and track circuits.7 If the system is developed using OCs.3. then it shall be developed in following two phases: (I) In first phase. Blue & Green) are present in right proportion.1.2 CCIP shall conform to relevant clauses of IRS: S 36 and RDSO/SPN/186.7. 5.1.7. Error in one OC should not affect the working of other OCs. 5 5. 50Hz AC power supply.3.4. a suitable error message shall be displayed on the terminal.2 The control terminal shall work with 230V ± 10%. FAIL-SAFETY: The requirements laid down in relevant clause of latest version of RDSO/SPN/144 shall be complied. 6. Availability of communication channel shall be indicated by a constantly flashing indication. The system shall have suitable interface to receive and process the information for displaying the status of field equipment on the control terminal. It shall also have facility for displaying a portion of the yard or section in an enlarged mode .5. Whenever the serial channel goes faulty. The current position/ status of various field equipments and track circuits shall be displayed on the VDU using different colours / symbols. for which an UPS of adequate capacity shall be supplied along with the system. MTBWSF should be minimum 10 9 hours. This interface shall be of standard type like RS 232 or any other approved type. The equipment chassis shall be connected to suitable earth. 6. as desired by the purchaser.3.3. It shall be possible to display the complete yard layout including the section on the monitor.1 652 653 6. 5. 5. 6.1 6.6 Page 55 (S18) ELECTRONIC INTERLOCKING .4 5.3.3.2 6.5 6.3 A colour monitor (minimum VGA or better) shall be used for the VDU of the control terminal.3 PROTECTION AGAINST ELECTROMAGNETIC AND ELECTROSTATIC INTERFERENCE: The requirements laid down in relevant clause of latest version of RDSO/SPN/144 shall be complied.COMPONENTS 5.4 6.2 6. HARDWARE AND FAIL-SAFETY: Requirements of SEM as laid down in relevant clause of latest version of RDSO / SPN / 144 shall be complied. The system shall have provision for accommodating additional 25% of 1/0 cards.1 PRINTED CIRCUIT BOARD: The requirements laid down in relevant clause of latest version of RDSO/SPN/144 shall be complied. COMPONENTS: Components used shall comply with relevant clause of latest version of RDSC/SPN/144 and should be commercially available. Each card shall be marked with running serial number for identification of individual cards.6 6.4. Either or both of hardware and software redundancy shall be provided to ensure that any single fault does not lead to unsafe failure.if required. In case of hot standby system. of failure of the main system. Preferably. this fact should be displayed on MT with diagnostic facility to identify faulty module/ card.000 events.3 7. the standby system should start functioning with a time delay of approximately 120 secs. which affected the main processor/ system. in case of hot standby system. CD.2. there shall be no unsafe occurrence due to switching over from main system to standby system.1 7 . warm standby/ hot standby processor(s) / system using similar 2 out of 2 hardware and software architecture shall be provided with facility of automatic changeover. 7. does not affect the hot standby processor! system. In addition. It should also be ensured that the fault.00. there shall be no unsafe occurrence due to switching over from main system to standby system. 7.2. Storage of minimum one month data or 10.2 7. of the yard. Preferably. In addition.2. flash memory or any other storage media. (b) Two out of two hardware architecture with identical hardware and identical or diverse software. Display of recorded events and Data transfer to floppy. Transfer of recorded events to external data logger. the standby system should start functioning with a time delay of approximately 120 secs. controls etc. the train operation shall not be affected or otherwise. IRISET Page 56 .2.2 Result of the failure of any card/module in the system should be clearly indicated.0 7. signals. which affected the main processor/ system.SPECIFICATION OF ELECTRONIC INTERLOCKING 7. (c) Two out of three hardware architecture with identical hardware and identical or diverse software.1 (a) SYSTEM ARCHITECHTURE: One of the following architectures shall be employed in the system. train operation shall not be affected. does not affect the hot standby processor/ system. the train operation shall not be affected or otherwise. MAINTENANCE AND DIAGNOSTIC AIDS: MT consisting of a standard PC with printer from a reputed manufacturer shall be provided for following Operations: i) ii) iii) iv) v) Display of the current status of points. It should also be ensured that the fault.4 Control operation of yard functions shall not be possible from the maintenance terminal. In case of any module/ card becoming faulty. Single Hardware architecture with diverse software. train operation shall not be affected. of failure of main system. hot / Warm standby processor(s) /system shall be provided with facility of automatic changeover. The supplier should also indicate process of replacing such defective cards / modules. In case of Warm standby system. In case of Warm standby system. Integrity of the final vital output of the system for control of the field equipment should be continuously checked by reading both front & back contacts of relays to guard against inadvertent operation of the equipment.2 9. POWER SUPPLY REQUIREMENTS: The El shall work on 110V/ 60V/ 24V/12V DC power supply. This shall be station specific. SELF CHECK PROCEDURES: Self-check of the associated functional hardware as required by the hardware design should be performed periodically as laid down in relevant clause of latest version of RDSO/SPN/144.2 Software used in El should have been developed in conformity with a software engineering standard issued by recognized standards body such as CENELEC with special relevance to safety critical applications.SOFTWARE REQUIREMENTS 8.5. However.1 9. (b) Application Software It shall be containing the logic that defines how the inputs and outputs for a particular station are related. 8. RDSO reserves the right to get the verification and validation of software and hardware done by an independent agency at the cost of the supplier.1 SOFTWARE REQUIREMENTS: The software of system should have two layers: (a) Executive Software or System Software This Executive Software shall define what the system can do and how the various parts of the system operate together. 8.0 8. The system shall conform to software requirements and self-check procedures as laid down in relevant clause of latest version of RDSO/SPN/144. Particular software engineering standards used shall be specified and one complete set of such star1dards shall be made available to RDSO.5 8. should be made available to RDSO to check their conformity to the standards. Sufficient self-check should be built into the system to detect possible hardware faults. It shall include all start up and operational safety tests (including checking the Executive Software itself) that are the parts of the processor for continual assurance of safety operation. Application engineers should have the facility to modify application software as and when required. Both the ROMs shall be separated & isolated from each other.3 8. full documentation on Quality Assurance Program specially the Verification and Validation (V&V) procedures carried out in-house or by any independent agency. 9. Two different voltages shall be used. The selected El Software should have been independently verified and validated.4 8. It shall not be possible to modify Executive Software. If the procedure and documentation for V & V is considered inadequate.5. one to drive El equipment and the other for receiving the inputs from the field gears. The manufacturer shall program the Executive Software and Application Software into Read Only Memories (ROM). As specified in the software Engineering Standards.2 Page 57 (S18) ELECTRONIC INTERLOCKING .1 8. It should be possible to switch off and take out faulty processor for repairing/replacement without affecting working of the balance system.8 10. e) f) g) h) i) j) • • • • • • • • • IRISET Page 58 . Proof of safety in the form of process adopted for safety analysis and result thereof. INFORMATION TO BE FURNISHED BY THE MANUFACTURER I SUPPLIER: The manufacturer shall supply the following information.3 9. lightning & spikes etc. Mode of interaction between hardware &software.5 9. Power supply arrangement for individual processor should be such that. Salient feature through which fail safety has been achieved e.6 9. Full documentation of Software Engineering followed during development. Complete application software with facility for EPROM programming for entering yard data. Suitable surge protection and proper earthling arrangement shall be provided in the power supply system to protect against transient voltages. Functions achieved in hardware & software.SPECIFICATION OF ELECTRONIC INTERLOCKING 9. a) b) C) d) Design approach for the system. Quality Assurance Program along with report and certificate from in-house Quality Assurance (QA) Group or an Independent Safety Auditor (ISA). Full documentation of verification and validation procedure. use of a watchdog timer.7 9.shall be used to connect CCIP & CIU. the manufacturer! supplier will supply all the documents etc. The required protection shall be provided to protect from any malfunctioning due to false! spurious feed. then lightning and surge protection has to be provided for each core of copper cable connecting CCIP and CIU or else OFC cable . in case of fault in power supply of one processor. automatic shut down etc. A detailed Power supply arrangement diagram/ circuit shall be provided.g. the firm should submit the performance feedback as given below: Name of System/Equipment Make Model / Version No.4 The short circuit protection shall be provided. If CCIP and CIU are in separate building. In case of Cross-Acceptance. to the Validator nominated by the Railways. all processors should not cease to function simultaneously. If the Railways consider software validation necessary. User Railway & Section Maximum Sectional Speed Average number of Trains per day Application of System/Equipment Problems faced and solutions evolved Failure data may be submitted as per format given below : : : : : : : : : 9. details for each type of assembled P06. of System/ Equpt. It shall be possible to rectify the fault by replacement of defective PCB card by the maintainer at site.g. However. Version No. 10. Details of Hardware e. of safe side failures No. should be in continuous operation for a minimum period of 720 days.INFORMATION BY THE MANUFACTURER Location No. with a minimum of 10.1 The manufacturer shall supply the following documentation] manuals: I) ii) Installation & Maintenance Manual with pre-commissioning check list. of Equipment Equipment Hours 1. Page 59 (S18) ELECTRONIC INTERLOCKING . (ii) If the offered equipment has undergone minor hardware/software up-gradation to improve functionality/safety of the equipment in recent past. schematic diagrams of the system circuits/components.2 The manufacturer shall provide the following certifications from approved validation agency: I) ii) Correctness and safety of the software. Date of Commissio -ning Total hours in use No. Diagnostic aids including troubleshooting charts: A trouble-shooting chart shall also be provided to indicate the step-by-step actions to be taken in case of failure of the equipment. Category of Equipment / System Minimum no.16. as per manufacturer’s practice may be accepted. a minimum of 10 (Ten) equipments should be in continuous operation for a minimum period of 180 days. In case of Cross-acceptance. Solid State interlocking 25 In use 2. of Signalling equipment shall be as per RDSOISPN / 144.000 (i) At least 20% of the equipment/system.No. Software checksum of EPROM(s) shall be provided as per RDSO/SPN/ 144. Details of software algorithm flow chart along with test/validation procedure used and the results thereof. Version No. in such cases. iii) iv) v) vi) 10. of unsafe side failures MTBF MTBWSF MTTR Total Proven ness criteria of Equipment Usage of same Type/Make & Model/Version shall be as under: S. then the equipment utilisation of the earlier version (prior to minor modifications) can be considered for the proveness. Reliability and fail-safety of the interlocking system. 1 The following shall comprise acceptance tests: a) b) C) d) e) f) Visual inspection (Clause 12. Expected MTTR.4 ACCEPTANCE TEST: 11.1 TEST EQUIPMENT: The firm should have all essential Testing Equipments as per latest STR. If the equipment fails in any of the type tests.2.3.4. No failure shall be permitted in the repeat test(s). System level functional and fail-safety tests.3. 11. System Diagnostics test as per Clause 12. System Diagnostics test (Clause 12. 11.3. System Software tests as per Clause 12. IRISET Page 60 . 1 1.2 For inspection of material. 9.4. Expected MTBWSF.5.3 TYPE TESTS: 11. 11.1) Insulation Resistance tests (Clause 12. System level functional tests.2 Any other tests shall be carried out as considered necessary by RDSO. TESTS AND REQUIREMENTS: Conditions of Tests Unless otherwise specified all tests shall be carried out at ambient atmospheric conditions. The equipment shall successfully pass all the type tests for proving conformity with this specification. relevant clauses of IRS: S 23 and RDSOISPN/144 shall apply.4) Verification of application software vis-a-vis selection table (This shall be done by user Railway). The following tests shall constitute type tests: a) b) c) d) e) f) g) h) Visual inspection as per Clause 12.4. 11.SPECIFICATION OF ELECTRONIC INTERLOCKING iii) iv) v) vi) 11.0 of RDSO/SPN/144. Environmental/ climatic tests as per Clause No.2 Card-level functional tests on all the cards and fail-safety tests on one card of each type. 11.1 Details of modifications carried out in the system and its subsequent validation.1 Standard RDSO layout shall be used for conducting type tests. Expected MTBF. Computerised testing for minimum two hundred thousand permutations and combinations as per Clause 12. Revision 1 (Indoor Equipment). the purchaser or his nominee at his discretion. 11. may call for another equipment card (s) of the same type and subject it to all tests or to the test(s) in which failure occurred.2 Any other tests shall be carried out as considered necessary by the purchaser.3 Only one El shall be tested for this purpose. 11.2) Card level functional test on all the cards.3.1 Insulation Resistance tests as per Clause 12. 12.2) Card level functional test on all the cards.00. The visual inspection will broadly include — i) System level checking: Constructional details Dimensional check General workmanship Configuration ii) Card level checking ROB laminate thickness General track layout Quality of soldering and component mounting Conformal coating Legend printing Green masking iii) Module level checking Mechanical polarisation General shielding arrangement of individual cards Indications and displays Mounting and clamping of connectors. 11.ROUTINE TEST 11. System level functional test. a) b) c) d) e) f) Visual inspection (Clause 12. Proper housing of cards Page 61 (S18) ELECTRONIC INTERLOCKING .4.1) Insulation Resistance tests (Clause 12. The methodologies to be adopted for various tests shall be decided taking into account the system design! configuration and shall be approved by the purchaser. The application software in proper format shall also be submitted to the inspection authority in advance.3) System diagnostics test as per Clause 12.5 ROUTINE TEST: 11. 12 TEST PROCEDURE: The test procedure shall be based on the system design.5.000 permutations and combinations (Clause 12.1 The following shall comprise the routine tests and shall be conducted by manufacturer on every El and the test results will be submitted to the inspection authority before inspection.5. Computerized testing for 1.1 VISUAL INSPECTION: The equipment shall be visually inspected to ensure compliance with the requirement of Clauses 3 to 7 of this specification.2 Any other tests shall be carried out as considered necessary by the purchaser. these will be taken out before starting the lR test. The diagnostic tests on the system shall be performed to test the integrity of the system software by verifying the checksum. route cancellation.3. level crossings and crank handle as per the selection table of the yard provided by the purchaser. It should also be checked that other yard functions are free.SPECIFICATION OF ELECTRONIC INTERLOCKING 12. 12. emergency point operation.3. signal is cleared.4 SYSTEM DIAGNOSTICS TEST: These tests shall be conducted by automatic test procedure through a PC. emergency route cancellation. All the routes are checked one by one. IRISET Page 62 . The following tests shall be conducted with the help of this set up. If there is a possibility of the meggering voltage reaching the cards. It shall be possible to verify the application program vis-a-vis the selection table by the user. The lR value shall not be less than 10 Mega ohms. Back locking of the route and overlap should be verified. 12. The measurement shall be made at a potential of not less than 500 V DC.3 COMPUTERIZED TESTING: The manufacturer shall provide a computer-based test set up with the required software for automatic testing. The PC at the end of the test shall print out summary of the tests conducted. Similarly.2 OPERATIONAL FAIL SAFETY TEST: These tests are conducted as per procedure given below: i) After setting of points in main route & desired overlap. This test shall also be carried out after the climatic tests. 12. operation of G/F control points. conditions required only for signal clearance (such as track circuits) should also be disturbed and it should be verified that the route is set but the signal is not cleared. After the climatic tests. preferably through regeneration of the locking table from yard data. point operation. The track circuit of the route should be dropped one by one and it should be verified that it is not possible to clear the signal. ii) Conditions required for route setting should be disturbed in various permutations and combinations and it should be verified that it is not possible to set the route with the disturbed conditions.2 INSULATION RESISTANCE TEST: This test shall be conducted between the equipment power supply line terminals and the earth. 12. this value shall not be less than 10 mega ohms.1 FUNCTIONAL TESTING: The system shall be tested functionally for all the signals with all routes. In case of CA. The same shall be required with Indian Partner of foreign firm. List of Routine tests done and sample copy of results to be submitted. the above Plant and Machinery shall not be necessary to be available with Indian Partner if no TOT is taking place.2 QUALITY ASSURANCE: All materials & workmanship shall be of good quality.3 13.3. when TOT is not taking place. the Plant & Machinery may be verified by the team of RDSO officials visiting the Firm premises. at least one set of equipment shall have to be installed in Indian Railways. In case of any change in the system software! format of application software. However. Acceptance test and Routine test as given in para 11.5 SYSTEM SOFTWARE TEST: Checksum of system software and format of the application software shall be verified. Performance feedback reports from user Railways.1 shall be available with the manufacturer. 13.4 and 11. 13.2 All test instruments as given in CI. The firm has to submit following documents to ensure that the system meets all requirements as mentioned in para 11: i) ii) iii) iv) Certificates of Type tests done as required by RDSO specifications.acceptance.1 13. 3. Since the quality of the equipment bears a direct relationship to the manufacturing process and the environment under which it is manufactured. 13. . 13. For the verification of same. the same shall be validated.SYSTEM SOFTWARE TEST 12.1 PLANT AND MACHINERY: The firm should have all essential Plant & Machinery as per latest STR.3. In case of TOT.4 Along with the prototype sample for type test.6 Type test. Acceptance tests to be done at the time of inspection of equipment to be supplied. 11. to prove its performance in Indian conditions. Machinery and Test instruments as given below shall be available with the manufacturer. Validation and system of monitoring of QA procedure shall form a part of type approval. The necessary Plant. Sample tests shall be carried out. Details of cross acceptance procedure may be referred to in concerned document of RDSO. the manufacturer shall submit the Quality Assurance Manual. Page 63 (S18) ELECTRONIC INTERLOCKING . In case of CA.2. if found necessary. a team of RDSO officials may visit the manufacturing facility of manufacturer in its respective Country(s). 11. 12. the manufacturer shall ensure QAP of adequate standard.5 shall not be required in case of Cross.3. if ordered. PACKING: As per relevant clause of latest version of RDSOISPN/144. Size of VDU monitor screen. a) INFORMATION TO BE FURNISHED BY THE PURCHASER: Approved interlocking plan. System output required to drive field gears — relay interface or object controllers.1).SPECIFICATION OF ELECTRONIC INTERLOCKING 14. 3. 15. b) c) d) e) *** IRISET Page 64 .1. selection table and panel diagram of the station(CI. 5. 110 V AC or DC usage for signal lamp lighting.4). Whether CCIP (domino type) 0rVDU control terminal or both required (Cl. Man month 14 3B Man month 14 4 Job 1 (i) Three years AMC charges NOTE SSI 1 Total of Sch-"A" = Rs: 18.CSTE / DSTE / SSTE / ASTE in installation. charcoal. bricks.4. cement. CSTE / DY. installation. SL No. copper lugs with bolts and nuts.ITEMS OF MLK II SYSTEM – CENTRALISED VERSION Annexure – II Items of Microlok-II EI system (Centralised version) for a typical 4. Description of works Installation. 1A of Schedule-B Maintenance & supervision of SSI equipments for one year as per details given in para. trouble shooting and repairs including supply of hard copies of course modules.10.Road Station Items of Schedule-A & Schedule-B for " Design. sand.000 Page 65 (S18) ELECTRONIC INTERLOCKING . Testing and Commissioning of SSI equipments supplied as per items No. power equipments etc. for installation. For all the stns 3 Training at site / Field / HQ office of CSTE ( Construction) SSI per stn 1 Unit Qnty 1 Job 1 2 3A Technicians/Sr. testing. slalmanie weed and GI wire.12 of Special Condition of contract at the stations below . commissioning and testing including supply hard / soft copies of course modules. supply. commissioning. manufacture. Earthing of SSI equipments Relay racks. testing and commissioning of " Solid state (Electronic) Interlocking system conforming to RDSO/SPN/192/2005 with latest amendments at stations (typical 4 road stations) of Indian Railways ". salt. to be done along with the supply of all requisite materials as per sound engineering practice. This includes supply of earth electrode. Engr. II SL No. PC based operator's console with 19" VDU racks .Pin Connector Housing Assy xvi) 48.1 INTERLOCKING EQUIPMENT: i) ii) iii) iv) v) vi) vii) MLK II Cardfiles MLK II CPU PCBs MLK II PS PCB MLK II Vital I/P PCB MLK II Vital O/P PCB MLK II Non-Vital I/O PCB VCOR Relay Nos Nos Nos Nos Nos Nos Nos Nos Nos Nos Nos Nos Nos Sets Nos Nos Nos Nos Nos Nos Nos Nos Nos 3 2 4 28 28 20 20 30 240 4 4 4 15 15 15 4 4 30 15 4 15 150 viii) VCOR Relay base ix) x) xi) xii) Address Select PCB.48 Pin Address Select PCB.Pin Female Crimp Contact IRISET Page 66 . manufacture and supply of Solid state interlocking system complete as per Special condition of contract and technical specifications enclosed . if any . racks. sub assemblies and other stores.Pin Connector Guide Element xix) 48.ANNEXURE. maintenance terminals including Data logger .96 Pin CPU EEPROM PCB 1". interface equipments . xiii) PCB Keying plug xiv) Lighting Arrestors.Pin Connector Housing Assy xviii) 96. Description of works Unit Qnty Design . interlocking cables . with rate .Wide Blank Front Panel Assy.Pin Connector Guide Element xvii) 96. quantity and the total cost as quoted by the tenderer is detailed below 1 For 1 stn as per details below system 1 1. relays . List of various modules .consists of a) 230V/12V/24V Lightning arrestors b) Isolators c) Convertors xv) 48. Power supply equipments. control cum indication panel . mainly consisting of microprocessor equipments . fixture mounting arrangements and accessories necessary to make the system functional for stations listed above. equipments .Pin Female Connector xx) 48. Page 67 (S18) ELECTRONIC INTERLOCKING .6 Power Supply i) ii) iii) iv) Integrted power supply DC/DC Converter for MLKII Cardfile DC/DC Converter for MLKII Vital I/O Supply DC/DC Converter for MLKII Non-Vital I/O Supply TOTAL = 68. is listed below .ITEMS OF MLK II SYSTEM – CENTRALISED VERSION SL No.435 (Approx) Nos Nos Nos Nos 1 2 2 2 2 Supply of essential spares as stipulated in the provision laid down in special conditions of contract for SSI system . Itemwise details of spare to be supplied with unit.20.4 Microlok Rack with accessories Relay Rack with accessories Termination Rack Design of Solid State Interlocking System to suit Interlocking plans Nos Nos Nos Stn. Description of works Unit Nos Nos Nos Nos Nos Nos Nos Nos Qnty 20 250 2 xxi) 96.Pin Female Crimp Contact xxiii) UPS for Computers 1. 2 2 1 1 1.2 PANELS/FASCIA/TILES i) ii) iii) iv) Control-cum-Indication Panel Computer(Maint Console) with 15" VDU Computer(Operators Console) with 21" VDU Printer 1 1 1 1 1.Pin Female Connector xxii) 96.3 RACKS i) ii) iii) 1.5 RELAYS VITAL C/W BASES i) ii) iii) iv) v) vi) QNN1 relays QNNA1 Relays QL1 Timer relays ECR/ON/OFF/Route/Shunt EKT Nos Nos Nos Nos Nos Nos 44 44 12 4 51 4 1. 3 (b) Supply of documents as per technical specifications 4 Supply of Instruments.Pin Female Crimp Contact Sub Total = Rs: 805883 3 (a) Supply of Documents as detailed below.s level Technical and system module for diagnostic and trouble shooting for repair centre.Pin Connector Guide Element xiii) 48. Engineer.Pin Female Crimp Contact xv) 96.Pin Female Connector xiv) 48.Pin Female Connector xvi) 96.Pin Connector Housing Assy 96. testing. 2A For all the 1 stns Description of works Unit lot Qnty 1 Full & consolidated quantities of 13 LOTs consisting of :i) ii) iii) iv) v) vi) vii) MLK II CPU PCBs MLK II PS PCB MLK II Vital I/P PCB MLK II Vital O/P PCB MLK II Non-Vital O/P PCB Address Select PCB. IRISET Page 68 .Pin Connector Guide Element 96. commissioning and maintenance of the system.II SL No.I 6 sets for each EI 6 sets for each EI sets 1 (II) 1 1 1 (III) Completion documents as per special condition of contracts. Technician/Sr. (I) 6 sets for each E. Engr at installation and maintenance level for installation.96 Pin Nos Nos Nos Nos Nos Nos Nos Nos Nos Nos Nos Nos Nos Sets Nos Nos 1 1 2 2 2 2 2 1 2 2 2 2 2 50 2 50 viii) CPU EEPROM PCB ix) x) xi) xii) 48.Pin Connector Housing Assy 48.ANNEXURE.48 Pin Address Select PCB. Total of Sch-"A" = Rs: 18. 1 Grand Total in words: Rupees Ninety Five Lakhs Forty Six Thousand Nine Hundred and Eighteen Only. (ii) Insertion tool 48 pin .96.06.918 Add.ITEMS OF MLK II SYSTEM – CENTRALISED VERSION SL No.000 Grand Total of Sch-"A" & Sch-"B" without optional item = Rs: 95. (iv) Locator Tool 48/96 pin . (v) insertion tool 96 pin . Description of works Tools kits and measuring instruments for testing maintenance and repair at site. NOTE:. (vi) Removal tool 96 pin . except for the materials which are normally inspected by RDSO. = Rs: 76. Readers have to verify from relevant sources for accurate information. (Disclaimer : Cost shown in this notes is for general information only and may vary .) *** Page 69 (S18) ELECTRONIC INTERLOCKING . spanners etc. (2) The cost of recommended spares as indicated in item no. (viii) General purpose Tool kit ( Srew drivers .Each set consists of (I) Crimping tool 48/96 pin .918 Unit Qnty sets.All items with RDSO specifications/drawings are to be procured from RDSO 's approved supplier conforming to RDSO specification and if not available then from reputed manufacturers of ISO standard. (vii) Digital multimeter 4 and 1/2 digit .)and (ix) Wooden cabinet Sub Total = 70600 TOTAL SCH-B. (iii) Removal tool 48 pin .10.7 above shall not be considered for tender evaluation. NOTE: (1) All items of Schedule-B will be inspected by the authorised representative of CSTE. Engineer/Maintainers in installation commissioning and Months testing including supply of hard copies of course modules to each trainee. The tenderer has to provide proposed documents in original tracing to Railway for approval.ANNEXURE. It also includes provision of EMI Job Protection and Ring earth arrangement as per technical specification enclosed. TOTAL OF SCHEDULE ‘A’ 8. axle counter etc. testing and commissioning of Electronic Interlocking System supplied as per item No:01 of Schedule 'B' including transportation from Consignee's depot to site of work. QTY 1 Per Stn/ Per year 1 3 4 Design. After completion of the work.III Annexure – III Items of “ All Indoor Works for provision of Microlok-II EI system (Distributed version with OFC) at Stations of Indian Railways” SCHEDULE OF WORK SCHEDULE ‘A’ : EXECUTION OF INDOOR WORKS SNo DESCRIPTION OF WORK UNIT 1 Installation. trouble shooting and repairs including supply of Months hard copies of course modules to each trainee. the completion drawings in 10 copies in addition to the original are to be supplied. Man commissioning.90. wiring. All the records are to be maintained as per latest circulars prevailing in the Division. as per the details given in special condition of contract agreement. 2 Maintenance supervision of Electronics Interlocking equipment for one year from the date of expiry of free maintenance period as per conditions of contract. in installation. Training: Man [a] Training of Jr. preparation & supply of ferro copies of each document in seven copies along with original tracing of Gateway quality in AUTO CAD FORMAT. testing. [10] Technical literature in three copies each for all the equipment for the EI including power equipment. at manufacturers premises. [b] Training of Sr. List of Documents: [1] Front plate diagram [2] Route section diagram [3] Control Nos panel contact details [4] Route control chart [5] Non-vital and vital bit chart [6] Signalling circuit along with all logic details with proper contact analysis [7] Power supply details [8] Equipment layout particulars in relay room [9] Relay disposition diagram in Relay room.as prescribed by the Railway authorized representative. as per the latest guidelines of CSTE.650/- 1 1 1 IRISET Page 70 . Engineers. and provision mentioned in Signal Engineering Manual. The work shall be executed only as per approved final drawing. After approval of the same final drawings are to be supplied in four copies. [11] Equipment History Registers: Relay register. During maintenance at least two expert personnel from the firm should be available at the station round the clock. Equipment register as per typical drawing prevailing in division [12] Cable allocation plan . maintenance.I.e. 1 5 Set 1 (Disclaimer : Cost shown in this notes is for general information only and may vary . Mounting arrangements and Accessories necessary to make EI system functional. diagnostic & Trouble shooting and commissioning of EI system as per specifications enclosed. Testing. Readers have to verify from relevant sources for accurate information. System NOTE: Workstation should be capable of reconfiguring the system in case of any' Alterations' in the yard or Interlocking in future. Interconnecting Cables. manufacturer & transportation of Electronic Interlocking System complete as per Special conditions of Contract & RDSO specification No. Inspection by Representative of Dy. [ii] Engineers level: Technical & System Module for Diagnostic & Trouble Shooting for repair Center. Interface Equipment. Commissioning and Maintenance of the system. 10% of all the vital modules. SM console. Vital Relays. RDSO/SPN/192/2005 with latest amendment and as per enclosed technical specification mainly consisting of Microprocessor Equipment.[I] Technician/Junior Engineer [Installation and Maintenance level].150/- 1 2 1 3 1 4 Set of six per E. Instruments/kits: Tool kits and measuring Instruments for Technicians/Junior Engineers for testing. simulation & functional testing. and repair of Hardware and Software including one digital millimeter Fluke187. PC based workstation for Data in-put & configuration.50. Essential spares as stipulated in the special condition of contract [part-II] Clause-20 for the EI system I.I.59. Inspection by representative of Dy. CSTE[C]. CSTE[C] TOTAL OF SCHEDULE ‘B’ = 45. Inspection by LS RDSO. Maintenance Terminals including Data logger. Inspection of EI equipment by RDSO. Racks. Inspection by representative of Dy.Manual for installation.500/TOTAL OF SCHEDULE ‘A’ & ‘B’ = 54. CSTE [CON]. Trouble shooting. Documents: . VDU with standby. equipment must be CENELEC Safety Integrity Level SIL-4 compliant. Power supply System equipment. [iii] Higher Management: Functioning and system over view. Details as per specifications enclosed. The E.ITEMS OF MLK II SYSTEM -DISTRIBUTED VERSION SNo 1 DESCRIPTION OF WORK UNIT QTY Design.) Page 71 (S18) ELECTRONIC INTERLOCKING . Fixtures. required for wiring of interface relays). 1. IB. Sync Master 214T or similar.ANNEXURE. fixing of relays and other associated work in relay room. Gates. These processors apart from implementing the Interlocking. Sidings. manufacture and supply of EI equipment with software. CSTE/Const. bus bars. shall also drive the I/O cards for the following functions: (a) (b) (c) (d) Double line Block Instruments.C. in person). The electronic interlocking equipment at central location is to be connected to the object controllers with relay drive cards at end locations by OFC on a ring basis. 1. (Railways will do the laying and termination of OFC). etc. Berthing Track circuits and Loop line Axle counters. (c) Supply of PC based work station with VDU.two no (g) Execution of Labour portion of Interface relay wiring. Stations Interlocking shall be implemented by the Central processors connected with Panel Operators console. The scheme of Electronic interlocking installation is enclosed. 2 IRISET Page 72 . The tenderer shall supply the terminals. This includes erection of relay racks. The electronic equipment is to be used in distributed mode. Details of supply of materials and Scope of the work (a) Supply of PC based work station with VDU of 21" size TFT. Relays and fuses for interface relays wiring will be supplied by Railways.4 The role of the processors provided at the ends of yard shall be limited to driving the I/O cards. (h) Provision of ring earth arrangement and electromagnetic interference shielding inside the relay room. (A provisional signaling plan of the stations can be had from the office of the Dy. T-102 two no.LCD type Samsung LCD model no. etc. L.2 1. (The wiring material .1 Electronic Interlocking Equipment: Design. No Interlocking shall be implemented by these processors. Relay racks. [details as per technical specification. (e) Supply of Revolving chair Godrej make . There is no need to provide standby to these processors. LVCD Resetting. fuses. testing and commissioning of Electronic Interlocking system including supply of spare cards consisting of 5 per cent of working cards subject to a minimum of one card for each type. The equipment shall conform to RDSO specification RDSO/SPN/192/2005 with latest amendment. Note : Interface relays to be supplied by Railways.type Samsung LCD model no. 1 OF SCHEDULE-‘A’ & ‘B’ OF INDOOR EI WORKS) 1 1. installation. (d) Supply of Godrej Table model no. (b) Supply of Spare VDU.IV Annexure – IV TECHNICAL SPECIFICATION AND SCOPE OF WORKS (FOR ITEM NO. There is no need to provide standby to I/O cards. Warm/hot standby shall be provided to these processors. The contractor shall supply all the material required.one no (f) Supply of Godrej make computer Table . Key board with mouse suitable to above.3 There is no need to provide standby to I/O Cards. Sync Master 214T or similar for Maintainer to monitor the system. (f) Complete laddering for interconnecting wiring up to outdoor Cable Termination rack. One shall be working and other shall be in standby mode. Equipment with OFC through pig tails etc. (k) The tools and measuring instruments required for maintenance of Electronic Interlocking equipment shall be supplied along with the equipment. and all other accessories. 3.I. (g) Two VDUs shall be installed for operation by the operator. contractor shall submit inspection certificates to the Railway stores.TECHNICAL SPECIFICATION AND SCOPE OF WORKS (i) Supply and installation of lightening and surge protection arrangements as per the manufacturer's specifications (j) The Electronic Interlocking equipment at central and end-locations shall contain suitable modems/ communication cards with necessary interface ports to take required number of fibres to work on ring topology.C. (o) However. These cards are in addition to the cards to be supplied as spares indicated above (i. power required for functioning of the equipment shall be derived from 110V DC supply through a suitable DC-DC converter supplied by the tenderer. (c) Installation of VDUs. The D.. Relay Racks. VDUs and up to outdoor Cable Termination rack. Arrangement shall be made to switch over to the standby VDU as and when required by the operator and command can be given through any one of the VDUs. (l) The system shall be wired and equipped with 5 % extra input and out put cards. Note : The cost involved in implementing the technical specifications as committed by the tenderer shall be borne by the contractor. Details of installation works: The contractor shall execute the following works at station and end Goomties:(a) Installation of complete EI equipment including all subsystems at station Relay Room and at end Goomties. (d) Connecting E. SM Console etc. Page 73 (S18) ELECTRONIC INTERLOCKING .e additional spare cards consisting of 5 per cent of working cards subject to a minimum of one card for each type shall also be supplied).C. (n) If the equipment works on AC supply suitable inverter shall be provided by the tenderer. (b) Installation of all racks pertaining to EI system at station Relay Room and at end Goomties which includes input and output Relay housing racks except Outdoor Cable Termination Racks. (e) Supply of wires and wiring materials and inter-wiring of EI equipment. Wherever materials supplied with RDSO inspection. suitable B&C class surge protection equipment as per RDSO recommendation on IPS shall also be provided by the tenderer at central and end locations. supply will be made available by Railways at Central location and end goomties where I/O cards are located. (m) Stable 110 D. The type of rating fuses to be supplied shall be as per manufacturer’s instructions and Railways guidelines (u) For provision of external Data logger the potential free contact of all input and output Relays shall be extended to Tag Blocks. (i) (j) VDU shall be Sony/Samsung/Philips/LG make. The Terminals shall be supplied by the contractor and inspected by the Railway representative at site before use. 20% spare terminals are to be kept as spare. riveting. (s) Phoenix / Wago terminal with suitable fixing arrangements shall only be used for termination of indoor wires. (n) Painting and lettering works as per Railway standard and guidelines. (l) Testing of interlocking and generation of test reports. fixing. masonary works etc. (q) The contractor shall be responsible for handling and safeguarding of all equipments till commissioning the station. (k) Testing of complete installation and generation of pre-commissioning check lists. Equipment. Extended Data logger shall be provided by Railways. Drilling.ANNEXURE. Equipment and 20% spares Fuse base with cartridges subject to minimum 4 Nos. (m) All sorts of cutting. shall be provided by the contractor. wiring and termination of cables for the above works. (r) Contractor shall undertake 12 months free maintenance after commissioning of the system.I. Supply and installation of suitable Surge Protection Devices to the E. (o) Transportation of all materials from Railway stores to station and back shall be done by the contractor for which no additional payment shall be made by the Railways. IRISET Page 74 . wherever required. The tenderer shall execute the work which include supply of Tag Blocks. (p) The contractor shall arrange inspection of all items by the Railway authorities before installation irrespective of the Inspection clause.I.IV (h) Entire yard diagram along with all details including counters and alarms shall be depicted on the VDUs as per approved Front Plate Diagram. (t) Approved type of Fuse base with cartridge are to be used for wiring of E. 5 Event logging for 10.1. Spec. 15[b] VDU with standby arrangement. 5.2 The system shall switch the output to safe state when the vital output relay of the system for control of field equipment is energized due to false feed created either intentionally or unintentionally. 5.1(i) The size of VDU monitor shall be 21” and the VDU is of TFT-LCD type with mounting arrangement. The input/output cards need not have standby facility. 5.10.7. the system shall change over to spare pair of fibers without causing interruption to EI system.2 The third party validation certificate of software of EI system and warm/hot standby change over software for the offered configuration shall be submitted. 3. 3. In addition to working VDU one standby VDU shall also be provided and connected with the system.two working fibers and two spare fibers. the system shall be upgradeable to hot standby for input and output cards by inserting I/O cards in the empty slots provided in the system.00. signals and other field gears.13.1 The proof of compliance of SIL-4 of CENELEC standards or equivalent international standards for hardware and software shall be submitted by the tenderer. 5.1 The warm/hot standby arrangement is required for processor only. 9. 3.2 The software engineering standards followed for developing software shall be made available to RDSO.3 The medium of communication between CIU and OCs shall be OFC (confirming to ITU-T-G652 standards i. Necessary software shall be supplied free of cost to provide hot standby for I/O cards at a later date by the contractor. However.1.3 The verification and validation procedures carried out in house or by independent agency shall be made available to RDSO.5. The tenderer shall supply user-friendly graphic based design tool to generate station specific application software to carryout future yard modifications. 3.13. 8.1. Page 75 (S18) ELECTRONIC INTERLOCKING . In case of failure of working fibers. 5. 8. Four fibers will be made available for system working . 3.1 The EI shall work on 110V/60V/24V/12V DC or 230V AC supply.1.4 VDU control terminals only is required. 8. 15[d] 110V DC 15[e] 21 Inches. 15[c] Relay Interface. 15(a) Approved interlocking Plan shall be supplied by Railway.2 The cycle time and response time of the system shall be clearly indicated. 5. mono mode cable ) provided on ring basis.3.e. No: RDSO/SPN/192/2005 WITH LATEST AMENDMENTS] Para of RDSO Clarification Tech.000 events and facility for automatic serial transfer to central monitor through data logger shall be available in the system.1.7[i] The object controller shall have only relay driver cards duly validated and meeting all safety requirement to drive points.7. 7.TECHNICAL SPECIFICATION AND SCOPE OF WORKS ADDITIONAL INFORMATION/REQUIREMENTS WITH REFERENCE TO TECHNICAL SPECIFICATIONS [SHALL BE READ ALONG WITH RDSO SPEC.4 The system shall be capable of operating on control-cum-indication panel but equipped with operation on VDU only.12 The connection between the electronic interlocking equipment at central location and object controllers at both ends of the yard shall be on OFC. [1] RJ-45 [3] USB 2. 2 MB L2 cache. 43Whr 6-cell Lithium-lon battery. 11g integrated wireless LAN. [1] AC power connector. IRS/S/99/2001 with latest amendments. Wireless. [1] 6-in-1 Digital Media Reader slot. [1] External Microphone. NUM Lock.41 Kg approx 1 Year Limited Warranty [1 Year Parts/1 Year Labour] HP Pavilion. [1] VGA port. [1] Headphone. Touch pad on/off. Battery Charging. CAPS Lock. upgradeable to 2GB. System Power.IV GENERAL: The term Track Circuit may be read as Track circuit/Axle counter wherever it appears in the Technical Specifications. 533MHzFSB] Microsoft [R}] Windows [R} XP Professional 512MB [1 X 512MB] DDR SDRAM [333 MHz] Upgradeable to 2GB max [with discard] 512 MB [ x 1 512MB] DDR SDRAM [333MHz]. IRISET Page 76 . Intel[R} Pro/Wireless 2200 802. Symantec Norton Anti Virus. 19” colour TFT WXGA [1280 X 768 resolution] high definition Bright View 15:9 Wide screen. High speed 56 K Modem Integrated 10/100 LAN Ethernet. integrated Blue tooth.ANNEXURE. Mute. Advanced Configuration and Power Interface [ACPI]. Touch pad pointing device with 4-way scroll and on/off switch button.86 GHz. [1] S-video port. SCROLL Lock. The functional requirements of Data logger included along with supply of E. Compaq Presario V 2317 AP or equivalent. [1] RJ-11. Lenovo. Type-I/II PC Card Slot with support for 16-bit PCMCIA and 32-bit Card bus. in Schedule will be generally in conformity with the RDSO ‘s Specification No. SPECIFICATIONS FOR PC BASED WORK STATION [ITEM NO: 3 OF SCHEDULE ‘B’ Processor Operating system Standard memory Maximum memory System memory Cache Hard drive Optical drive Graphics. Media Slot. Ethernet network compatibility. [1] Port Replicator connector. Intel[R] Pentium [R] M Processor 750 [ ] supports Enhanced Intel [R} speed step Technology [1. 80GB[4200 rpm] Dual Layer DVD+_RW/+_R Intel [R] Graphics Media Accelerator 900 [up to 128 MB Shared Memory]. Plug-and-ply. Consignee. Battery Display Pointing device. [1] IEEE 1394 port. I/O interfaces Compatibility/compliance PC card slots Status display Key board Weight Warranty Make Inspection. Full-sized keyboard with touch pad 2. Dell.0 port. 2MB Level-2 Cache. Symantec Norton Internet Security 2005.I. Modem Net work Pre-installed licensed software. Hibernation/Sleep modes. HDD/Optical activity. [should dust & water proof] Logitech optical scroll mouse MTBF figures: Not less than 101. Shock: 10G peak acceleration [10m/Sec] EMI: FCC Class A and E Minimum of 21” TFT colour monitor of Sony/ LG/ SUMSUNG/ Philips. Air filter. 3 Tool kits and measuring instruments for technicians/Jr.I. non-condensing. etc.I. The control terminal VDUs shall consist of: Industrial grade PC of repute make capable of working continuously Intel Pentium IV @.06 GHz. 80 GB Seagate SATA HDD. Heavy duty steel. maintenance and repair at site. 3. 19” Rack mount 4U chassis Cooling Fan. The heavy duty enclosure/chassis must protect the PC from the envirmental disturbance like dust. Each set will consists of: Crimping Tool Ratchet 48/96-pin Crimping Tool 48-pin Crimping Tool 96 -pin Insertion Tool 48 -pin Removal Tool 48-pin Insertion Tool 96-pin Removal Tool 96 pin General purpose Tool [set of screw Drivers & Spanners] Digital Multi-meter-Fluke 187 Cabinet [Medium Size]. 713 Hours Operating Temperature zero degree Centigrade to 60 degree Centigrade [32 degree F to 140 degree F] Humidity 5% to 95% RH. temperature and vibration. EQUIPMENT AGAINST SCHEDULE-B. Control terminal VDUs shall be configured in hot standby mode such a way that if one system fails another should take over without losing any control and data. Parallel ATA to serial ATA converter [two serial ports] Logitech keyboard. Engineer for Testing. The Industrial grade PC[IPC] must ensure that all IPC components are carefully selected and checked for electromagnetic compatibility[EMC]. SN 1 2 3 4 5 6 7 8 9 10 DESCRIPTION.TECHNICAL SPECIFICATION AND SCOPE OF WORKS SPECIFICATION FOR OPERATORS INTERFACE EQUIPMENT AND VDU [TO BE SUPPLIED ALONG WITH E. 1 2 Description The E. Vibration: 1. temperature resistant and resistant to vibration.5G Max and 0. CPU with 1MB Cache and 533FSB 512MB DDR RAM. Page 77 (S18) ELECTRONIC INTERLOCKING . EMI. QUANTITY.1” p-p at 5 to 500 Hz. system shall work with two sets of control terminal VDUs in lieu of control cum-Indication panel.ITEM No: 1 Sl No. Ring earth shall consist of minimum 8 [Eight] Nos. For inter connection of earth electrode and connection between earth pit to earth Bus bar shall be executed by providing cadmium Bronze wire of 35 Sq. IRISET Page 78 . The spacing between the row shall be kept at 75 CM. 8. 5. Electromagnetic Interference [EMI] shielding shall be done with the bare standard copper conductor of size 10 sq. The whole assembly shall be fixed on a Hylam sheet 0+6mm thickness mounted on wall. TECHNICAL SPECIFICATION FOR RING EARTH ARRANGEMENT 1. The Earth Bus Bar shall be installed at a height of 0. The combined earth value shall be less than 1 ohms [one ohms]. 2. 2.IV TECHNICAL SPECN. 4. 3. Each earth shall be executed as per specification No.5 Mtrs from the floor level wherever installed. 7. The work shall be executed as per the approved drawings of Railway. 3. 8. The conductors for EMI shielding shall be fixed on the walls by providing suitable mounting arrangements and insulated spacers of height of 60 mm. mm bare conductor as per RDSO Specification No: RDSO/SPN/178/2003. 6. The work includes supply of all materials by the contractor at his own cost. 1. of earth pits connected in a Ring formation. 7. 5. The contractor to submit the test certificate of materials supplied by the contractor. and Drawing No. All materials shall be inspected by representative of Dy. All the bare conductors shall be connected to Earth Bus Bar at a common point. 9. The Earth Bus Bar shall be insulated from the building structure with low voltage insulator spacers of height 60mm. equipment room.I. equipment room in 4 rows. The bare copper conductor shall run the four walls inside the E.mm.I. 4. FOR ELECTRO-MAGNETIC INTERFERENCE [EMI] SHIELDING. Ring Earth arrangement shall be installed surrounding the S&T service building or at a suitable place as advised by the Railway authorities as per the site conditions at each station. The contractor shall supply all materials required for the work at his own cost. The value of the earth shall be measured by the contractor jointly with Railway authorities and earth value shall be recorded in prescribed register and also painted on each earth pit by the contractor. 9. Those wires of each row shall finally connected to Earth Bus bar of the E. 6.ANNEXURE. 10. CSTE[C] before execution of the work. of East Coast Railway during preparation of drawings. TECHNICAL SPECIFICATION [FOR DRAWING] TECHNICAL SPECIFICATION FOR DESIGN OF RAILWAY SIGNALLING DRAWINGS INCLUDING CIRCUITS / WIRING DRAGRMS ETC.TECHNICAL SPECIFICATION AND SCOPE OF WORKS 10. Name Plate / Approval Column. / fuse no.I. 1 All the plans should be compliable with requirement of non. (a) No hand correction shall be allowed on the original tracing. At least 20% of available drawing space shall be kept blank at the bottom of each original sheet. All original drawings and prints shall have relay contact no. (b) Economisation in using relay contacts. 2 3 4 5 6 7 8 9 Page 79 (S18) ELECTRONIC INTERLOCKING .RE/RE area and as per site requirement. Each drawing sheet shall have Border Line. The earth leads shall be extended to Equipment room. Wiring diagram for provision of DATA LOGGER shall be prepared on separate sheets. (d) Copy/Prints of drawings whenever submitted shall be accepted by Railway in the form of ‘Ferro Prints’ only. General and Subsidiary rules. (b) Railway reserves the right to add/delete/modify the requirement of Drawings at any point of time. All Original drawings shall be printed through Ink Jet Plotter. During preparation of the drawings the following shall be kept in view: (a) Optimization in using of relays. All drawings shall be prepared on A2 size unless otherwise stated specifically. (c) Checking of check prints shall be done only one time by Railway. (c) Optimization in using of cables. above Name Plate / Approval Column. All drawings shall be prepared with suitable CAD system. SEM. the guide lines provided by RDSO and as per the latest rules prescribed by the Railway. Alteration Column and drawing space as per latest approved practice of East Coast Railway. already incorporated. Power Supply Room and E. Alteration column should be shown on every sheet and sufficient space should be left for further alteration on each sheet. Margin. In addition to the above specifications the contractor shall follow any other standards as followed by the S&T Dept. / terminal no. The designing of Circuit Diagrams shall be done as per extant Railway practice. equipment room by providing suitable earth Bus bar as per standard drawing and connect the same with the concerned equipment which are necessary to be earthed and as advised by the Railway authorities. to accommodate future expansion. All original drawings shall be supplied in tracing paper of 90/100 GSM of GATEWAY qualities. If any connection is required on a sheet the original tracing of that particular sheet shall be replaced with a new one and the same shall be submitted for fresh approval of Railway. who is well versed in Railway Signalling system shall attend concerned Railway Offices and represent the tenderer. (g) In case of any modification in Engineering plan or Interlocking Plan the subsequent modifications in all drawings shall be carried out by the contractor at his own cost. (f) In case of repeated mistakes the drawings shall be rejected and fresh drawing shall be submitted by the contractor for which no extra payment shall be made by Railway. Original Tracings of approved ‘As Planned’ drawings shall be submitted by the contractor to the Railways if so advised.IV (e) After the initial checking is over subsequent drawings shall be submitted in original tracing only. the authorized qualified Design Engineer(s) .CSTE [C] . For all Technical discussions with Railways regarding the work. (h) All transaction shall be made through Dy. (j) 10 11 Inspection & Approval: By Design and Drawing office of CSTE.ANNEXURE. (i) The contractor shall be responsible for collection of all field data from the site of work for preparation of ‘As made’ drawings. *** IRISET Page 80 . No. 1 Station Srivenkateswara Palem (MLK-I) Srivenkateswara Palem (MLK-II) 2 3 4 5 6 7 8 9 10 11 Kavali (MLK-I) Kavali ( MLK-II) Tettu Ulavapadu Singarayakonda Tanguturu Surareddypalem Ongole Karavadi Uppugunduru (Safelok) Vetapalem Total DOI 12.1995 17.1997 4 0 1 2 3 0 5 3 0 0 0 21 0 2 0 6 2 1 0 0 0 0 0 0 13 0 0 0 2 2 1 0 5 0 1 0 5 17 0 3 0 0 7 0 0 5 3 0 2 2 26 0 5 0 2 6 2 0 1 1 0 0 1 25 3 0 0 4 3 3 0 1 3 1 1 2 23 3 14 0 15 22 10 0 17 10 2 3 10 125 2003-04 3 200405 2 No.09.1997 31.05. of Failures 20052006200706 07 08 1 4 7 200809 2 Total 19 Page 81 (S18) ELECTRONIC INTERLOCKING .04.1997 04.1994 16.1995 31.1998 29.01.FAILURE SUMMERY OF EI SYSTEM Annexure – V Failure summary of Electronic Interlocking system at Stations of Indian Railways Year Wise Failures-US & S make Sl.1998 02.01.12.05.2000 19.03.05.2008 02.07.1999 30.07.03.2008 0 10.1995 06.03. 03.2006 28.11.RLY.01.C.05.P R A H A Sl.08.V S.07.09.2006 06.A Z D .2006 15.2006 19.2005 18.2006 29.06.2006 Total failures 3 4 7 8 0 4 4 6 10 7 6 59 Reset/ Restored 1 4 2 5 3 2 7 5 2 31 Power Supply 2 2 1 2 1 1 9 Cable failure + connector 1 1 1 Card failure 1 2 2 2 7 staff working 1 1 2 Relay Route cancellation 1 1 2 Pedapalli Kolanur Potkapalli Uppal Chutalpalli Yelgur Nekonda Kesamudram Mahabubabad Gundrathimadugu Madhura TOTAL 1 3 1 5 IRISET Page 82 .10.2006 29.2007 04.ANNEXURE .2006 12. No 1 2 3 4 5 6 7 8 9 10 11 Station Date of installation 19.2006 25.02.08. 12.01.2009 2 1 9 21 4 1 1 0 2 1 4 5 51 - 1 4 16 1 1 2 2 27 2 1 1 1 5 1 2 1 1 5 1 1 Page 83 (S18) ELECTRONIC INTERLOCKING .09.FAILURE SUMMERY OF EI SYSTEM C.2009 10.12.03.10.2008 31. No station Date of installation Total failures Reset/ Restored Right Auto Power Supply Card Failure Staff Working Fuse Blown off 1 2 3 Route cancellation 5 Relay 1 1 1 (panel) 8 1 2 3 4 5 6 7 8 9 10 11 12 Shirawade Karad Shwnoli Takari Kirloskarwadi Bhilawadi Bhavani Nagar Nandre Jaisingpur Hatkangle Rukadi Gurumarket TOTAL 28.2008 08.2007 22.03.2008 20.RLY-GENERAL ELECTRIC Sl.02.12.11.2009 20.2008 22.2008 16.02.12.2009 31.2007 28.2009 04. ANNEXURE - V S.C.RLY- Union Switch & Signal System Sl. No. 1 Station Srivenkateswara Palem - MLK-I Srivenkateswara Palem - MLK-II Kavali - MLK-I Kavali - MLK-II 3 4 5 6 7 8 9 10 11 Tettu Ulavapadu Singarayakonda Tanguturu Surareddypalem Ongole Karavadi Uppugunduru – Safelok Vetapalem Total DATE OF TOTAL INSTALLATION FAILURES 12.01.1995 06.07.2008 10.07.1994 17.05.2008 02.09.1995 17.12.1995 31.05.1999 30.03.1997 31.05.1997 04.03.2000 19.03.1998 02.04.1998 29.01.1997 19 3 14 0 15 22 10 0 17 10 2 3 10 125 CAUSE RESET/ POWER CARD CABLE & STAFF RESTORED SUPPLY FAILURES CONNECTORS WORKING 2 0 2 0 2 7 8 0 12 6 0 0 7 46 4 0 4 0 5 3 0 0 1 2 2 1 0 22 11 2 5 0 6 8 1 0 4 2 0 2 1 42 2 0 0 0 1 0 0 0 0 0 0 0 0 3 0 1 3 0 0 5 1 0 0 0 0 0 2 12 REJECTED & RESTORED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 *** IRISET Page 84 FACTORY AND SITE ACCEPTANCE TEST OF MLK II Annexure – VI Factory Acceptance Test and Site Acceptance Test of Microlok II Factory Acceptance Test: 1. Purpose This document defines the procedure for factory testing of Microlok II station interlocking, where tests are executed in a factory environment. Results of the tests are observed and documented in a Test Report. 2. Overview The Factory Acceptance Test ensures that Microlok II based station interlocking system fulfills the station control table requirements and working in safely manner if any false inputs/information received. FAT is carried out through simulation set up (using toggle switches or MISS software) at factory which all field inputs are simulated. FAT shall also be carried out for each station interlocking applicable to the project. 3. Scope On doing FAT for each station interlocking at factory before delivering to site it minimizes the site error and reduces the correction at site. 4. Responsibility Principles Tester - The person appointed by ASTS to perform principles tests. The Principles Tester shall be independent of design and installation but can perform any preceding tests. Tester in Charge - The person appointed by ASTS to ensure that all testing, inspections and recordings of all testing activities are managed in an orderly manner, to an agreed program. He has responsibility to keep all the test records and also ensures that all the applicable forms being completed / closed out before dispatching to site. 5. Abbreviations ASTS FAT FRVD I/O PC SIP VCOR VDU .ml2 .mll .mlp Ansaldo STS India Pvt. Ltd Factory Acceptance Test Free Run Variable Display Input / Output Personal Computer Signalling Interlocking Plan Vital cut off Relay Video Display Unit Microlok II Source file Microlok II Listing file Microlok II compiled file 6. Inputs To proceed the FAT, the following inputs are supplied to Tester In charge with “Testing copy” stamp, a) Microlok II .ml2, .mll & .mlp file (Hardcopy & Read-only Softcopy) b) Station SIP c) Station Route control chart d) Station Control cum indication panel diagram e) Cross tables Page 85 (S18) ELECTRONIC INTERLOCKING ANNEXURE -VI 7. FAT Setup The following equipments are required to set up the FAT; Tester In charge is responsible to set up for FAT according to station specific. a) Microlok II b) Cardfile (may require Special cardfile if all station CPU’s are placed in one) c) Communication equipment if required (E-patch panel, Cable) d) PC’s (Simulator, Maintenance PC & Operator PC) e) Power supply Equipments (Converters, Cable Extension Cards) f) Simulation Panel if required Simple Block Diagram (FAT Setup) Simulator PC Microlok II Operator VDU OR Simulator Panel Maintenance PC 8. Testing with simulator setup Availability of the I/O PCB’s to the station specific, the simulation testing shall be carried out through Simulation panel. The simulation panel consists of toggle switches to simulate the track and point detection conditions and rotary switches to simulate the lamp proving detection. Any additional requirements such as block, IBH, Crank handle, Level crossing & Axle counters pertaining to indications are simulated according to the requirement of station layout by switches. The indication portion of control cum indication panel is to be tested through VDU panel. 9. Testing with MISS software (Simulator Pc) Simulation testing shall be carried out through MISS setup if I/O cards are not available or if station layout is large / yard which requires more physical wiring. All I/O bits are simulated through PC via serial communication between PC & MLK II. The simulation system (SMPC) is used to operate control bits in order to set/cancel routes, set points and give releases. MISS will also provide make and break controls to the Field Equipment Simulation System e.g. Clear / occupy track circuits, make / break point detection, make / break lamp proving etc. 10. Types of Testing The following testing shall be carried out while doing FAT, • • • • • • • IRISET Power On VCOR Communication testing Correspondence Test System integrity Test Principle’s Test Interlocking testing Page 86 Operate Points from VDU and change the field status from simulator panel/PC and check the VDU display changes accordingly Toggle Signal lamp (Red) switches and check VDU indication flashes Principles Testing: To ensure that the Application Logic is functioning in accordance with the client’s signalling principles a principles test is carried out. To initialize the station interlocking. System Integrity Test System Integrity test is to prepare the simulator to the station specific needs before starting Interlocking tests. After energizing VCORs it indicates that the Microlok units are healthy and the programs loaded are error free. Check the communication status in LEDs and alpha-numeric display at Microlok show the communication status and check the indication status in VDU. Correspondence Test: The Tester shall correspond all controls and indications between the VDU and the Microlok II. This test ensures that all locking requirements are met. Compiler version etc. a second tester shall be checking the tested functions (as witnessed from the testing) against the control tables. A list of all controls and indications that are to be tested is available in the serial section definition of the Microlok II communication link. this will automatically enable communication between VDU and Microlok. this will automatically enable the communication between Microlok Units. signals clear to the correct aspect.Unoccupied. Refer relevant Microlok II Application data for this serial section definition.FACTORY AND SITE ACCEPTANCE TEST OF MLK II 11. and indications at the VDU will be dynamically updated based on the status received from Microlok. Procedure Before proceeding to upload the . Points status . upload the application data to the Microlok-II units and Check whether VCORs of Microlok II units are energized. An Assistant Tester shall record the individual tests on the control tables and test sheets. the . Control Table Validation: As the Principles Tester carrying out testing to the source documents [SIP’s – Signalling Plans and Route Table(s)].Normal and Signal status – Red or ON) from simulation panel/PC are kept in favorable position Check whether indications in VDU are in correspondence with the field simulations Toggle all track circuits from Simulation panel/PC one after another and check VDU display changes correspondingly. Page 87 (S18) ELECTRONIC INTERLOCKING . Timer section. Check the voltages given to the Microlok cardfiles are within ranges.mll shall be verified by the tester to ensure the exceeds of bit usages. all the controls required to clear the aspect are set to the required positions and the design is in accordance with the client’s signalling principles. Power ON Test: Power ON Test includes extending power to Microlok II card files – 12Volts and 24 Volts DC from rectifiers and 230Volts AC mains to the VDU computer. Communication test: Both Microlok and VCOR is picked up. field inputs (Tracks status . When the VDU software is run. VCOR test: After power is extended.mlp file. When locking of crank handle or keysiding is restored. The LR. SET means value=1 and CLEAR means value=0 in Boolean equations. Procedure: IRISET Page 88 . if points & tracks are operated for other routes. o TEST 6: Route shall remain set & locked and signal shall remain OFF. • The Signal goes to OFF aspect after route is set and locked Procedure: • Set the FRVD for LR. Route Cancellation Test: Aim: To check: • The manual route cancellation shall be immediate if the approach tracks are unoccupied.ANNEXURE -VI FRVD (Free Running Variable Display) is a facility available in Microlok Maintenance tool which shall be utilised to monitor the status of bits defined in Application Data. Locking Test: Aim: To check: • The route gets set and locked if the favourable conditions are met. the conflicting routes shall not be available or cannot be set. ASR and HR bits of the required route. o TEST 7: Under Route set and locked condition. Also Test for the routes (which are not conflicting but are available). • TEST 1: Check the ASR bit is SET. • The manual route cancellation with appropriate timer if dead approach is applicable. This shall be followed by ASR bit in CLEAR and HR bit in SET. o TEST 3: Route shall remain set and locked but signal is put back to danger if back lock track or overlap track is failed. NOTE: It is essential that the original times are reinstated and validated at the completion of testing. if required. the application logic timer variable setting will be reduced for nominated variables (as nominated by the Principles Tester). The signal shall restore when tracks failure resolves except Replacement track. Vital Timers: In order to minimise testing time. the routes shall get set & locked independently and simultaneous train movement on these routes does not affect the route under test. • Test for the following conditions while route is set and locked: o TEST 2: Route shall remain set and locked even if approach lock tracks are occupied. While doing specific control table test. UCR bit shall SET. A List of timers altered for test purposes is recorded on test certificate Timers Altered for Testing Log. o TEST 5: The signal is put back to danger in case Level crossing. the route must be released with the elapse of timer. by means of FRVD it has to ensure all the relevant bits applicable to test shall be “Set or Clear” and other irrelevant bits to check as well whether is updated for the test. Initiate route set from VDU. • The manual route cancellation with appropriate timer if the approach tracks are occupied. Route Setting. UCR. The signal shall restore when point detection is restored. crank handle or siding lock detection is lost. • The route cancellation with train movement (including sectional route release if applicable). This test is performed as per Cross table. o TEST 4: Route shall remain set and locked but signal is put back to danger in case point detection is lost. TEST 3: Simulate the ahead signal as Yellow (Y) or Double yellow (YY) or Green (G) aspect. With the following preconditions. [NOTE: Simulate short train (one track occupied) and long train (all back lock tracks occupied) simulation to test the route release sequence]. TEST 4: Simulate the ahead signal as blank aspect. Calling ON signal shall display ON aspect. the route shall release after elapse of appropriate timer. EUUYR. sectional route release is applicable. the signal under test shall display RED (R) aspect. the signal under test shall display RED aspect as per SIP. the route shall get released after the completion of train movement and full occupation of berthing track. simulate and check the following: o All the track circuits shall be cleared (Unoccupied). the signal under test shall display aspect as per SIP. o o o o o Point Control Test: Aim: To check: Page 89 (S18) ELECTRONIC INTERLOCKING . • The movement of train (occupied status of replacement track circuits) replaces the signal aspect in sequence OFF (G or Y) R. ASR and HR bits of the required route. Simulate route set and locked condition for the given route. o TEST 3: Precondition of dead approach routes. apply ‘Signal Stop’ followed by ‘Route Release’ command from VDU. TEST 5: Calling-ON signal is OFF aspect only when main signal is failed. LR. o TEST 4: Simulate the train movement over the route set and locked. o TEST 1: Precondition of approach lock tracks unoccupied. Ensure manual route release is applicable only when signal is put back to danger using ‘Signal Stop’ command from VDU. UCR. simulate the route cancellation. • Procedure: • Set and lock the routes for the signals as per SIP and Control Table definitions. the track sections in the route shall be released with the train movement based on TLSR/ TRSR settings as per control table definitions. Signal Aspect Sequence: Aim: To check: • The change in signal aspect with the status of ahead signal aspect. TEST 1: Simulate occupancy of the control track circuits including overlap track circuit. the signal under test shall display aspect as per SIP definition. o TEST 2: Precondition of approach lock tracks occupied. • The lamp failure conditions leading to more restrictive aspects. TEST 2: Simulate the ahead signal as RED (R) aspect.FACTORY AND SITE ACCEPTANCE TEST OF MLK II • • • • Set the FRVD for EUYR. apply ‘Signal Stop’ followed by ‘Route Release’ command from VDU. The signal under test shall reflect OFF aspect as per control table definition. the route shall release immediately. In case. the route shall release after elapse of appropriate time. apply ‘Signal Stop’ followed by ‘Route Release’ command from VDU. The Level crossings shall be closed. The emergency point movement in case the point track circuit has failed depicting occupancy of point tracks. detected in Normal direction and route is not set. when route is called or call for individual point operation. IRISET Page 90 . TEST 5: Precondition is route is not set and the point zone track circuit has failed. Ensure feed is cut off either immediately if the point position is detected in Reverse or after elapse of appropriate time if point position is not detected in Reverse direction. the power feed shall be cut off immediately when point detection is received or after elapse of appropriate timer if the point detection is not received. the feed to the points shall be extended using NWR and WCR output bits. Ensure that signal shall display OFF aspect only when points in the route and in the overlap are locked and detected in the desired position. • The release and locking of Siding key locked levers. The point movement in Normal. ensure no feed is extended to track device but the indications are changed on VDU screen. o TEST 2: Precondition is point shall be in “Free” position. detected in reverse direction and route is not set. Ensure feed is cut off either immediately if the point position is detected in Normal or after elapse of appropriate time if point position is not detected in Normal direction.ANNEXURE -VI • • • The points are called. Simulate point movement to “Reverse” position using VDU Menu commands. Simulate point movement to “Normal” position using VDU Menu commands. Procedure: • Check for the point movement under following condition: o TEST 1: Precondition is point shall be in “Free” for route call position but not in favourable condition as per control table. Free for Route Call and Reverse. Also ensure that Emergency movement is not possible under Route Set and Locked condition. TEST 3: Precondition is point shall be detected in “Normal” or “Reverse” position and route is not set. o o o Level Crossing. the points shall move and get set and locked in the desired position as per control definition. ensure feed is cut off either immediately if the point position is detected in Reverse/ Normal or after elapse of appropriate time if point position is not detected in Normal/Reverse direction depending on the position called for. Simulate a route call using VDU. the feed to the points shall be extended using RWR and WCR output bits. moved and locked in desired position as per control table definition. Crank Handle & Siding Control Test: Aim: To check: • The release and locking of crank handle. The signal shall be put back to danger in case point detection is lost. • The release and locking of Siding key locked levers. Simulate movement to “Free”/ “Normal”/ “Reverse” position using Emergency point movement commands from VDU. Simulate point movement to “Free” position using VDU Menu commands. TEST 4: Precondition is point shall be in “Free” position. Ensure movement of point is not possible using Normal Point Menu Commands from VDU. In case route was set and locked. Ensure the route becomes unavailable if the route is not set and locked. • • Following tests also will be carried out in addition to the above individual tests: o o o o o o o o o o o o o o o o o o o o o o Signal & route . If the key is forcibly extracted. LC etc. In case route was set and locked. • TEST 1: Simulate the release of key for crank handles using VDU. the route shall be released before releasing the key.clear Signal & route – Indication Point Indication CH & LC indication Track Occupied Indication Break test and Mid stroke test – Point (Control and Indication) Break test – Track Break test – Ahead signal. Ensure the route becomes unavailable if the route is not set and locked. If the key is forcibly extracted. TEST 3: Simulate the release of key for Level Crossing using VDU. Ensure the route becomes unavailable if the route is not set and locked. If the key is forcibly extracted. Page 91 (S18) ELECTRONIC INTERLOCKING . CH. In case route was set and locked. Conflict signals and routes Reverse move Jump moves Normal release Emergency release Approach release Overlap release Auto release (Train move) Sectional route release Back lock test Signal track test SM’s control Cross test with all other elements Special tests Results: All the above test results shall be logged and signed off in a marked up copy of the: • Control Table • Activities Event log • Acceptance Test Incident Report (ATIR) if required. the signal shall be put back to danger. the signal shall go back to danger. TEST 2: Simulate the release of key for Siding Control Lever using VDU.FACTORY AND SITE ACCEPTANCE TEST OF MLK II Procedure: • Set the FRVD of related bits. the route shall be released before releasing the key. the signal shall be put back to danger. the route shall be released before releasing the key. Site Acceptance Test: 1.ANNEXURE -VI Re-testing Application Logic: If it is necessary to undertake application logic changes as a result of incidents arising from Principles Testing or for other reasons then the details shall be documented on an ATIR. Scope On doing SAT for each station interlocking at site ensures the overall system safety and error free system is being delivered to the client. Documentation: All the test results obtained for the particular installation under test shall be part of the supporting documentation package for the Microlok II Application Logic Principles Testing. Results of the tests are observed and documented in a Test Report.e Microlok II. He has responsibility to keep all the test records and also ensures that all the applicable forms being completed / closed out before handing over to client. 5. Following update of application logic to address a deficiency. to an agreed program. Purpose This document defines the procedure for Site testing of Microlok II Station interlocking. Minor Logic changes need not be updated individually but can be completed as one data change. the designer shall produce a “difference list” that highlights the changes made to the previous version of the application logic. Overview The Site Acceptance Test ensures that all the equipments installed at site i.The person appointed by ASTS to perform principles tests.The person appointed by ASTS to ensure that all testing. 4. Power supply equipments. Relays and Control cum indication panel are functional correctly as per approved system configuration & station interlocking requirements and working in safely manner and failsafe if any equipment fails / false inputs/information received. where tests are executed at site environment. 3. Responsibility Principles Tester . Ltd Control Cum Indication Panel Input / Output Page 92 . The Principles Tester shall be independent of design and installation but can perform any preceding tests. 12. Tester in Charge . Communication equipments. The supporting documentation package shall be available for review during Microlok II Application Logic Principles Testing as various tests are completed. SAT shall also be carried out for each station applicable to the project. 2. SAT mainly involves the System integrity and functional testing of all equipments and interlocking testing also shall be carried out with full setup except the trackside equipments. inspections and recordings of all testing activities are managed in an orderly manner. Abbreviations ASTS CCIP I/O IRISET - Ansaldo STS India Pvt. Inputs To proceed the SAT. a) Microlok II . so there is no need of separate set up is required except to simulate the field inputs. • • • • • • • • • • • • Visual test Wire count test Bell test Insulation resistance test Earthing test Power On VCOR Communication testing Correspondence Test System Integrity Test Interlocking testing Change over test Page 93 (S18) ELECTRONIC INTERLOCKING .mlp - Personal Computer Site Acceptance Test Signalling Interlocking Plan Vital cut off Relay Video Display Unit Microlok II Source file Microlok II Listing file Microlok II compiled file 6. All the field inputs are simulated through toggle switches and inputs are sending to Microlok II via relays and the field outputs are sending to lamps through relays. SAT setup block diagram is nothing but Station configuration including with Simulation panel for field inputs and the Tester in charge is responsible to check all connectivity as per Microlok II system configuration.mlp file (Hardcopy & Read-only Softcopy) b) Station SIP c) Station Route control chart d) Station Control cum indication panel diagram e) Cross tables f) Wiring circuits 7. Types of Testing The following testing shall be carried out while doing FAT. the following inputs are supplied to Tester In charge with “Testing copy” stamp.mll . Tester In charge is responsible to set up for field inputs simulation panel including lamp aspects according to station specific.FACTORY AND SITE ACCEPTANCE TEST OF MLK II PC SAT SIP VCOR VDU . 8. .mll & .ml2.ml2 . SAT Setup All the equipments involved for station working is being installed before proceeding SAT. Wire Count Test This is to ensure the number of wires used in each relay contact and terminals is as per testing copy issued by Design. When the VDU software is run. Any mismatch found in this is to be logged and informed to Site Manager & Project Manager and corrective action to be taken prior to starting of bell test. Any changes required to be informed to Site Manager & Project Manager to take necessary corrective action prior to starting of testing. If earth resistance is found above 5 Ohms. Tester needs to check all the activities as mentioned in Pre-commissioning checklist. upload the application data to the Microlok-II units and Check whether VCORs of Microlok II units are energized. After energizing VCORs it indicates that the Microlok units are healthy and the programs loaded are error free. Power ON Before extending power to the equipments. VCOR test After power is extended. Once the low resistance earth ground is established for a signal housing the apparatus in the house should be connected to the earth ground as described in Grounding and surge protection and EM Compatibility requirements for Microlok II based Interlocking systems Measurement of earth resistance is conducted in presence of customer. After that Power On test shall be conducted. Any low insulation resistance found in this is to be logged and informed to Site Manager & Project Manager to take necessary corrective action prior to starting of System integrity & Simulation Test. Procedure Before proceeding the below tests. Bell Test This is to ensure the continuity in each wire used and the wiring is made as per the testing copy issued by Design. etc. On doing the visual check the construction checklist is updated to ensure all installation done properly.ANNEXURE -VI 9. it needs to ensure all the output voltages from IPS is set at correct voltage as mentioned in the power supply equipments/design and also ensures that Battery is connected & charged fully. Communication test Both Microlok and VCOR is picked up. this is to be logged and informed to Site Manager & Project Manager to take necessary corrective action prior to starting of Power On Test. it includes extending power to all input terminals installed at site and ensures the correct voltages are measured at input & at end terminals as per wiring design before connecting to the equipments. Any mismatch found in this is to be logged and informed to Site Manager & Project Manager and corrective action to be taken prior to starting of simulation test. EARTHING TEST The first step in providing effective personnel and equipment protection is preparing a low resistance grounding electrode or grounding electrode system at each equipment housing room. this will IRISET Page 94 . Insulation Resistance Test This is to ensure the safety to the persons involved in testing to confirm that there is no contact between any of the power circuit with body of the any metallic equipment such as racks. Visual Test The visual test is to ensure the quality of workmanship carried by the construction team and to confirm everything followed as per the requirement of customer and as indicated in the design drawing. this will automatically enable the communication between Microlok Units. Refer relevant Microlok II Application data or wiring circuits for this Bit list. TEST 4: The signal is put back to danger in case Level crossing. A list of all controls & indications and Vital I/O that are to be tested is available in the I/O bit list. crank handle or siding lock detection is lost. and indications at the VDU will be dynamically updated based on the status received from Microlok. a second tester shall be checking the tested functions (as witnessed from the testing) against the control tables.Normal and Signal status – Red or ON) from simulation panel are kept in favorable position Check whether indications in CCIP are in correspondence with the field simulations Toggle all track circuits from Simulation panel one after another and check CCIP display changes correspondingly. • To initialize the station interlocking. Points status . TEST 2: Route shall remain set and locked but signal is put back to danger if back lock track or overlap track is failed. The signal shall restore when point detection is restored. TEST 5: Route shall remain set & locked and signal shall remain OFF. Locking Test: Aim: To check: • • • The route gets set and locked if the favourable conditions are met. if points & tracks are operated for other routes. System Integrity Test System Integrity test is to prepare the simulator to the station specific needs before starting Interlocking tests.Unoccupied. Check the communication status in LEDs and alpha-numeric display at Microlok show the communication status and check the indication status in VDU. Correspondence Test The Tester shall correspond all controls & indications between control cum indication panel and Microlok II and also correspond test shall be performed for Vital I/O between Microlok II and simulation Panel connected via relays. The Signal goes to OFF aspect after route is set and locked Test for the following conditions while route is set and locked: o o TEST 1: Route shall remain set and locked even if approach lock tracks are occupied. the route must be released with the elapse of timer. The signal shall restore when tracks failure resolves except Replacement track. Operate Points from CCIP and change the field status from simulator panel and check the CCIP display changes accordingly Toggle Signal status (Red) switches and check CCIP indication flashes • • • • Control Table Validation As the Principles Tester carrying out testing to the source documents [SIP’s – Signalling Plans and Route Table(s)]. TEST 3: Route shall remain set and locked but signal is put back to danger in case point detection is lost. When locking of crank handle or keysiding is restored. field inputs (Tracks status . Route Setting. Procedure: o o o Page 95 (S18) ELECTRONIC INTERLOCKING .FACTORY AND SITE ACCEPTANCE TEST OF MLK II automatically enable communication between VDU and Microlok. The route cancellation with train movement (including sectional route release if applicable). [NOTE: Simulate short train (one track occupied) and long train (all back lock tracks occupied) simulation to test the route release sequence]. the conflicting routes shall not be available or cannot be set. In case. TEST 3: Precondition of dead approach routes. Simulate route set and locked condition for the given route. Route Cancellation Test : Aim: To check: • • • • The manual route cancellation shall be immediate if the approach tracks are unoccupied. The movement of train (occupied status of replacement track circuits) replaces the signal aspect in sequence OFF (G or Y) R. the track sections in the route shall be released with the train movement based on TLSR/ TRSR settings as per control table definitions. TEST 4: Simulate the train movement over the route set and locked. apply ‘Signal Stop’ followed by ‘Route Release’ command from CCIP. Set and lock the routes for the signals as per SIP and Control Table definitions. The manual route cancellation with appropriate timer if the approach tracks are occupied. apply ‘Signal Stop’ followed by ‘Route Release’ command from CCIP. Ensure manual route release is applicable only when signal is put back to danger using ‘Signal Stop’ command from CCIP. o TEST 1: Precondition of approach lock tracks unoccupied. the routes shall get set & locked independently and simultaneous train movement on these routes does not affect the route under test. the route shall get released after the completion of train movement and full occupation of berthing track. apply ‘Signal Stop’ followed by ‘Route Release’ command from CCIP. Also Test for the routes (which are not conflicting but are available). Procedure: • • • o o o Signal Aspect Sequence: Aim: To check: • • • • The change in signal aspect with the status of ahead signal aspect. TEST 2: Precondition of approach lock tracks occupied. simulate and check the following: Page 96 Procedure: IRISET . the route shall release immediately. simulate the route cancellation.ANNEXURE -VI o TEST 6: Under Route set and locked condition. the route shall release after elapse of appropriate time. With the following preconditions. The lamp failure conditions leading to more restrictive aspects. the route shall release after elapse of appropriate timer. The manual route cancellation with appropriate timer if dead approach is applicable. sectional route release is applicable. This test is performed as per Cross table. when route is called or call for individual point operation. Signal Aspect Cascading Test: Aim to check: • To change the signal aspects if any aspect on same mast fails due to lamp failure. the signal under test shall display aspect as per SIP definition. Procedure: • o o o o Point Control Test: Aim: To check: • • The points are called. simulate and check the following: o All the track circuits shall be cleared (Unoccupied). TEST 2: Simulate the ahead signal as RED (R) aspect. Check for the point movement under following condition: • Procedure: • Page 97 (S18) ELECTRONIC INTERLOCKING . The point movement in Normal. TEST 3: Simulate the ahead signal as Yellow (Y) or Double yellow (YY) or Green (G) aspect. TEST 1: Simulate occupancy of the control track circuits including overlap track circuit. TEST 2: Simulate failure of Double Yellow (YY) aspect (if applicable) of signal under test. the signal under test shall display RED (R) aspect. TEST 5: Calling-ON signal is OFF aspect only when main signal is failed. The Level crossings shall be closed. TEST 3: Simulate failure of Yellow (Y) aspect of signal under test. The signal under test shall reflect OFF aspect as per control table definition. the signal under test shall display next restrictive aspect ie Yellow (Y) aspect in this case. The emergency point movement in case the point track circuit has failed depicting occupancy of point tracks. moved and locked in desired position as per control table definition. TEST 1: Simulate failure of Green aspect (if applicable) of signal under test. the signal under test shall display Red (R) aspect. the power feed shall be cut off immediately when point detection is received or after elapse of appropriate timer if the point detection is not received. the signal under test shall display RED aspect as per SIP. Free for Route Call and Reverse. The Level crossings shall be closed. the signal under test shall display next restrictive aspect ie Double Yellow (YY) aspect in this case. Set and lock the routes for the signals as per SIP and Control Table definitions. the signal under test shall display Red (R) aspect without route indication. the signal under test shall display aspect as per SIP.FACTORY AND SITE ACCEPTANCE TEST OF MLK II o o o o o o All the track circuits shall be cleared (Unoccupied). TEST 4: Simulate the ahead signal as blank aspect. Calling ON signal shall display ON aspect. TEST 5: Simulate failure of Yellow (Y) aspect of signal having route indicator (YU) under test. The signal under test shall reflect OFF aspect as per control table definition. TEST 5: Precondition is route is not set and the point zone track circuit has failed. In case route Page 98 Procedure: • IRISET . The release and locking of Siding key locked levers. ensure no feed is extended to track device but the indications are changed on VDU screen. TEST 4: Precondition is point shall be in “Free” position. the feed to the points shall be extended using NWR and WCR output bits. Simulate a route call using VDU. Ensure feed is cut off either immediately if the point position is detected in Reverse or after elapse of appropriate time if point position is not detected in Reverse direction. detected in Normal direction and route is not set. If the key is forcibly extracted. the route shall be released before releasing the key. the feed to the points shall be extended using RWR and WCR output bits. o o o o Level Crossing. TEST 2: Simulate the release of key for Siding Control Lever using CCIP. Ensure that signal shall display OFF aspect only when points in the route and in the overlap are locked and detected in the desired position. The release and locking of Siding key locked levers. The signal shall be put back to danger in case point detection is lost. detected in reverse direction and route is not set. the signal shall go back to danger. Ensure feed is cut off either immediately if the point position is detected in Normal or after elapse of appropriate time if point position is not detected in Normal direction. Also ensure that Emergency movement is not possible under Route Set and Locked condition. Ensure movement of point is not possible using Normal Point Menu Commands from VDU. TEST 3: Precondition is point shall be detected in “Normal” or “Reverse” position and route is not set.ANNEXURE -VI o TEST 1: Precondition is point shall be in “Free” for route call position but not in favorable condition as per control table. TEST 1: Simulate the release of key for crank handles using CCIP. Simulate point movement to “Normal” position using VDU Menu commands. Ensure the route becomes unavailable if the route is not set and locked. Simulate movement to “Free”/ “Normal”/ “Reverse” position using Emergency point movement commands from VDU. Simulate point movement to “Free” position using VDU Menu commands. Crank Handle & Siding Control Test: Aim: To check: • • • • The release and locking of crank handle. Simulate point movement to “Reverse” position using VDU Menu commands. ensure feed is cut off either immediately if the point position is detected in Reverse/ Normal or after elapse of appropriate time if point position is not detected in Normal/Reverse direction depending on the position called for. TEST 2: Precondition is point shall be in “Free” position. Ensure the route becomes unavailable if the route is not set and locked. the points shall move and get set and locked in the desired position as per control definition. In case route was set and locked. CH. If the key is forcibly extracted. This change over shall be conducted and ensured there is no unsafe situation arise for the following scenarios. Change Over Test: The Tester has to ensure the system change over between Microlok II is happening if any one of the system fails or in the Diagnostic Mode. LC etc. the signal shall be put back to danger. the route shall be released before releasing the key. Ensure the route becomes unavailable if the route is not set and locked. Signal & route . • TEST 3: Simulate the release of key for Level Crossing using CCIP. Conflict signals and routes Reverse move Jump moves Normal release Emergency release Approach release Overlap release Auto release (Train move) Sectional route release Back lock test Signal track test SM’s control Cross test with all other elements Special tests Following tests also will be carried out in addition to the above individual tests: • • • • • • • • • • • • • • • • • • • • • • Results: All the above test results shall be logged and signed off in a marked up copy of the: • • • Control Table Activities Event log Acceptance Test Incident Report (ATIR) if required. the route shall be released before releasing the key.clear Signal & route – Indication Point Indication CH & LC indication Track Occupied Indication Break test and Mid stroke test – Point (Control and Indication) Break test – Track Break test – Ahead signal.FACTORY AND SITE ACCEPTANCE TEST OF MLK II was set and locked. In case route was set and locked. If the key is forcibly extracted. the signal shall be put back to danger. • • • Route being set & Signal cleared Route being set & Approach locked Train taken the Route Page 99 (S18) ELECTRONIC INTERLOCKING . ANNEXURE -VI • • Point is under operation Other few special conditions Re-testing Application Logic: If it is necessary to undertake application logic changes as a result of incidents arising from Principles Testing or for other reasons then the details shall be documented on an ATIR. Documentation. Following update of application logic to address a deficiency. All the test results obtained for the particular installation under test shall be part of the supporting documentation package for the Microlok II Application Logic Principles Testing. IRISET Page 100 . the designer shall produce a “difference list” that highlights the changes made to the previous version of the application logic. Minor Logic changes need not be updated individually but can be completed as one data change. 10. The supporting documentation package shall be available for review during Microlok II Application Logic Principles Testing as various tests are completed. 2 This systems are Characterised by the following features: (a) Interlocking functions are carried out using the interlocking table principle or geografical principle. SIMIS S system is designed in accordance to European standards approved and in use by several prominent railways.5 seconds for showing a restrictive aspect after a hazardous event occurs.SIMIS S EI SYSTEM Annexure – VII SIMIS S EI SYSTEM 1 Introduction: SIMIS S is the newest generation of SIEMENS electronic interlocking systems represents the newest cost effective invention of the spread proven system. The SIMIS S interlocking architecture is integrated in the SIMIS product family. Fail-safe behaviour if failures occur within the system or the operating modules (b) Reaction time of less than 1. The SIMISS is following the most common standard of coded monoprocessing as 1-out-of-1 principle or TWO 1-out-of-1 processors in standby configuration. The SIMIS S basic system meets the Generic CENELEC SIL4 safety standards. (d) Operation through VDU (Console) or Operation through Control Panel. In general the system has to be fulfil two qualifications: (a) Accurate and normal function. The safety architecture is based on a coded Mono Processor philosophy embedded in the SIMIS interlocking system environment. Page 101 (S18) ELECTRONIC INTERLOCKING . (b) The SIMIS systems are based on the standardised hardware platforms. (c) SIMIS Systems can be customised in a fast and efficient way to meet a wide range of different operating regulation requirements since the complete signalling logic can be executed on an integrated and independently working state-of-the-art computer technology.1 Safety: A controlling and monitoring computer system for railway signalling is defined as fail-safe if no unacceptable failure can occur. 3 Features of SIMIS S System: 3. (iii) Two redundant communication links can be installed for availability. (vi) Profibus with OFC works up to 15KM. 3. (ii) This system provides the ability to communicate via RS 232/422. (ii) PROFIBUS is the multi-functional field bus system and complies with the International Standard EN 50170. Independent generic approved layers are standardised to minimize specific approval efforts and guarantee reliable and proven functional modules. 3.and WAN/LAN Communication links: (i) The SIMIS S provided with a communication processor. because of safety reasons no correction procedure is implemented. (v) Profibus with copper cable works up to 200m distance. (b) Operators panel: The operator’s panel consisting of conventional indicators and pushbuttons can be connected via standard digital Input / Output modules. If a telegram is detected as false this telegram is send again. If the distance of communication between two processors is more than 200m then Profibus repeater is required at every 200m.2 Layered System Architecture: The SIMIS S System is developed in a layered structure. Ethernet and other standard protocols via communication Processor or via existing onboard interfaces or PCs can be operated.5 Communication: PROFIBUS (Process Field Bus) Protocol: (i) PROFIBUS protocol is used as a standard communication interface between different computer systems. Other Serial. PCBs and the corresponding software driver modules. 3. Typically a two-button operation is implemented. several safe Input and Output PCBs are available to interact with approved signalling relay groups. IRISET Page 102 .3 Availability: Maximum availability can be achieved by a 2 (1-out-of-1) processors in standby configuration.4 Modular technology for Inputs and Outputs: (a) Track site components: For connection of track site equipment to the SIMIS S interlocking. (iv) The safe PROFIBUS protocol includes fault detection. TCP/IP.ANNEXURE -VII 3. Page 103 (S18) ELECTRONIC INTERLOCKING . (c) Communications Processor. circuit breakers.COMMUNICATION 4 Standard Configuration (Centralised) of EI Station is Shown below: Centralised configuration of SIMIS S Electronic Interlocking System Fig No : 1 5 System Components: The SIMIS S is made up of various modular components. Modular Controller. CP. (d) Digital Input and Output Modules. SIMIS S series is a failsafe. (b) Central processing units CPUs. The modules are mounted on a mounting rail. The Modular Controller consists of the following components: (a) Power Supply Modules. (e) Additional components such as relays. 1 Power Supply Modules (SITOP): (a) SITOP power supply is well proven power supply in the design of the SIMIS S. (c) A separate power supply module need not be provided if a reliable. (d) This module is not preferred.317F Page 104 . Both CPUs have back-up batteries that provide a backup of the program in the RAM. (b) The power supply is snap-mounted onto the S7 rail and has LEDs for the indication of voltage failures. This EPROM ensures a permanent storage of the program even in the case of a power supply failure. The CPU Units are the basis for control of SIMIS S interlocking system. generally Supply is taken from the IPS module. The power supply is connected to a 230 V. Fig No : 2 IRISET CENTRAL PROCESSING UNIT. 50 Hz single-phase AC. LEDs indicate events such as hardware. The output is protected against short-circuit and open-circuit conditions and adjustable. The CPUs have a plug-in socket for a memory module in which a Flash EPROM is inserted. external 24 V DC power feed is made available. A programming device can be connected to the CPU board. The output voltage is +24V. The CPUs have status and error displays.2 Central processing units CPUs: The 300 and 400 series of processors belong to the same family their architecture remains the same except for the enhanced memory capacity. which independently performs all additional functions of the interlocking. STOP. The CPU contains firmware. programming. battery or bus errors/faults and operating statuses such as RUN.ANNEXURE -VII 5. time. 5. I/O. CPUs Diagnostics via LED Fault scenarios. Hardware faults. which are graded according to their means of access. STOP Comes on when: • Flashes when: • The CPU requests a memory reset. Programming errors Parameter assignment errors Calculation errors Timing errors Faulty memory card Battery fault or no backup at power on I/O fault/error (external I/O only) Communication error. The CPU is not processing a user program Page 105 (S18) ELECTRONIC INTERLOCKING . Description Note: It also comes on when an accumulator is connected. The reason for this is that the user program is not backed up by the accumulator. faulty or not charged. but also for diagnostics. provide support not only for maintenance purposes. These LEDs indicate operating states and any faults that occur and therefore facilitate fault location. LED SF Comes in the event of: • • • • • • • • • BATF Comes when: • The backup battery is missing. there are different LEDs on the circuit boards. For diagnostics and fault location. in HLT mode with 5 Hz PU in STOP or HALT or start-up. LED flashes at memory reset request Mode Selector Positions The positions of the mode selector are explained in the order in which they appear n the CPU. (STEP 7 is the Programming language for developing user programs for SEMIS S system) IRISET Page 106 . LED flashes at start-up with 1 Hz. The CPU scans the user program The user program cannot be changed without password confirmation. The key can be removed in this position to prevent anyone changing the operating mode. Momentary-contact position of the mode selector for CPU memory reset (or a cold start as well in the case of the 318-2).ANNEXURE -VII Displays for the CPU: SF BATF DC5V FRCE RUN STOP (Red) (Red) (Green) (Yellow) (Green) (Yellow) Hardware or software faults Battery fault 5 V DC supply for CPU and S7-300 bus is ok. The key cannot be taken out in this position. Force request is active PU in RUN. Position RUN-P Description RUNPROGRAM mode RUN mode Detailed Description The CPU scans the user program. The key can be removed in this position to prevent anyone changing the operating mode The CPU does not scan user programs. Resetting the memory using the mode selector requires a special sequence of operations RUN mode STOP mode STOP mode MRES mode Memory reset Diagnostics by Programmer: Programming can be carried out by an appropriately trained personnel with basic knowledge of STEP 7 programming. You can upload program from the CPU to the programming. You can upload program from the CPU to the programming. Master Reset) CPU) STOP Momentary – contact position of the toggle switch for the CPU Memory RESET. Position RUN Explanation If there is no start-up problem or error and the CPU was able to go into RUN. The digital signal modules are locked.CPUs Central Processing Unit 416F: Fig No : 3 Fig No : 4 CENTRAL PROCESSING UNIT. (CPU PC) You can upload program from PC to the CPU (PC CPU) The CPU does not execute the user program. Page 107 (S18) ELECTRONIC INTERLOCKING . (CPU PG) You can upload program from PG the CPU (PG MRES (CPU Memory Reset .416F Mode Selector switch Positions: The positions of the mode selector are explained in the order in which they appear in the CPU. the CPU either executes the user program or remains idle. CP 343-1 is used for TCP/IP Ethernet communication. CP 343.5): Fig No : 5 CP 341. They allow the SIMIS S to be attached to Profibus / Ethernet. . The following mechanical features characterize the communications processors: (a) Rugged plastics housing.CP 342-5 for PROFIBUS communication. This may be provided in future to provide the functionality of CTC.CP 341 used for serial / for Modbus Communication with the data logger. CP 342.ANNEXURE -VII 5. CP 343-1 and CP 342-5 The communication processors provide an economical and complete solution for serial communications via point-to-point links. . (b) LEDs for status information. (c) Communications interface. Three different types of communication processors are used: . IRISET Page 108 .3 Communications Processors (CP 341. This CP will be used only when Ethernet protocol connectivity comes into the picture. Currently this is not used in the system. (i) (j) Repeater Module.4 Digital Input and Output Modules (I/O): The following section describes the various I/O modules used in the SIMIS S system. The green LEDs indicate the signal states. Signal cables can be connected with front connectors and can be labelled in a lettering field next to the LEDs. The system allows modular configuration of all standard boards available. (e) Digital Input / Output Module 323 (f) Digital Input Module – Standard (Non-Vital) (g) Digital Output Module – Standard (Non-Vital) (h) Optical Link Module (OLM). (d) Digital output Module 322 (Non-Vital).DIGITAL INPUT/OUTPUT MODULE 5. (a) Digital Input Module (Vital) : Fig No : 6 Digital Input Module (Vital) The digital input board (Vital) converts the external binary signals from the process into the internal signal levels of the SIMIS S. (c) Digital Input Module 326 (Vital). Page 109 (S18) ELECTRONIC INTERLOCKING . (b) Digital output Module (Vital). (a) Digital Input Module (Vital). Interface Module IM 151 (k) Electronic Terminal (ET) Station Module. The outputs are grouped as 2 outputs on the left side and two on the right side. (xii) HW Coding. The general practice is to sense the front contact through Vs1and back contact through Vs2. of SIL4 inputs. The address switch is a ten-position dipswitch that has to be set in the required position. (ii) Rated input voltage 24 V DC. (b) Digital output Module (Vital) : Four relays can be driven by one module. The module also has "SF" (System Fault) to indicate group fault. The address switch is a ten-position dipswitch that has to be set in the required position. so that the processor is able to identify the correct Output card. (ix)Length of unshielded cable connection 200 m.4 V to 28. Input delay 3 Milli seconds. Galvanic separation is provided through optical isolation of signals between "Processor logic" and "Back Plane Bus Interface". The technical specs are as below: (i) Suitable for 8 digital inputs equivalent to 4 nos. (xi) Sensing range: “1” = 15V to 30 V & “0” = –30V to + 5V. (xiii) SW (dipswitch) coding. (vii) Hot swapping of module. IRISET Page 110 . so that the processor is able to identify the correct Input card. (iv)Group fault display SF (System Fault). (iii) Two sensors for each of the four inputs 1 Vsf & 2 Vsf (Vsf : Voltage supply fault). (vi)Internal optic isolation in data link. A high output is indicated through a green LED Display on the module. Hence 8 digital input contacts can sense 4 numbers of inputs in a failsafe manner. The processor logic contained in the Input card multiplexes the input information and sends it to the main processor through "Back Plane Bus". Range 20. (v) Status display for each input. (x) Normal voltage 24 VDC.8 V. Galvanic separation is provided through optical isolation of signals between "Processor logic" and "Back Plane Bus Interface".ANNEXURE -VII As per SIL4 safety requirement every input reading has to be done by sensing two contacts. generally one front and one back of the same relay input that has to be sensed. The module also has "SF" (System Fault) to indicate group fault. A high input is indicated through a green LED Display on the module. (viii) Low power consumption of 4 W. (vi) Status display for each driven output. (ii) Rated drive voltage 24 VDC. (ix) Output indication.8 V (iii) Load resistance range 12 Ohms to 1K Ohms. Digital Output Module (vital) Digital output modules are characterized by the following features: (i) Suitable for driving 4 failsafe out puts. (viii) Hot swapping feature. Range 20. Page 111 (S18) ELECTRONIC INTERLOCKING . (x) HW coding.5 W typical. (vii) Optic isolation with Profibus. (xi) SW (dipswitch) coding. (iv) Power dissipation 3.DIGITAL INPUT/OUTPUT MODULE The digital output Module converts the internal signal levels of the programmable logic controller into the external binary signal levels needed for the process.4 V to 28. (v) Suitable for driving relays or indications. Fig No : 7 Fig No : 8 Digital Input Module 326 (Vital ). (iii) 24 VDC rated load voltage. (iv) Suitable for Solenoids . Suitable for switches. 4 short circuit-proof sensor (isolated in groups of 2) supplies for 6 channels. Diagnostic alarm with assignable parameters. 24V DC rated input voltage. SM326:DI 24 X DC24V has the following features: (i) (ii) (iii) (iv) (v) (vi) (vii) (viii) (ix) (x) (xi) (xii) (xiii) 24 inputs. isolated groups of 12. isolated in groups of 4. Usable in standard and safety modes. (Green LED) Reconfiguration in Run (CIR) – possible in standard mode. (ii) 2A output current.e SM 322: DO 8 x 24 VDC /2A has the following salient features: (i) 8 Outputs. Group error display (SF) Safety mode display (SAFE) Status indicator for each channel. DC Contactors and indicator lights. Assignable diagnostics. (d) Digital output Module 322(Non-Vital) : Fig No : 9 Fig No : 10 Digital output Module 322(Non-Vital) Digital Input / Output Module 323 Digital Output module 322(Non-Vital) i. Configure 1-out of –1 and 1-out of –2 for each channel Simplified PROFI safe address assignment. IRISET Page 112 .ANNEXURE -VII (c) Digital Input Module 326 (Vital) : Digital Input Module 326 (Vital ). 8 nos. (vi)User friendly wiring. (iv)Labeling area on the front cover. hot-swapping is possible. of Digital Inputs and 8 nos. When they are used in the ET 200M in combination with active bus modules.DIGITAL INPUT/OUTPUT MODULE (e) Digital Input / Output Module 323 : The following mechanical features characterize digital input/output modules: (i) Compact configuration. The output addresses are defined by the slots. The internal signal level of the PLC into the external signal levels required for the process. The green LEDs indicate the signal Page 113 (S18) ELECTRONIC INTERLOCKING . (f) Digital Input Module – Standard (Non-Vital) : Fig No : 11 Fig No : 12 Digital Input Module Standard (Non-Vital) Digital Output Module Standard (Non-Vital) The digital input board (Non-Vital) converts the external binary signals from the process into the internal signal levels of the SIMATIC S controller. Digital input/output modules convert: The levels of the external digital signals from the process into the internal signal level of the PLC. (iii) Front connector protected by the front cover. There are no slot rules. (v) Easy installation.5A. (ii) Green LEDs to indicate signal states at the inputs and outputs. of Digital Outputs at 24 VDC / 0. Suitable for sensing 4 standard inputs (push buttons).Input signal “1” = 15V to 30V and “0” = –30V to 5V .ANNEXURE -VII states.600 m Shows green indication of “high” output channel Module failure manifests when LED indication fails to appear. The following features characterize digital output modules: (i) (ii) Suitable for driving four standard out puts (LEDs) Optic isolation of outputs (iii) Status display of high output (iv) Power dissipation 0.Unshielded cable length at input . (vi) Rated drive voltage 24 VDC IRISET Page 114 . Signal cables can be connected with front connectors and can be labelled in a lettering field next to the LEDs. . . (iii) Check if the Interlocking is accepting the command by observing the “button operation indication” on the panel The technical specs are as below: .7 W typical. (g) Digital Output Module – Standard (Non-Vital) : The digital output Module converts the internal signal levels of the programmable logic controller into the external binary signal levels needed for the process.Status display of high input.Power dissipation 0. .Optic isolation of inputs. (i) Shows green indication of “high” input channel Module failure manifests when operation of button on panel is not effective.1000 m .8 W typical (v) (vii) (viii) Unshielded cable length at output .Rated drive voltage 24 VDC. .Input current for ‘1’ signal 7mA @ 24VDC . Page 115 (S18) ELECTRONIC INTERLOCKING . (ii) They enable electrical PROFIBUS interfaces (RS 485 level) to be converted into optical PROFIBUS interfaces and vice-versa. (vi)The device is powered by 24V DC voltage. (viii) Four multicolored light-emitting diodes indicate the current operating status and possible operating malfunctions.OPTICAL LINK MODULE Optical Link Module (OLM) : Fig No : 13 PROFIBUS OLM Fig No : 14: Repeater Module (i) PROFIBUS OLMs are designed to be used in optical PROFIBUS field bus networks. An RS 485 bus segment in line with the PROFIBUS standard EN 50170 is connected to this port. star or ring topology and an arbitrary combination of these. (iii) A complete PROFIBUS field bus network with modules in line. are built up. (vii) The electric port is a 9-pole Sub-D socket (female). (v) Each module has two or three mutually independent ports. (iv)The redundant ring is also supported. star and redundant ring topology. which in turn consist of a transmitting and a receiving component. thereby increasing the fail-safety of the field bus network. optical PROFIBUS networks can be assembled in line. A redundant feed increases operational safety. (ix)With the PROFIBUS OLM (Optical Link Modules) Version 3. ANNEXURE -VII (x) The transmission rate of an OFC line depends on the distance and may be up to 12 Mbps. (xi) Function: Automatic recognition of all PROFIBUS transmission rates: 9.6 Kbps to 12 Mbps. High availability through media redundancy. The distance between two OLMs in the redundant ring is limited only by the optical sensing range of the modules. (xii) There are 3 types Optic Link Modules that are used for the following applications. OLM P12 (type 6GK1502-3CAXX) is used when the fiber optic cable is of plastic type for distances up to 80 meters and 400 meters with Plastic Coated Fibre. OLM P12 (type 6GK1502-3CBXX) is used for connectivity for distances of 3 km with Quartz Glass Optic Fibre. OLM G12-1300 (type 6GK1502-3CCXX) is used for connectivity for distances of 15 km with Quartz Glass Optic Fibre. - (h) Repeater Module : Function: Automatic data transmission rate search Data transmission rate of 45.45 Kbit/s possible 24 V DC voltage display Display bus activity segment 1 and 2 Isolation of segment 1 and 2 possible by switch Isolation of the right segment part when terminating resistor is inserted Decoupling of segment 1 and segment 2 in the event of static interference. Mode of operation Increasing the number of stations (max. 127) and the coverage Regenerating the signals in amplitude and time Electrical isolation of the connected bus systems Data transmission rate in KBPS 9.6 19.2 45.45 93.75 187.5 500 Max. segment length in m 1000 1000 1000 1000 1000 400 IRISET Page 116 INTERFACE MODULE Data transmission rate in KBPS 1500 3000 6000 12000 Max. segment length in m 200 100 100 100 Designed for Industry: To increase the number of stations and the expansion Galvanic isolation of segments Start-up assistance o o o Switch for disconnecting segments Display of bus activity Isolation of segment with wrongly inserted terminating resistor (i) Interface Module IM 151 : ( For Electronic Terminal Station) (i) Provides Interface between the profibus and Input / Output modules in an ET200 station. (ii) (iii) (iv) (v) (vi) Provides internal “electronic” supply to the back plane bus for IO modules. Inbuilt Electrical Isolation. Type of interface: RS 485. Rated supply voltage: 24 VDC. Polarity reversal protection provided. (vii) Power dissipation : 3.3W typically. Page 117 (S18) ELECTRONIC INTERLOCKING ANNEXURE -VII Fig No : 15 Indications: Interface Module IM 151 - SF-group error - Blank when there is no error & Steady R when is a group error. Causes: o Short circuit, over load, wire break, internal error. o Missing external auxiliary supply in respective ET Station. - BF-group error - Blank when there is no error. Steady R when is a group error. Causes: o Profibus connection is open. o ON indication is blank likely causes are o Wire break. Check relative circuit. o External aux. power supply missing. Check the power supply. o Internal error. Replace the module o Short circuit in sensor. Corrective action – eliminate short circuit. IRISET Page 118 points etc. Power Module o Provides the current to the drive relays through the output modules and sensing voltage to the input modules to check the status of the relays. The ET stations consists of: . Data Logger o Used to log all the events during the operation of the system and can be used to trace the faults in case of a failure after viewing of the detailed reports generated by the logger. Interface Module o Acts as an interface between the CPU and the I/O modules. for Vital Output cards and to light the indications on the indication panel for a Non vital Output Module Page 119 (S18) ELECTRONIC INTERLOCKING . Digital Input and Output Modules o Used to sense the user inputs given through the operating panel in case of Standard Input module and contact status of the relays in case of Vital Input Module o To drive the relays feeding the outside gears like signals.Profibus connectors o Connection of the profibus cable to the Interface Modules and the CPU.INTERFACE MODULE (k) ET (Electronic Terminal) Station Module : Fig No : 16 Electronic Terminal Station Module is used for Distributed Interlocking System. the same shall be operated to check its integrity. (a) Dust protection of the system. (c) Check whether the all the lamps and relays are operational. (e) Check the Earthing Values of Electronic earth and Power Earth at the earth pit. However it is suggested that the following be checked periodically. (d) Check that the earth connection on the Electronic Interlocking i. In case of dust accumulation the modules should be cleaned with a vacuum device and not a blower. (Should be less than 2 ohms) (f) In case the system has any sparingly used field objects. To maintain the relay and Electronic Interlocking system free from dust.ANNEXURE -VII 6 Ring configuration of distributed EI station is shown below: Fig No : 17 7 Periodic Maintenance: The Electronic Interlocking system by its nature is maintenance free.g. (b) Checking of supply voltages for all elements e. IRISET Page 120 . Check its continuity using a multi meter.: IPS.e Electronic Earth and Power Earth is firm and proper. points. signals for any variation. 8. (d) Do not reset the memory off CPU (Central Processing Unit).1 Maintenance Instructions: Do’s: (a) All wiring connection should be neat and tightened. (h) When exchanging F-module. (f) In case of dust accumulation the module should be cleaned with a vacuum device not a blower. Page 121 (S18) ELECTRONIC INTERLOCKING .MAINTENANCE INSTRUCTIONS 8 8. (b) All modules should be properly inserted and screwed. (b) Do not switch off the CPU (Central Processing Unit ) power supply. (c) Electronic earth and Power earth should be firm and proper. (g) In case of module replacement load voltage must be switched off.2 Don’ts: (a) Do not changes to the code are being made on the terminal Module. (c) Do not switch of the control panel supply. (e) Do not remove the module when power supply is in on condition. it has to be ensured that the address Switch (DIP switch) setting of modules match. (d) All earthing points of electrically should be connected to module (Electronic Earth) (e) Mains voltage should be less than 28 volts. Yard remodeling is very easy as field modules can be added or removed as per needs and similarly software can be reprogrammed by the use of graphic user interface and menu driven software interlocking. In such a case all vital outputs (signals) will be driven to ‘safe state’. The ESA11 product has been designed developed and patented (patent no: 282967) by M/S AZD praha of Czech Republic. ESA11-IR.ANNEXURE -VIII Annexure – VIII ESA11. called Executive Computers.which initiate power ‘cut off’ to vital computers. as the VDU can display more relevant. Any failure of working ‘pair’ CPU’s will result in smooth change over to hot standby ‘pair’ of CPU’s without disturbing train traffic i. dynamic and additional information. fully meeting the CENELEC standards for highest Safety integrity level SIL-4 and is currently operational in the High speed Euro corridor (ESA11). In such case all vital outputs (signals) will be driven to ‘safe state’. Designed with two independent software’s. Control from an VDU panel is more advantageous to the user. the routes which were already ‘set’ and functioning are preserved.Rly 1 Introduction: The Electronic Interlocking System model ESA11-IR is a well designed. on the Czech Railway having train speeds of 160 KMPH. 2 • • • Salient Features of ESA11-IR are: Designed as 2 out of 2 architecture. Application software can be easily developed by the use graphic based menu driven software tool. ESA11-IR can be controlled by a VDU panel or conventional DOMINO type operation cum indication panel. This system has been validated by an independent third party as conforming to CENELEC specs and meeting SIL4 norm requirements. documented proven and tested product. Health of the computers are monitored by intrinsically fail safe hardware comparator modules. Simulation of complete interlocking of a yard is possible before installing the software in the field.C. • • • • • • • • • • IRISET Page 122 . Uses 2 out of 2 architecture. Power ‘cut off’ feature for field modules. than control from the domino panel. with 100% hot standby at vital processor level. In association with M/s Hytronics Enterprises. with passenger carrying trains.IR Electronic Interlocking System Manufactured by AZD Praha BZA-BPQ section in S. In other words elimination of ‘common mode’ failures.e. Use of BRS relays for field interface between Electronic Interlocking equipment & out door signaling Gears. in case of non-agreement with 2 out of 2 result. for field I/O modules. In other words elimination of ‘common mode’ failures. The hardware is ‘modular’ in design and can be easily expanded as and when ‘needs arise’ to change the yard layouts.e. Uses two independent software’s in the field modules. the ESA11 electronic interlocking system has been developed to suit Indian Railway signalling rules i. in case of nonagreement with 2 out of 2 result. Provision for ATP/ATC interface.IR ELECTRONIC INTERLOCKING SYSTEM • • • • • • • • • • • • • • 3 Operator personal identification with special chip cards or smart (PIK)cards Provision of maintainer (panel) terminal. the interfacing being achieved through standard BRS ‘Q’ style relays. Provision for “auto” generation of Running Map i. ESA11-IR fully complies with all environmental clauses specified vide IRS /RDSO specifications. This feature gives capability of mini CTC Control of adjoining stations. ESA11-IR works safely under 25 KV AC traction or any other traction conditions such as 3000 VDC or 600 VDC traction’s etc. An ESA11-IR systems consists of the following sub-systems: a) Commanding Level (traditional operation panel) b) Control level (Previous technology Relays-now CPU’s) c) Executive level (previous technology Relays-now Input/output Modules) d) Relay Interface Level (Interface between Electronics Interlocking & outdoor Signalling gears) e) Remote Control Level (CTC) f) Level of wayside elements (Outdoor Signalling Gears) g) Power Supply Level h) Inner Diagnostics (Event Logger) i) GTN (Running Map generation for ‘train Controller’ applications) Page 123 (S18) ELECTRONIC INTERLOCKING .ESA11. One ESA11-IR has provision to control one single yard having upto 1600 vital outputs. Design approach: ESA11-IR easily interfaces with the existing outdoor Signalling gears on the Indian Railways. Provision for more than ONE PLACE Control. Extensive EVENT “data logging” facility including capability of “event happened” simulation facility. train charting. Facilities for downloading data into floppies or to any other storage medium. Facility for “numbering” the trains & monitoring the movement of trains by their numbers on the VDU panel. In fact control can be made from more than twelve places. ESA11-IR uses standard Indian voltages. Provision for CTC interface. & 3200 vital inputs.e. Facilities for remote data logging. ANNEXURE -VIII DOMINO PANEL PANEL PROCESSOR Z-LAN (Ethernet) ZPC-1 ZPC -2 T-LAN (Ethernet) Z-LAN (Ethernet) ACTIVE . IRISET Page 124 . Executive Computers (Object Controllers with Relay interface) TPC….TPC 2 STANDBY – TPC 3 STANDBY TPC 4 PRV-1 PRV -2 n PRV - Interface Relays Way Side Signalling Equipments Fig: TYPICAL BLOCK DIAGRAM OF ESA11-IR PRV….SM terminal (VDU panel) COMMANDING LEVEL: (Operator cum Indication panel) Conventionally Indian Railways uses a Domino type Operation cum Indication panel. ESA11-IR equipment has got provision to interface with VDU based Control cum Indication Panel or/ and conventional Domino type operating cum indication panel... Vital computer pairs ZPC….. for controlling the train movements in the station yard.TPC 1 ACTIVE . which is located in the SM (station master) room.. For Example: Train Routes on VDU are shown in green Colour & the SHUNT Routes are shown in ‘white’ colour. the track indication return back to ‘Grey’ colour.ESA11. the advantages of controlling the train movements in the stations yard through VDU based operating cum indication panel far outweigh that of controlling the train movements in the station yard through Domino type operating cum indication panel. Less power consumption More aesthetic & elegant Additional facilities on VDU panel (for ESA11-IR systems): Provision of Additional information on the VDU panel is possible for better convenience to the operator/station master. Some of the advantages available are (when VDU based operating cum indication panel is used for the ESA11-IR system): Alterations: No need for physical alteration and re-wiring to the Operating cum Indication panel when Yard layouts are modified or changed due to operational requirements. And when the route is selected the track indications show ‘white’ (yellow in case of LED’s). the track indications turn to ‘green’ colour & when the train has entered the section the track indications go to ‘red’ colour & when the route release takes place after completion of the train movement. Occupation of Space: VDU panel occupies less space. before any route is selected the track indications are blank on the panel. All needed alterations are done off line and the modified yard layout SW is loaded in less than 5 minutes. Yard display colours: In a traditional Domino Panel. keys or electro-mechanical ‘counters’ for logging certain station master operations. which is not possible on the DOMINO type panel. It is easy to carry out alterations in a working panel. SM Key: In conventional Domino panel only one SM’s key is provided but in VDU panel each operator or SM can have his own ‘smart card’ & separate ‘data log’ will be maintained about each operators actions. And when the route release takes place. Much more & intelligent information can be made available to the operator on theVDU panel. as such information is logged automatically in the built-in data logger. Electro-mechanical Counters/buttons/keys etc: No need for provision of any buttons. Page 125 (S18) ELECTRONIC INTERLOCKING . the station master has the advantage of seeing the unoccupied & unselected tracks in ‘Grey’ colour & as soon as the Route is selected. a simple button stuck situation brings the complete panel operations to a standstill). Calling ON routes are shown in Yellow colour. Train Numbering: Train numbers can be assigned to the incoming or outgoing trains & the operator can follow the movement of the trains by train numbers which move along with the movement of the train indication on the Panel. And when the train is in the section or track is occupied the track indications turn to ‘red’ colour. All alterations are done in software. Advantages of a VDU panel (when compared to Domino Panel) The VDU panel is more reliable as there is no necessity to change the fused bulbs etc. In VDU based panel operation.IR ELECTRONIC INTERLOCKING SYSTEM But keeping in view of the modern technology. (In a Domino Panel. after the train movement is completed the track indications become blank once more. e. Clamping of points: A ‘software lock’ can be established on any point machine. Whenever the on duty SM tries to set a route. and the second VDU is used for displaying Text based information. Bigger Yards may require more than One VDU for displaying the complete Yard.except that it conforms to IRS/S/36 specification. Domino type Operation cum Indication Panel: Information about Domino type operation cum indication panel is not being presented here as railways are very familiar with this type of equipment. which the on duty SM has to acknowledge. are indicated (enveloped) in dark blue colour. the tracks which do not have the traction AT supply. the SM (each) can set his own macro. Pre-setting of routes: There is provision to pre-set train routes and as soon as the previous train route is completed the computer fetches the preset route and establishes the route and so on till all the preset routes are exhausted. the ‘traffic closure’ label/s will appear. Macro Setting: For large yards where complex route setting is possible (from A to D via B & C routes). VDU Based Operation cum Indication Panel: The ESA11-IR electronic Interlocking equipment is controlled through two or more VDU’s. drawing the attention of SM immediately. Whenever TSL (Temporary Single Line) mode of working is adopted. and then the system will display a ‘risk page’ which the on duty SM must acknowledge by a digital signature. Auto signal working: At the click of a mouse each signal can be converted into an ‘auto signal’ i. which greatly reduces the time required to dispatch a train under TSL working mode. for enabling the route setting operation to continue. instead of the normal 4 clicks.ANNEXURE -VIII Warning labels: Warning label/s can be established on any track circuit. IRISET Page 126 . Traffic Closure labels: Similarly ‘traffic closure’ label/s can be set on any track circuit (for example ‘rail crack’). which the on duty SM has to acknowledge. the SM can establish a ‘software lock’ on the points required to dispatch a train. which prohibits the operation of that point. the warning label/s will appear. Whenever the on duty SM tries to set a route. to quickly establish the route by two clicks. for enabling the route setting operation to continue. One VDU is used for displaying the yard layout. the whole yard can be converted into an ‘auto territory’. Absence of AT supply indication: Whenever AT traction AT supply fails. then only second VDU is added A maximum of 3 colour VDUs along with 1 monochrome VDU is possible for one station yard or alternatively you can use 4 colour VDU’s without any monochrome VDU. Page 127 (S18) ELECTRONIC INTERLOCKING . In case the yard is bigger & also if geographical control of a yard is proposed.ESA11. Normally for a way side station ONE VDU is sufficient to display the complete yard (upto a station with 6 to 8 lines). Provision is also made to scroll the yard from left to right.IR ELECTRONIC INTERLOCKING SYSTEM Note: Above is a example of a typical Control panel with 2 VDU’s for geographic display cum control purposes. A typical yard display in graphic form for Display & control through GUI based graphic symbols Typical PRV. The VDU panel allows the traditional control of the movement of trains in the station yard and realises the interlocking functions.Executive Computers The VDU based control panel is controlled by a computer terminal called ‘ZPC’. Normally one Colour VDU is used for Graphic Display & one Monochrome VDU is used for Text Based information Display. it will be displayed on the text portion of VDU on the “page of risks”. (a) Mouse (b) Key Board In ESA11-IR the Operator can either use a MOUSE or a Key Board to carry out the Train movement operations of a station. ‘audible’ indication is also given ◊ If ‘safety’ information is relevant. This Level consists of a Special Rack.e click the ‘entry’ signal button & the ‘exit’ track button on the VDU panel. The typical equipment of such a special rack is shown below: IRISET Page 128 . As soon as ‘command’ is registered on the VDU panel. the communication terminals etc. In VDU panel the operator has two choices. All VDU based operations except ‘emergency’ operations are possible only after the ‘operator’ inserts his ‘smart card’ (equivalent to SM’s KEY) into the ZPC. However. the panel responds by: ◊ Change of colour of the particular function ◊ In predefined functions. ◊ In all cases the command is automatically “logged” CONTROL LEVEL: (Interlocking Level) In the Relay Logic. the maintainer terminal.ANNEXURE -VIII The VDU panel can be configured as: (a) to have full 100% functional capability of the complete station yard (b) with geographic limitations of functions i. All operations of an ‘operator’ are automatically ‘logged’.e both geographic and functions Standby VDU: Provision exists (optional) to have a standby colour VDU (monitor) in case the main VDU fails due to any reason Operation from a VDU Panel: In Domino type operating cum indication panel push buttons are used for setting a route or any other authorised movement. which houses the vital Computers. the safety is achieved through software and reliability is achieved by using 2 out of 2 architecture with 100% hot standby. The process of route setting is exactly similar to domino based panel operation i. Shifting of Signals to ‘stop’ aspect.e you can control part of the yard (c) with very many limited functions (d) with combined limitation i. The following ‘emergency’ operations on the VDU panel can be carried out at all times without the insertion of the ‘chip card’ or ‘smart card’. the safety of the Interlocking is achieved by the use of Relay Circuits. Here in Electronic Interlocking. PCU 6. Vital computer-TPC1 2. This reaction in turn will switch off the power supply to the second vital computer.: The typical control Level TPC Cabinet Rack.e each computer or each channel works in total independence from the other & has a special comparator module which monitors the health of its own vital computer and during cross comparisons between TPC1 & TPC2 computers. Associated Fuses.ESA11. All these are housed in a special 19” cabinet rack (TPC Cabinet). the comparator module will generate a Fail Safe Reaction by ‘cutting off’ the power supply to its own vital computer. Page 129 (S18) ELECTRONIC INTERLOCKING .IR ELECTRONIC INTERLOCKING SYSTEM Front View Rear View Fig. Vital computer-TPC3 4. Vital computer-TPC2 3. if any discrepancies are found. Maintainer Computer. Communication HUBS 8. Power supply indicators etc. TPC2 are normally working computers functioning as 2 out of 2 Architecture i. Vital computer-TPC4 5. The vital Computers TPC1. The ESA11-IR Control level or Electronic Interlocking level consists of technologic cabinet/rack in which are housed the following equipment: 1. Maintainer Monitor 7. e. In ESA11-IR.Associated Module for Vital Input ◊ BN Module…………………………Power Supply Module ◊ SO Module…………………………Resetting Module *** IRISET Page 130 .CPU Modules ◊ DOUT Module……………………. The ESA11-IR has provision to connect 40 such Executive computers to one Interlocking Level i. at each installation the capacity of inputs outputs are: 1.Vital Output Module ◊ PDOUT Module…………………. Each Computer i.. which is an essential feature of CENELEC standard. Vital Outputs : 40 2. EXECUTIVE COMPUTERS: (INPUT/OUTPUT MODULES): Executive level (PRV) serves as the interface between the Control (interlock) level on one side and the outdoor signalling gears on the other side. After completion of an interlocking process step at the Control (interlock) level. Vital Inputs : 80 3. i. having its own intelligent diagnostic features. Each ‘General Software’ is designed. Non Vital Outputs : 1280 The Executive Level consists of the following modules: ◊ DCPU 1 & DCPU 2 Modules…….e.e.e TPC1 & TPC2 is having its own separate ‘General Software’ which is totally different from each other. TPC3 & TPC4 take up the role of Hot Standby computers & vice versa.ANNEXURE -VIII When TPC1 & TPC2 are in state of ‘active mode’. Vital Outputs : 1600 2.Vital outputs : 32 Please note that ESA11-IR treats all inputs as VITAL inputs. (PRVa is called Channel ‘a’ & PRVb is called Channel ‘b’ and both put together are called Executive Level PRV).Associated module for Vital Output ◊ BVR Module………………………Vital Output Interface Module ◊ DINP Module………………………Vital Input Module ◊ PDINP Module……………………. This assures that there will be no ‘Common Mode’ failures. after the dual processing of the data in each TPC & then after comparison between the TPC1 & TPC2 outputs. TPC1 to PRVa & TPC2 to PRVb. & developed by different software teams.e. dual CPU’s like at Control (interlock) Level. Vital Inputs: : 3200 3. The Capacity of each Executive Computer is: 1. two independent channels are provided to receive the ‘data’ from their respective vital computers & then pass it on to the field equipment after a successful cross comparison activity. the Executive Computers too use. i. Non. the resultant decision is then passed on to the respective executive computers PPa & PPb i. through serial links RS 485 or PENET. Electronic Interlocking of M/S. It consist of two sets of VHLC (A/B) in normal and standby configurations. ACP & SSM at slots 1. Standard modules: VLP. 13 stations were commissioned during 2007-2009. One PC with LCD VDU for maintenance. One VHLC chassis provides card slots for up to 12 plug in modules. Vital neutral line relays for interfacing VHLC I/O to field gears. VGPI & NVIO at slots 4 to 12. GE INTRODUCTION • • • • • In PUNE-KOLHAPUR section of PUNE division of CR. which performs interlocking control functions and additional VHLC (A2/B2) provides for additional inputs & outputs. which provides redundancy for both processors and I/O modules. 2 & 3 and power supply on the rear of chassis. VHLC (Vital Harmon Logic Controllers) • • • • It contains main VHLC (A1/B1).VHLC-E I OF M/S G E Annexure – IX VHLC . One domino type operating cum indication panel for operation. Application modules: VGPIO. 1 2 3 4 5 6 7 8 9 10 11 12 VHLC & TERMINATION RACK Page 131 (S18) ELECTRONIC INTERLOCKING . four buttons. It has CPU & Bus master for VHLC. On board reset switch resets all ACP circuits. Contains 16 characters. based on 2 out of 2 check redundant system. Controls all other modules in chassis through mother board. On board reset switch resets all VLP circuits. 9-pin RS232 connector for diagnostic purpose. Also contains non-vital Executive EPROMs IC 30-33. IRISET Page 132 . CDU for status checking. It performs all the vital logic equations and generates message packets for exchange with other units.ANNEXURE -IX VHLC (Block diagram) VLP module (Vital Logic Processor) & ACP module • • • • • • Dual microprocessor design with dual co-processor. Handles serial data communication up to five external devices. VLP module ACP module ACP module (Auxiliary Communication Processor) • • • • • • • Contains non-vital EPROM U9. Front side. U10 and processes non-vital logic equations. LEDs & Check points for health of the card. Maintains log of events with in system for diagnostic purposes. 5 to 5. Both gate must be energized for powered output. it provides up to 40W of regulated +5 VDC output (adjustable form 4. • Signature generator provides for rejecting the AC voltages that may be included into the wires connecting to de-energized vital input. • Green LED shows module health. • It buffers signals from VLP & provides address decoding & module enable circuits. • Inputs are polarity sensitive & accepts voltages up to 32VDC. Equation and configuration information is generated by ACE. Application logic program must match this ID. ‘E’ port is for CLA.5 VDC) from 10-16 VDC input and ‘2’ is I/O cables. Chassis ID is located behind the CPU which is 16 characters in length. • VGPI accepts 16 vital inputs for sensing voltages.VHLC-E I OF M/S G E SSM module (Site Specific Module) SSM module • • • • VGPIO modules VGPI modules Contains EPROMs (IC 14. ‘1’ is power supply module. • Red LEDs show input & output state. ‘B’ & ‘D’ ports are RS 232 which are used for communication between two VHLC units. 15. 17) of vital logic equations. It presents unique pattern identification for each input. Hysterisis is included in input interface so that input voltage must rise above 8VDC for energized input & fall below 6VDC for de-energized input. • All VGPIO/VGPI module cables are uniquely keyed to prevent incorrect module installation. VGPIO & VGPI modules • VGPIO accepts 8 vital inputs for sensing voltages & provides 8 vital outputs for driving relays. ‘A’ & ‘C’ ports are RS 485 which are used for communication between VHLC & PC. An output logic signal drops & initiates a VLP reset & holds it in reset when the output voltage drops 250 mV below the set point. It is half in size compared to any other card. Contains setup data for a particular site. Rear of the CHASSIS • • • • • • • • It contains +5 VDC power supply and up to 5 serial I/O module from A to E. • Each output has two feedback circuits one for chopper AND gate and one for the power gate. Page 133 (S18) ELECTRONIC INTERLOCKING . Right-click an unsigned slot in the tree & select the type of module you want to add from the menu that appears. ACE (Application Compiler Editor) • It is a window based computer program that allows an application engineer to input wayside site configuration and application logic. Transmits & receive data for 128 outputs & 128 inputs. CLA CLCP (Custom Local Control Panel) CLCP • Handles max 128 Outputs for indication & max 128 inputs for button controls. Page 134 IRISET . • It has only four wire connection to CLA module. Data entry 3. Communicates serially with CLCP. It does not supply current to transmit or receive. it only switches the current supplied by the CLCP. Compiling 4. Reports Adding a Module to VHLC • • Select the MODULE tab. Editing 2. • This software has four key features: 1.ANNEXURE -IX CLA (Current Loop Adaptor) • • • • Interface between VHLC & CLCP. if not empty press ERASE. 20 DR. a message box will be displayed for attention.g. • Now click VIEW LOG to view the log file. ACE will also notify for the same. • From the edit menu. d. Timers are not defined with zero duration. select NEW for entering the equation name e. VGPI. joint the wire as required . ACE will create a new equation & display it in editing window. If the equation of same name already exists. • After adding the contact. • To select the device. NVGPI. Any required status has been entered. select the contact with mouse and type new status name. After adding the module. b. an existing contact or source must be selected. ACP & SSM and rest 4-12 for VGPIO. select COMPILE from file menu. 115 NWKR etc.VHLC-E I OF M/S G E • • First 3 slots are reserved for VLP. Select ADD WIRE or press Ctrl+W. • Once the valid equation name is entered. • From the equation menu. Page 135 (S18) ELECTRONIC INTERLOCKING . Adding a wire • • • • Click the location where the start of wire to be connected. • Finally check the CHECK SUM of the program written on the EPROM and verify it with the original file check sum. it contains the validation CRC to be used in the validation. Equations O/Ps are being used. Undefined status are not used as equation I/O. c. Select ADD BACK WIRE or Ctrl+B. EPROM Programming • After compiling. Adding an equation • Select the EQUATION tab. Module O/Ps has equations. 2GNR. • Click BLANK to check the EPROM is empty. • Load the file from file menu. select ADD CONTACT then TO RIGHT BACK CONTACT or press Ctrl+K or Ctrl+Shift+R. if 4-12 then its input/ output status settings are displayed to the right of the slot tree. Compilation • After saving the diagram. e. click EPROM under device menu. • The application needs to pass the consistency check before the application can be compiled. select ADD CONTACT then TO RIGHT FRONT CONTACT or press Ctrl+R. • If that name is not defined on a module output. • From the edit menu. Adding a contact • To add a new contact to a wire. the application EPROM files are created and updated. • The consistency checks will run to ensure:a. To complete the add wire operation. Check whether each rack body (Microlok II and relay racks) in the signal equipment room is individually connected to REB. Check whether 3/16” Cadmium cable is used between REB and the first earth pit and it is connected by exothermic welding at both the ends. Check whether card file body is connected to rack earth. straight and permissible height. Check whether one end of every serial cable shield is connected to rack earth. Connect the REB to the 1st earth pit and measure the earth resistance in the REB and ensure that it is less than 1 Ohm. Equi potential Earth of panel room. 7. as shown in UM-6800B manual section 12. power room earth pit and panel room earth pits are connected together to form equip otential bonding. Earthing Lead connections are Mechanically Sound and Protected. Check whether all grounding wires are without any sharps and bendings. Refer section 12 of UM-6800B manual. 6.ANNEXURE -X ANNEXURE. The earth connection between REB and the rack earth point should be as straight as possible.No Check Points Requirement 1. Earth pit & Pipe burial REB-Earth pit (1st Earth pit) connection Check whether Earth pit and pipe burial is done. as given in UM6800B manual. Measure the earth resistance of the peripheral/ring earth alone before connecting the Room Earth Bar (REB) to the earth pit and ensure that it is less than 1 Ohm. Earth Lead is the correct Size 5. Check whether both earthing leads terminations are readily accessible. section 12. Earth Resistance 4.X Pre-commissioning Check Lists:Observed Result OK / Not OK / NA Sl. Check whether all unused wires grounded at this termination points. No coiling of additional length of cables.3. Microlok II and other racks are firm. 3. Check the redundant cable from REB to the peripheral/ring earth pit. In Signal Equipment Room Racks to REB connection IRISET Page 136 . Check whether the foundation for panel. 2. Check the size of the earth lead as per the US&S drawing. Earthing Lead Terminations are Readily Accessible. Check whether ground conductors routed with physical separation from wiring connected to equipment.1 (Fig-4 & 5). Signal Equipment Room (Relay Room) and Power room Foundations and insulation bases for racks and panels Grounding 8. Check Whether the Microlok II earth pit. Earthing Lead is correctly connected to the protective fitting. COMMISSIONING CHECK LISTS Sl. Check whether Batteries are mounted properly. Check whether free space is available in the rack for maintenance. Check whether keying plugs are inserted in the correct location for the cards that are being inserted in each slot. Note down the serial number and part number of each board. 48/96 Connector pin locking Page 137 (S18) ELECTRONIC INTERLOCKING . Visual check of all boards 14. Check whether proper lugs are used to connect the wires at battery end. Racks/IPS/Ladder connected to REB 10. Visually check all the boards for their neat finish and plug them in the card file except CPU card. 15. Check whether all the cards are mating with the top 48/96 pin connector properly for each card insertion. Check for RDSO inspection stamp on the board. Visual check of card file back plane (Standard card file and Split card file) 13. Check whether the 48 and 96 pin connector hoods are properly locked to the card files. Check whether card file motherboard cover is intact at the back plane. Check whether proper ventilation (fan trays) is provided in the rack. Check for 48/96pin connectors are fixed as per I/O circuits. Check for neat wiring harness. Check whether power room REB is connected to signal equipment room REB.No Check Points Requirement Observed Result OK / Not OK / NA 9. 12. Check whether Cable Ladder is connected to signal equipment room REB. Fix the 1 wide blank facia panel in the unused slots except CPU board slot.PRE. Keying plug fixing Card file/boards dust cover 16. Check whether painted surface are scraped to the clean metal surface where grounding connections are to be made. Check whether proper nomenclature of the module (slot details of the cards) is fixed on the rack as per the interface circuits. Visual inspection on Microlok II rack Check whether the IPS and the racks in the power room are connected to the power room REB. Check whether input and output cables from the cards are routed separately. Check for proper mounting of EEPROM PCB on CPU card and Address Select PCBs on all I/O cards. Unpack all the boards from their covers and check whether the boards are inspected by RDSO. Check for correct jumper settings on the Address select PCBs as per the I/O Boards configuration of the Station. VCOR wiring/Receptacles locking Check the VCOR coil wiring and contact wiring are done as per the interface circuits of the station. 24. Check the phoenix connector for proper fastening. as shown in UM-6800B manual section 3. Check whether system power wiring is done as per the interface circuits in terms of wire thickness. Check whether the input. Relay type IRISET Page 138 . as given in UM-6800B manual. 19. 27. 21. 20.15.No 17. Check whether diode terminals are provided for +ve vital output from Microlok II. Check whether the type of the relays inserted in the relay racks are as per the relay disposition chart given in the interface circuits. 22. Check the tested OK sticker on Microlok II Non-vital board output line filter box. Check the sticker and the labelling on Microlok II Nonvital board output line filter box. 23. Check whether output cables from diode terminals are twisted pair to relay coils.ANNEXURE -X Sl. section 7. Visual check of NonVital board output line filter box (This is applicable only when the Panel room and the Signal equipment room are situated in different buildings) Check whether proper mounting of Non-Vital board output line filter box. Check whether Tranzorb (Part No 5KP16A or 6KZ16A) connected across the MLK II system input power supply. Check whether panel cable routing is done properly. 28. output and power cables are routed in different troughs separated with a gap of minimum 6 inches. This should be maintained in Microlok II rack. Check whether interconnect cables are routed properly. Phoenix terminal type and rigid connection using proper lugs.2. I/O wire routing 26. Check whether 250Hz wire from CPU board is connected to Power supply board. Observed Result OK / Not OK / NA EEPROM wiring CPS – CPU 250 Hz wire System power wiring MLK II system input power supply Interconnect cables routing Panel cable routing Diode terminals for Outputs Tranzorbs across output (Mlk II) relay coils 25. Check whether tranzorbs of specified make are installed properly across all relay coils that are driven by Microlok II. 18. Check whether VCOR receptacles are inserted properly and the receptacles are locked in the base. ladder arrangements and relay rack. Check Points Requirement Check the EEPROM PCB wiring to the 48-pin connector in CPU board slot 18 and19. cable trays. Check the polarity of the tranzorbs for correctness. Check whether input cables are twisted pair from Microlok connector to the respective relay rack termination. Check whether OBO 230V surge suppressor is provided in PC power supply and check the wiring is as per interface circuits.COMMISSIONING CHECK LISTS Sl. 30. Check the wiring as per interface circuit. Check whether DC-DC Converter is not connected to earth ground.PRE. Check the mechanical dimensions of the fuse also so that the fuse fits in the fuse holder properly and there is no loose connection. DC-DC Converter for RTC & Event Log Backup (5V) Check whether 5V DC-DC converter configuration is provided for Microlok II RTC & Event Log Backup. DC-DC Converter for MLK II I/O Boards & Panel power (24V) Check whether 24V DC-DC converter (N+1) configuration is provided for Microlok II I/O Board & Panel supply. as given in UM-6800B manual. Check whether fuse terminals are fixed with proper fuse ratings as per the interface circuits. Check whether DC-DC Converter is not connected to earth ground. Check whether the wire ends are crimped with correct size lugs and there are no loose connections at the terminals. Visual check installation of surge protection equipment DC-DC Converter for MLK II system power (12V) Check the whether surge protection placement is as much as close to the REB. Check whether all the wirings in the terminals are properly lugged and securely tightened. Check the wiring as per interface circuit. Check whether 12V DC-DC converter (N+1) configuration is provided for Microlok II card file supply. section 8. Check whether earth terminal of the OBO arrestor is connected to the REB in respective rooms. 34. Check whether DC-DC Converter is not connected to earth ground. 230V surge suppressor for Operator PC/Maintenance PC 32.3. Page 139 (S18) ELECTRONIC INTERLOCKING . 33.No Check Points Fuses Terminals/Fuse ratings/Fuse fixing Requirement Observed Result OK / Not OK / NA 29. Check the wiring as per interface circuit. 35. Terminals/connector s Tightness 31. Check whether OFC is laid using HDPE pipe. Port 4 & Port 5 of MLK II) Requirement Check the serial communication cable wiring is done as per the interface circuits. Check in all serial ports whether unused pairs of wires/extra wires are connected together and connected to signal common at both ends for best noise immunity. Check whether proper type of Fiber Management System (FMS) is used for the fiber cables. Port 2. 39 40. Observed Result OK / Not OK / NA 36. Check whether OFC between SER to SER/LSC/SM’s Room is laid in independent trenches having different entries to those rooms. between Microlok to Microlok. IRISET Page 140 .. Check whether Non-Twisted serial cable (Single wire) is used for Port 3. Check whether serial link cables are routed separately from both power and I/O wirings.PC. Serial to Ethernet converter. Check whether the shield of each serial communication cable is connected to rack earth at one end only. fiber equipment and fiber patch leads.No Check Points Serial port wiring (Port 1. Serial/Fiber equipment location 38. Port 4 & Port 5. Check whether splicing is done using the skilled personnel as per the fiber optic termination standards requirement. Diagnostic port connection Serial link cable routing Fiber cable Check whether Twisted pair wires are used for Port 1 & Port 2. Check whether Industrial type fiber connectors are used in the fiber equipment.e. Check whether the dB loss is within the specified limit of the fiber equipment.PC and Microlok to Data Logger. Check whether the Adapter (fiber connector). Microlok to M. seamless transfer of one fiber path to the other fiber path). Check whether proper routing of fiber patch leads are done inside the FMS. Check the splice loops stored in the splice tray. Pigtails and splicing trays are fixed properly inside the FMS. Check the dB loss for every fiber core using optical power meter. OSD units or equivalent are properly placed and wired as per the interface circuits. Check whether OFC equipment power supply & LED status is proper. Rugged server units. 37. Check whether all the diagnostic ports are wired from Microlok II rack to the location where Maintenance PC is located and terminated in a box. Port 3. Check whether proper routing of fiber cable is done inside the FMS. Check whether redundant path arrangement is working properly (i. Microlok to OP.. Check whether the serial Opto isolators and RS232<>485 Converters. Check whether all fiber loops are neatly dressed with in the splice tray.ANNEXURE -X Sl. This is applicable where the ATD >= 50. Check whether RS-232 Isolator is provided between Microlok – Microlok serial link. Ensure that all the fittings in the racks are adequately supported and will withstand the vibration due to train movement. Observed Result OK / Not OK / NA 41. 47. Fittings are adequately supported 51.COMMISSIONING CHECK LISTS Sl. Check whether the Optical Time Domain Reflector (OTDR) Report is done for each and every fiber core after the splicing (Fusion Splicing) the fiber. 24V & 110V supply connections from the IPS room to the Microlok II rack as per the interface circuits. Check whether MLK-II power supply wiring is routed properly and is kept away from I/O wiring. Isolator/Converter/M odem/Switch wiring RS-232 Isolator Converter Cum Isolator switch settings of Operator PC Isolator for Maintenance PC MLK II power supply wire routing Wire size for 12V. 43.PRE. Check the wire size of the 12V. Labels/Markers/Ferr ule/Heat shrink Page 141 (S18) ELECTRONIC INTERLOCKING . Check the isolator/485 converter/Modem/Switch wiring as per the interface circuits. as given in UM-6800B manual. Check the wire size of the 12V. Check the 485 converter switch settings as per that is given in this document. 230V cable routing 42. 49.No Check Points Requirement Check whether the one end of the armored OFC cable earthed or not. Check whether fiber optic communication test reports are filled and signed off Check whether 230V supply cable for Operator/Maintenance PC is routed properly and is kept away from I/O cables and serial communication cables. 45. Check whether gaskets are provided on the cable entry cut outs in the racks and cable trays Check whether the wire size of the power switching circuits (in case of warm standby) is as per the interface circuits. Ensure that all terminations have markers and ferrules for their right connection. Check the power connections from the IPS to all equipments in the Signal Equipment Room (Relay Room) and the operator VDU PCs. Check whether opto-isolator is wired for the serial port coming out of Maintenance PC. Ensure that there are no loose conductors in any of the circuits. IPS connections including PCs No Loose Conductors or Fittings 50. section 9.. 46. 48. 24V & 110V Microlok II supply 44. Ensure that there are no loose connections in any of the terminations. 24V & 110V supply connections between Microlok II racks as per the interface circuits.1. as shown in UM-6800B manual Appendix-A. Load the application data in all the CPU boards one by one as per the procedure given in UM-6800C manual section 5. This is applicable to all the CPU cards installed in the Station/Section/ Yard. Check whether SPD is provided as per the KELVIN connection is done as shown in UM-6800B manual. Check Block cable routings are separated from other cables/wires. 54. 64. Enter the application data in the system configuration Mode.1 for detailed information. as shown in UM-6800B manual section 14. Check whether Tranzorb (Part No 5KP30A) connected across the MLK-II Fan input supply. Check whether Racks are insulated from the floor. IRISET Page 142 . functions cable routings Switching circuit & wiring Requirement Observed Result OK / Not OK / NA Isolate 230V power cable close to MLK II related area.No 52. as given in UM-6800B manual section 3. 59. Remove the CPU card from the card file and put the jumpers JMP 20 and JMP 23 to position 2-3. Check whether Fan is fed with separate 24V or 110V DC is connected External supply. 58.1. 55. functions cable routings are separated from other cables/ wires. Check whether Lithium battery CR2032 is installed on “BATT1” location in the CPU board is loaded with right polarity. as shown in UM6800B manual section 14. Check whether Ladders are insulated from the Racks/walls. Microlok II will not be started (VCOR will drop). CPU jumper settings 62.ANNEXURE -X Sl. Insulators for Racks & Ladders Lithium Battery CR2032 Panasonic CPU backup KELVIN connection 24V or110V DC External supply for Fan supply MLK-II Fan input supply 61. section 13. Check Points 230V power cable laying Block cable routings Axle/VFT/Misc. Check Axle/VFT/Misc. Check the switching circuit and wiring as per the interface circuits. Check the jumper setting on the CPU board. Jumper settings for loading the application software RTC Coin Battery jumper setting Voltages at IPS/MLK II 63.9. 60. Check whether RTC Coin Battery jumper JMP35 on the CPU board is set to ENABLE position 1-2. check the voltages at the IPS terminals & at the respective Microlok II power terminals and ensure that all the Microlok II card file power terminals have minimum 13. 53. 57. After switching on the Power. Check whether they are inserted as per the given of UM-6800B manual section 3. Enter the checksum of the application data in the EEPROM checksum register. 56. Refer “Clear KILL” UM-6800E manual section 5. On completion of program upload in the CPU. Ensure that the 24V I/O supplies at respective Microlok II terminals are 27V DC minimum after the VCOR has picked up. Check the wire size of the switching circuits is as per the interface circuits.1 Fig-2.5V DC. 70. CRC Page 143 (S18) ELECTRONIC INTERLOCKING . The flashing of this indication depicts that the VDU is active. Set the RTC time on each CPU card and manually clear CPS in each Microlok in the Station/Section/Yard. Check the Check-sum of the Application Software of each MLK II Unit in that Station /Section/ Yard from the Microlok II Complier generated Microlok Listing (MLL) file. Check Voltages in respect to earth for every Bus Ensure that Zero voltage recorded when connected to different bus polarity. Remove the CPU card from each Microlok card file and set jumpers JMP20 . switch them off all. RTC Time Setting Yard layout and its indications on Control cum indication panel. If all the Microloks are up. Check the yard layout on CCIP/VDU/MT whether it is according to the approved signalling plan.0 is 14FE Check CRC of the Application Software of each MLK II Unit inthat Station /Section/ Yard from the Microlok II Complier generated MLL file.0 is 08B1. Check from VDU that all emergency operations are protected with password. Check the RGY colour bar on the right hand top corner of the VDU screen is flashing in sequence.No Check Points Requirement Observed Result OK / Not OK / NA 65. Application Program Upload 67. 71. 72. Check the CRC of the Executive Software Version CC 2.PRE. VDU and MT VDU Active flashing indication Password protection for Emergency operation Check-sum 68.JMP23 to position 1-2 (after uploading the service version of Application program) in the Station/Section/Yard. 66.COMMISSIONING CHECK LISTS Sl. 69. Check the Check-sum of the Executive Software version CC 2. d) PSU. VCOR Relay rated current a) 3 mAmp b) 3 Amp b) Both (b) & (c) b) 6F/6B independent contact d) All the above c) 30 mAmp d) 30 Amp IRISET Page 144 . What is Solid State of Interlocking ? 2. 6B contact 6. Write the equivalent logic (Boolean Equation ) for the following circuit :A B C X D 7. Tick/Mark the correct option only:1. Write the different hardware features of Micro Lok-II 6. Draw the overall system configuration of MLK-II which is at IRISET . e) CPU 4. Compare between Vital & Non-vital PCB of MLK2 system 5. Key c) VCOR indication b) Track Ckt. Non-vital PCB has a) 8 input & 8 out put b) 16 input & 16 out put c) 32 input & 32 ou put d) None the above 3. Write Short Notes on :a) VCOR. Point Detection d) None the above 4. 3. Each Vital input PCB has a) 8 input b) 16 input c) 32 input d) None the above 2. VCOR relay has a) 6F/B dependent contact c) 6F. b) Vital Card. Write the equivalent conventional circuit form the following Boolean Equation :A* ∼B * (∼ C* D + E) TO X 8. c) Non Vital Card. Write the advantages of Electronic Interlocking. 9. Non-Vital Inputs are a) Panel Push Button.ANNEXURE -XI Annexure – XI REVIEW QUESTIONS 1. Vital & Non-Vital cards are suitable for a) 6 V DC b) 12 V DC c) 24 V DC 5.. REVIEW QUESTIONS 7. 15 & 16 d) In any slot Q. 18 & 19 b) Slot No. Microprocessor used in Microlok-II is a) Motorola 68332 b) Intel 8086 c) Intel 68332 d) Motorola 8086 10. Slow to pick” is defined as a) “SET = 1 SEC” c) “SETUP = 1 SEC” b) “Clear = 1 SEC” d) “DELAY=1SEC” 8. 3 Amp (f) Motorola-68332 c) ___ ________________ Page 145 (S18) ELECTRONIC INTERLOCKING . In the Card File the Power Supply PCB is placed in a) Slot No. Fill up the Balnks :1. 4 fast static RAM of 64 KB each are used for storing ________________ 3. Slow to Release” is defined as a) “SET = 1 SEC” b) “Clear = 1 SEC” c) “SETUP = 1 SEC” d) “DELAY=1SEC” 9. 4 Flash EPROM of 8 MB are used for storing __________________ 2. 16 & 17 c) Slot No. Key (b) Intel – 8086 (c) 32 (d) 16 (e) 6F/B . Software used in SSI are a) ___ _________________ b) ___ _________________ Match The Following :1) Processor used in Microlok-II is 2) Processor used in Safelok is 3) Each Vital Card PCB has input & Out Put 4) Each Non-Vital Card PCB has input & output 5) Vital Input are 6) VCOR Relay (a) Panel Push Button.