cy220b

BOSCHREUTLINGEN Supplier: Part or product no.: Date of issue: © All rights reserved by ROBERT BOSCH GMBH even in the case of patent applications. All rights of use such as copyright and right of disclosure reserved Data sheet CY 220B 1 279 923 504 Page- 1/31 - BOSCH 0 272 230 421 19.03.99 Date: 07.10.98 Neuausgabe 1279C01314 Überarbeitung 22.03.99 1279C01604 Überarbeitung 11.04.00 1279C01894 Überarbeitung 15.02.01 1279C02211 New edition 27.03.02 BOSCH REUTLINGEN Data sheet CY 220B 1 279 923 504 Page- 2/31 - Data sheet © All rights reserved by ROBERT BOSCH GMBH even in the case of patent applications. All rights of use such as copyright and right of disclosure reserved 1. Short description 2. Functional description 2.1. Application circuit 2.2. Block diagram 2.3. General information 2.4. Timing diagram 2.5. Timing process 2.6. Special features of the process 3. Effects RES, OFFx 4. 1/2-bank operation 5. Configuration of connections 5.1. Packing MQFP64 5.2. Description of connections 6. Electrical limit values 7. Electrical parameters Day:25.10.2001 Dept.: AE/EIC3 Name: Ressel BOSCH REUTLINGEN Data sheet CY 220B 1 279 923 504 Page- 3/31 - 1. Short description © All rights reserved by ROBERT BOSCH GMBH even in the case of patent applications. All rights of use such as copyright and right of disclosure reserved The power stage control module CY 220B controls time-dependently the power stage transistors of the injectors (solenoid valves MV) of a common rail diesel engine (1 ... 8 cylinders). Based on a 2-bank structure with 2 x 4 outputs, overlapping injection is possible, i.e. one power stage of each bank can be activated simultaneously (by switching 1 x n operation is also possible, n = 1 ... 8). CY 220Bis controlled for example by a component (CC5xx or GAD4x) which presets the time control of the power stages and the individual phases of the injection with three signals ONx, MODEx, RCHGx as well as determining the selection of the power stage with the YSELxy signals. The control of a Booster FET (voltage booster) is also realized. If the recovered switch off energy of an injector is insufficient for the boost (iron losses in the injector) further energy must be pumped into the booster capacitor (CBOOS) by a recharging phase. This is achieved by controlling a power stage up to a certain current level so that no pulling up of the injector is possible with subsequent fast decay to the booster capacitor. The IC monitors the output stages for overcurrent and load drop and checks the function of the fast decay. The error data can be read out serially. Coding is compatible with the other components (e.g. CJ401) Features and modules: Power-On switch off for power stage driver Presets of start, hold and recharging current level, short-circuit current HS/LS Preset of hysteresis for two-point current regulation Monitoring of the booster voltage (discharge and recharge voltage) Preset discharge/recharge voltage Diagnosis: Error types: Short-circuit to UBAT (low-side protection) Short-circuit to ground (high-side protection) load drop Fast decay error Error transmission via serial interface coded according to location and type Cascadable diagnostic interface Error cut-off of output stages and direct message to the computer Emergency cut-off of every single bank by controller 8 x low-side power stage drivers ( 2 x 4 or 1 x 8 ) 2 x high-side power stage drivers 2 x booster power stage drivers 2 x differential amplifier for MV current measuring at the measuring shunt 2 x current comparators for two-point current regulation 2 x voltage monitoring booster capacitor Day:25.10.2001 Dept.: AE/EIC3 Name: Ressel All rights of use such as copyright and right of disclosure reserved 2.10. AVCC VDD UBAT RSh UHSx High-side Driver High-side FET Booster FET YHSx BOSCH Day:25.1.© All rights reserved by ROBERT BOSCH GMBH even in the case of patent applications.2001 CY 220 Bank1: x=1 Bank2: x=2 REUTLINGEN ASIC 2 ONx MODEx RCHGx YSELx[0:1] Functional description Application circuit PZM ISOLL_N Power stage electronics shown for one bank only Dept.4/31 - 1 279 923 504 Diagnostic input of cascaded output stage AGND GND PGND1 .: AE/EIC3 YBOOSx Solenoid valve YLSx1 4 YLSx4 UIHx RSh UILx UIMVx Low-side FET CBOOS UBOOSx UC_RCHG UC_BOOS ISOLL_A ISOLL_H IHYS IMAX_HS IMAX_LS Data sheet CY 220B Ubat BNK Name: Ressel RES OFFx C T SY DA DE Page. 2. 5/31 - 2.BOSCH REUTLINGEN Data sheet CY 220B 1 279 923 504 Page.2001 Dept. (2x) UBOOSx GR_UMAXx SY GR_UMINx T DE Monitoring High-side current (2x) DA © All rights reserved by ROBERT BOSCH GMBH even in the case of patent applications. amplifier (2x) Actual current level Impedance converter (2x) ISOLL_A ISOLL_H ISOLL_N Selection (2x) Nominal current level IHYS Current comparator (2x) Hysteresis YHSx KL_ISOLLx Power stage (2x) YBOOSx AGND GND Day:25. All rights of use such as copyright and right of disclosure reserved UC_RCHG UC_BOOS UBAT Diagnosis output UHSx Logic HS_OKx YLSxy Power stage (8x) IMAX_HS Power-On switch off Monitoring Low-side current (2x) IMAX_LS KL_IMAXx KL_IMINx DEL_IMIMx T Timer (2x) UIMVx UIHx UILx Diff. Block diagram YSELxx MODEx RCHGx AVCC OFFx VDD BNK ONx RES Monitoring Booster vltg.: AE/EIC3 Name: Ressel PGND1 .10.2. Low-side FET control: The Low-side FET to be controlled is selected by binary coded address lines YSELxy. All rights of use such as copyright and right of disclosure reserved Regulation: The IC contains a two-point current regulation with adjustable hysteresis IHYS. The hysteresis IHYS acts on the start and holding current control.BOSCH REUTLINGEN Data sheet CY 220B 1 279 923 504 Page. High-side FET control: The High-side FET is used as a switch for the two-point current regulation.2001 Dept. Control Booster FET: The Booster FET is used as a switch for the booster operation. The lower current value IMIN applies for the recharging process. This happens during the recharging phase and also during the injection phase in the transition start to holding current or holding current to zero. Day:25. The High-side FET is conducting during the recharging and fast decay phase. General information © All rights reserved by ROBERT BOSCH GMBH even in the case of patent applications.: AE/EIC3 Name: Ressel .6/31 - 2.conducting during the other phases.10. It is non.3. The setpoints for start current ISOLL_A. holding current ISOLL_H and recharging current ISOLL_N can be preset externally. The fast decay is triggered by switch off the Low-side FET. The selected FET is conduction statically during two-point regulation. 4. Booster start 2.2001 Dept.: AE/EIC3 Name: Ressel .7/31 - 2. Cylinder change 7.10. fast decay 4. All rights of use such as copyright and right of disclosure reserved RCHG YSEL YBOOS YHS YLS Phases: 1. Holding current regulation 5.BOSCH REUTLINGEN Data sheet CY 220B 1 279 923 504 Page. ON Timing diagram MODE © All rights reserved by ROBERT BOSCH GMBH even in the case of patent applications. Recharging I_H I_N 8. fast decay 6. start current regulation IMV I_A 3. Cylinder change Time UC UC_RCHG UC_BOOS Phases: 0 1 2 3 4 5 6 7 8 Time Day:25. Phase 4 is finished when the injection process is completed: ONx=0.The Low-side FET is activated: YLSxy=1.On reaching the current setpoint ISOLL_H the High-side FET is switched off (free-running) and enabled again on dropping below the hysteresis ( ISOLL_H – HYS ).The fast decay check is also performed with the edge change (UIMVx < IMIN ?. .High-side FET and Low-side FET are switched on: YHSx=0 / YLSxy=1. Timing process © All rights reserved by ROBERT BOSCH GMBH even in the case of patent applications. Phase 3: First fast decay .For the fast decay the Low-side FET is switched off and the High-side FET switched on. . . . Phase 4: Holding current regulation .: AE/EIC3 Name: Ressel . . Phase 2: start current regulation .Another power stage in the same bank can be switched to with YSELxy. Phase 6: Cylinder change .Phase 3 is finished when the hold current is droped below ISOLL_H less hysteresis IHYS/6.Phase 2 is finished when an edge change from 1 ->0 takes place at the MODE pin. IMIN is an internal current threshold). . Low-side and Booster FET are switched off YHSx=1.Phase 1 is finished when the measured booster voltage at pin UBOOSx drops below the threshold UC_BOOS (discharge voltage). . YLSxy=0.The valid low-side power stage valid for the following injection phase is selected by the select logic YSELxy. YLSxy=0 / YHSx=0. (Remark: HYS is calculated from HYS = IHYS / 6). .The power stage is switched off because both the High-side.5. YBOOSx=1. Day:25. Phase 5: Second fast decay .High Side FET is switched off: YHSx=1.The edge change from 0 -> 1 at the MODE signal ends phase 5 as well the injection process. . All rights of use such as copyright and right of disclosure reserved Phase 0: Cylinder change . Phase 1: Booster start .2001 Dept.10.8/31 - 2. YHSx=0 / YBOOSx=1.The MV current is now taken over by the High-side FET and booster operation is deactivated. .The High-side FET remains inactive: YHSx=1.BOSCH REUTLINGEN Data sheet CY 220B 1 279 923 504 Page. .For the fast decay the Low-side FET is switched off and the High-side FET switched on: YLSxy=0 / YHSx=0.The solenoid valve is switched to the booster capacitor by the Booster FET: YBOOSx=0. .On reaching the setpoint ISOLL_A the High-side FET is switched off (free-running) and enabled again on dropping below the hysteresis. .Recharging is enabled by RCHGx=1.: AE/EIC3 Name: Ressel .10. To do this the control module (CCxx or GADxx) should change the signals in the order RCHG.e.In systems without voltage boosting the booster phase can be suppressed after ONx=1 by connecting UC_BOOS > UBOOSx. If the voltage setpoint is not reached again during the recharging allowed by RCHGx=1. the ON/MODE signal during a recharging process.This procedure is repeated until the voltage setpoint UC_RCHG (recharging voltage) is reached on the booster capacitor or the recharging permission is rescinded: RCHGx=0. . It can only be enabled again at the next positive ONx or RCHGx edge. 2. MODEx switches over from 1 to 0 at the same time as ONx. All rights of use such as copyright and right of disclosure reserved Phase 7: Recharging . . Resetting of RCHGx always causes a recharging process to be ended immediately: YHSx=1.On dropping below the internal current threshold IMIN a new recharging is enabled after a delay of 10 us: YLSxy=1. .The RCHG signal is ignored during an injection process.2001 Dept. i. ON but at least simultaneously (stable signals). recharging begins again.An injection process begins with the positive ONx edge and ends with the positive MODEx edge. .On reaching the current setpoint ISOLL_N the Low-side FET is switched off (fast decay): YLSxy=0.9/31 - © All rights reserved by ROBERT BOSCH GMBH even in the case of patent applications.An ongoing recharging process can be aborted by a new injection. Phase 8: Cylinder change . switching off takes place immediately. . YLSxy=1.BOSCH REUTLINGEN Data sheet CY 220B 1 279 923 504 Page. YSEL. Day:25.and post-injection the holding current regulation can be omitted. High-side FET and Low-side FET are switched on: YHSx=0. YLSxy=0.In pre.6. .Another power stage in the same bank can be switched to with YSELxy. .A recharging process begins with the positive RCHGx edge and ends with the negative RCHGx edge. Special features of the timing process . .When the power stage is switched off by OFFx. . All rights of use such as copyright and right of disclosure reserved .2001 Dept.10. © All rights reserved by ROBERT BOSCH GMBH even in the case of patent applications.The current regulation of the recharging takes place between ISOLL_N as the upper value and IMIN plus a time delay of approx. . circle). after the positive MODEx edge or negative RCHGx edge (and zero current) and before the next positive RCHG or ON edge.A new active ONx or RCHGx signal will only be recognized as valid when the current from the previous process (recharging or injection) has dropped below the threshold IMIN. . If this change is not reached (change in current in the MV faster than switching speed of the current multiplexer). . 10us.e.Slow discharging of the booster capacitance within a recharging process leads to a new recharging process.10/31 - . the process control interrupts the fast decay (see figure.BOSCH REUTLINGEN Data sheet CY 220B 1 279 923 504 Page. i. MODE Time U [V] 4 3 2 1 UIMV ISOLL_H ISOLL_A ISOLL_x Time Day:25.A cylinder change is only accepted between two processes (recharging or injection). If the actual value UIMVx drops below the setpoint ISOLL_H.A rise in the booster voltage after the booster phase does not lead to a new booster operation.: AE/EIC3 Name: Ressel . the fast decay is interrupted with certainty on dropping below the current level IMIN.The change in current in the MV during fast decay of ISOLL_A to ISOLL_H must be smaller than the switching speed of the nominal current multiplexer (see figure). : AE/EIC3 Name: Ressel . Effects RES.2001 Dept. All rights of use such as copyright and right of disclosure reserved RES=0 0 0 1 1 1 1 reset reset reset reset reset Status: FF error-free OFF1=0 0 1 1 reset - OFF2=0 0 1 1 reset - Low-side Bank1.10. YLS2x High-Side Bank1 YHS1 High-Side Bank2 YHS2 Booster Bank1 YHS1 Booster Bank2 YHS2 Error buffer 1 Error buffer 2 Process control Bank1 Process control Bank2 Diagnosis register Day:25. OFFx A Low signal at RES affects Bank1 and Bank2. A Low signal at OFFx only affects bank x.BOSCH REUTLINGEN Data sheet CY 220B 1 279 923 504 Page. YLS1x Low-side Bank2. Function © All rights reserved by ROBERT BOSCH GMBH even in the case of patent applications.11/31 - 3. 1/2-bank operation © All rights reserved by ROBERT BOSCH GMBH even in the case of patent applications. UIH2 OFF2.12/31 - 4.10. YBOOS2 Connection GND VDD UBAT over about 25k to VDD open Day:25. With a high signal at BNK the outputs YHS2 and YBOOS2 are switched respectively to the outputs of the first bank (YHS1 or YBOOS1) additionally. YSELxy must be fed in separately and must be controlled according to the cylinder selection. The differential amplifier for current measuring Bank2 must be switched to the measuring shunt of Bank1.: AE/EIC3 Name: Ressel . All rights of use such as copyright and right of disclosure reserved With the BNK input the component can be switched from 2-bank operation to 1-bank operation. MODEx. Pin UBOOS2. RCHGx. The control signals ONx. Driver Internal signals YHS1 1 Š1 & YHS1 YHS2 BNK YBOOS1 1 Š1 & YHS2 YBOOS1 YBOOS1 YBOOS2 All other inputs and outputs must still be switched in 1-bank operation analogously with 2bank operation.2001 Dept. This simplifies the external wiring of the highside and booster control. the Bank2 must be switched as follows for example. RCHG2 MODE2 UHS2 UIL2 UIMV2 YLS2x. The same applies for the high-side current monitoring and the booster voltage monitoring. YHS2.BOSCH REUTLINGEN Data sheet CY 220B 1 279 923 504 Page. The logic operation is an OR (see also the structure diagram below). If one bank is to be deactivated completely. ON2. 13/31 - 5.BOSCH REUTLINGEN Data sheet CY 220B 1 279 923 504 Page. Configuration of connections Packing MQFP 64 UC_RCHG UC_BOOS IMAX_HS IMAX_LS ISOLL_A 52 51 50 49 48 47 46 45 44 43 nc nc ISOLL_H ISOLL_N nc UIMV1 UIL1 UIH1 nc PGND1 UBAT UHS2 UHS1 YHS2 YHS1 YBOOS2 YBOOS1 nc nc 42 41 40 39 38 37 36 35 34 33 20 21 22 23 VDD 24 GND 25 YLS11 26 YLS12 27 YLS13 28 YLS14 29 YLS21 30 YLS22 31 YLS23 32 YLS24 UBOOS2 UBOOS1 UIMV2 AGND AVCC IHYS 53 UIH2 58 UIL2 57 © All rights reserved by ROBERT BOSCH GMBH even in the case of patent applications.: AE/EIC3 Name: Ressel .1. 5. All rights of use such as copyright and right of disclosure reserved 64 nc nc BNK RES OFF1 OFF2 ON1 MODE1 RCHG1 YSEL10 YSEL11 ON2 MODE2 RCHG2 YSEL20 YSEL21 SY nc nc 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 63 62 61 60 59 56 55 54 CY 220 Day:25.2001 DA DE T Dept.10. 2. All rights of use such as copyright and right of disclosure reserved Description of connections Name nc nc BNK logic E down Switching 1/2-bank operation HIGH: 1 bank à 8 power stages LOW: 2 bank à 4 power stages Reset signal HIGH: Normal operation LOW: RESET Asynchronous switch off signal Bank1 HIGH: Power stages in operation LOW: Power stages switched off Asynchronous switch off signal Bank2 HIGH: Power stages in operation LOW: Power stages switched off Control signal injection Bank1 HIGH: Injection LOW: No injection Control signal current level Bank1 HIGH: Booster operation/start current regulation./fast decay Control signal recharging Bank1 HIGH: Recharging allowed LOW: No recharging allowed Cylinder selection bit 0 Bank1 Cylinder selection bit 1 Bank1 Control signal injection Bank2 HIGH: Injection LOW: no injection Control signal current level Bank2 HIGH: Booster operation/start current regulation LOW: Hold current regulation./fast decay Control signal recharging Bank2 HIGH: Recharging allowed LOW: no recharging allowed Cylinder selection bit 0 Bank2 Cylinder selection bit 1 Bank2 Synchronisation diagnosis interface Level Input/ Output Int. current Function source 3 4 RES logic E down 5 OFF1 logic E down 6 OFF2 logic E down 7 ON1 logic E down 8 MODE1 logic E up 9 RCHG1 logic E down 10 11 12 YSEL10 YSEL11 ON2 logic logic logic E E E up up down 13 MODE2 logic E up 14 RCHG2 logic E down 15 16 17 18 YSEL20 YSEL21 SY nc logic logic logic E E E up up up Day:25. Number 1 2 © All rights reserved by ROBERT BOSCH GMBH even in the case of patent applications. LOW: Holding current regulation.2001 Dept.BOSCH REUTLINGEN Data sheet CY 220B 1 279 923 504 Page.14/31 - 5.: AE/EIC3 Name: Ressel .10. E E A up up - Clock diagnosis interface Data input diagnosis interface Data output diagnosis interface Supply logic/driver Supply logic/driver 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 0V / 5V 0V / 5V 0V / 5V 0V / 5V 0V / 5V 0V / 5V 0V / 5V 0V / 5V A A A A A A A A - Driver for LS-FET cylinder 1 Bank1 Driver for LS-FET cylinder 2 Bank1 Driver for LS-FET cylinder 3 Bank1 Driver for LS-FET cylinder 4 Bank1 Driver for LS-FET cylinder 1 Bank2 Driver for LS-FET cylinder 2 Bank2 Driver for LS-FET cylinder 3 Bank2 Driver for LS-FET cylinder 4 Bank2 0V / 5V 0V / 5V 0V / 5V 0V / 5V analogous analogous analogous A A A A E E E - Output for driver booster FET Bank1 Output for driver booster FET Bank2 Output for driver booster HS-FET Bank1 Output for driver booster HS-FET Bank2 Measuring input high-side shunt Bank1 Measuring input high-side shunt Bank2 Measuring input high-side shunt Bank1/2 2.BOSCH REUTLINGEN Number 19 20 21 © All rights reserved by ROBERT BOSCH GMBH even in the case of patent applications.: AE/EIC3 Name: Ressel .2001 Dept. All rights of use such as copyright and right of disclosure reserved Data sheet CY 220B 1 279 923 504 Page. Supply driver analogous analogous analogous E E A - Measuring input low-side shunt Bank1 Measuring input low-side shunt Bank1 Measuring output low-side Bank1 analogous analogous E E - Nominal recharging current level Nominal holding current level analogous E - Nominal start current level Day:25.10. current Function source logic logic open C.15/31 - Name nc T DE DA VDD GND YLS11 YLS12 YLS13 YLS14 YLS21 YLS22 YLS23 YLS24 nc nc YBOOS1 YBOOS2 YHS1 YHS2 UHS1 UHS2 UBAT PGND1 nc UIH1 UIL1 UIMV1 nc ISOLL_N ISOLL_H nc nc ISOLL_A Level Input/ Output Int. 2001 Dept. current Function source Hysteresis current level Short-circuit current low-side Short-circuit current high-side Measuring output low-side Bank2 Measuring input low-side shunt Bank2 Measuring input low-side shunt Bank2 Supply analogous Supply analogous 56 57 58 59 60 61 62 63 64 analogous E E E E - Nominal voltage level discharge booster.C Actual voltage level booster C1 Actual voltage level booster C2 UC_RCHG analogous UBOOS1 UBOOS2 analogous analogous Day:25.C Nominal voltage level recharge booster.BOSCH REUTLINGEN Number 53 54 55 © All rights reserved by ROBERT BOSCH GMBH even in the case of patent applications.: AE/EIC3 Name: Ressel .16/31 - Name IHYS IMAX_LS IMAX_HS UIMV2 UIL2 UIH2 AGND AVCC UC_BOOS Level analogous analogous analogous analogous analogous analogous Input/ Output E E E E E A Int.10. All rights of use such as copyright and right of disclosure reserved Data sheet CY 220B 1 279 923 504 Page. 7 Clamp current UIHx/UILx (RV= 5. UBOOSx. DE. UC_RCHG IMAS_HS.5 0.2 © All rights reserved by ROBERT BOSCH GMBH even in the case of patent applications. All rights of use such as copyright and right of disclosure reserved 6. IMAX_LS ONx.2001 Dept. IHYS. MODEx. ISOLL_N. SY. T = 5 s) UIHx/UILx (RV= 5. T = 1 s) Supply Ground .6 -40 -40 -40 -1.6 5 6.17/31 Numeric value min typ max Unit 6.1 140 125 110 175 125 60 V V V V C C C C C V 6.3 6.62 k9) ISOLL_A.UVDD | . VDD . RES.B = | UAGND .4 6. 6. UC_BOOS.S .5 -0. DA no destruction static dynamic (Ti = 1 ms.: AE/EIC3 Name: Ressel .B TJ TU TU TU TU UUBAT UUHSx UUIHx UUILx UXXX 3.1 0. BNK.5 6.5 V -0. T.3 UAVCC +0.BOSCH REUTLINGEN Parameter or Connection Conditions Data sheet CY 220B Symbol 1 279 923 504 Page. OFFx.3 1. YSELxy. RCHGx.S = | UAVCC . ISOLL_H.62 k9) at overvoltage at undervoltage IUIHx IUILx 5 -360 mA A Day: 25.UGND | AVCC.0 6.1 Electrical limit values Supply voltage Voltage offset Junction temperature Ambient temperature Storage temperature Input voltage Chip on ceramic Plastic housing as chip Plastic housing UBAT/UHSx (Ti = 400 ms.10.3 V 6. 18/31 Numeric value min typ max Unit 7. SY Logic level: LOW Schmitt trigger input buffer input HIGH Schmitt trigger input buffer input Uxxx Uxxx Uxxx Uxxx Cxxx 0. no information UVDD loss 7. T.4 Digital inputs (Schmitt trigger input) ONx. UVDD = 5V. RCHG.3 V © All rights reserved by ROBERT BOSCH GMBH even in the case of patent applications.: AE/EIC3 Name: Ressel .BOSCH REUTLINGEN Parameter or Connection Conditions Data sheet CY 220B Symbol 1 279 923 504 Page. All rights of use such as copyright and right of disclosure reserved 3.10. BNK Ixxx IDE Ixxx -50 -250 10 -25 -125 25 -10 -50 50 A A A Day: 25.1.1. T.2 V 12 0 100 20 15 mA mA mA dynamic 7.7 15 0.1.1 Electrical parameters General information Power supply continuous Range 1: Low-side power stage locked internally Range 2: Low-side power stages switched off by external reset (RES).2001 Dept. 7. YSELxy. ONx. MODEx.1. typically wired static UAVCC UVDD IAVCC IVDD IVDD 5.2 0. YSELxy.3 Power-On threshold Current consumption Transition range 1 -> range 2 UAVCC .5 6.1 7. logic fully functional Range 3: Full function (RES=H) UAVCC UVDD UAVCC UVDD UAVCC UVDD 0 3. SY DE Pull-down current source: RES.2 7.5 V 4. BNK.3 4. OFFx.5 V Range 4: UAVCC Extended parameters permissible.8 0.5 5. RCHGx.0 V 3.3 4. OFFx.3 UVDD UVDD UVDD UVDD pF Input capacitance Input current Pull-up current source: MODEx. DE Buffer input RES. UIMV1 Bank2: UIH2.g.7 V UShunt 28 V Clamp voltage Clamp current Specified range (if UIH leaves the specified range. UIMV2 Internal: UIMVx Symbol 1 279 923 504 Page.1 V UUIxx 0. UIL1.BOSCH REUTLINGEN Parameter or Connection 7.7 0 -0.19/31 Numeric value min typ max Unit 7.2.2 -1.2 +1.UUILx HT RT TT RShunt RV RR RS CST 0.7 V IOFF = IUIHx .2 mV mV mV V/K A A Day: 25.36 -0.01 5.1 V Clamp voltage Clamp current at overvoltage at the shunt 0.2 Ext.1 © All rights reserved by ROBERT BOSCH GMBH even in the case of patent applications.10. e. circuits Shunt Series resistors Feedback resistors Low pass resistor Low pass capacitance UIHx.4 -10 -2.8 +1.1 3 5 0. UILx (Note: Avoid crosstalk by layout capacitances) at undervoltage at the shunt .7 V mA V Input voltage Offset voltage Offset drift Input current Offset current UOFFD = dUOFF / dT . All rights of use such as copyright and right of disclosure reserved RV UIMVx UIHx UIMVx ADC UILx RS RR CST RShunt RV RR 7.3 Differential inputs Clamping UUIxx IUIxx -1 -0.: AE/EIC3 Name: Ressel . the output state at UIMV is retained) UOFF = UUIHx .8 -1.2001 Dept.IUILx UOFF UOFF UOFF UOFFD IUIxx IOFF -0. clamping in case of short-circuit.0. UIL2.2 +0.62 51.2.4 +10 0 +0.2.2 Differential amplifier double Block diagram Data sheet CY 220B Conditions Bank1: UIH1.1 250 1 9 k9 k9 9 nF 7.5 -0.1 0 V mA UUIxx IUIxx UUIxx 0.2 V UShunt -0. 95 s V fT 9.09 2 60 MHz dB DC-value CMRR DC-value f = 50 kHz DD = dUAVCC/dUUIMVx DD 40 dB Day: 25..BOSCH REUTLINGEN Parameter or Connection 7.5 mV V = UUIMV / (UUIH . 90 % voltage deviation Typical wiring Sample capacitance 70 pF Transient to final value +/.: AE/EIC3 Name: Ressel .5 2.. All rights of use such as copyright and right of disclosure reserved Specified range (for specified offset) -100 A k9 V/ s Output impedance Rise/fall speed Transient time when connecting the sample capacitance Gain Transit frequency Common mode rejection ratio Operating voltage suppression tSW 1.UUIL) dU/dt Symbol 1 279 923 504 Page.2 UAVCC -1V 100 0.20/31 Numeric value min typ max Unit 0.4.5 V Output current © All rights reserved by ROBERT BOSCH GMBH even in the case of patent applications.2.10.4 Amplifier output Output voltage Data sheet CY 220B Conditions UIMVx Specified range UUIMV IUIMV RUIMV Load: C = 1 nF (EMC) 10 .2001 Dept. 3.: AE/EIC3 Name: Ressel .1 V Active on UIMV for UUIMV > UIMAX_LS lower (a diode voltage.10.3.1 V UIMAX_LS  UAVCC IIMAX_L S -5 A mV UHYS UIMA_LS UIMA_LS IIMAX_L IIMAX_L S S 0.3 Monitoring LS current level Double Block diagram Data sheet CY 220B Conditions Common IMAX_LS Internal: UIMVx Outputs (internal): KL_IMAXx.1 © All rights reserved by ROBERT BOSCH GMBH even in the case of patent applications.94 x UAVCC .8 V 0.27 30 0.21/31 Numeric value min typ max Unit 7.BOSCH REUTLINGEN Parameter or Connection 7. KL_IMINx Symbol 1 279 923 504 Page.3 Ext.3.UD ) .0 V V 0 A A Clamp current -350 0 7.3 V UIMAX_LS  1.8 0.4 Minimum current specification Threshold Hysteresis voltage Signal delay internal UIMIN Active on UIMV for UUIMV > UIMIN for state UUIMV < UIMIN for state UUIMV > UIMIN UHYS T T 0.94 x UAVCC .8 V UIMAX_LS  0. UD) upper ( 0. All rights of use such as copyright and right of disclosure reserved UIMVx IMAX_LS KL_IMAXx T KL_IMIN 7.94 x UAVCC . wiring Maximum current preset Input voltage Preset maximum current by voltage divider at IMAX_LS IMAX_LS Specified range UIMA_LS 1.32 V mV 7 10 13 200 s ns Day: 25.2001 Dept.94 x UAVCC -1 +5 30 V Input current Hysteresis voltage Internal limiting 1.2 7.2 0.0.3.7 4. 3 Ext.1 RShunt UBAT UHSx High-side FET HS_OK1 HS_OK2 IMAX_HS 7.2001 Dept. IMAX_HS Bank1: UHS1 Bank2: UHS2 Output (internal): HS_OKx 7. UHSx Tolerance range 1 Tolerance range 2 RShunt 0.0 V 5 10 15 % % Operating current Day: 25.4 © All rights reserved by ROBERT BOSCH GMBH even in the case of patent applications.4.10.4.2 7. All rights of use such as copyright and right of disclosure reserved Monitoring HS current level Double Block diagram Common UBAT.UUHSx Permissible range Error related to UD = UUBAT .2 36 36 60 V V Difference input voltage Error UD = UUBAT .BOSCH REUTLINGEN Parameter or Connection Conditions Data sheet CY 220B Symbol 1 279 923 504 Page. ) 0.01 9 UUBAT UUHSx UUBAT UUHSx UD F F 5.4.22/31 Numeric value min typ max Unit 7.UUHSx Tolerance range 1 Tolerance range 2 IUBAT/UHSx = UIMAX_HS / 45 k9 ( typ.: AE/EIC3 Name: Ressel .) UBAT.0 2. wiring Measuring inputs Input voltage Shunt Resistance divider (according to spec. 2 0 UAVCC +0.5. wiring Voltage divider at the booster capacitance Filter element at the reference inputs for PZM signals Poss.2 +20 V V A mV Input current 7.4 Nominal inputs Input voltage UUC_BO UUC_RC IUC_xxxx UOFF 0.0 2.5.5 -0. UC_BOOS Bank1: UBOOS1 Bank2: UBOOS2 Outputs (internal): GR_UMAXx. All rights of use such as copyright and right of disclosure reserved -5 8. UC_RCHG Specified range UC_BOOS (discharge level) UC_RCHG (charge level) 0 -0.3 Actual inputs Input voltage Input current 7. GR_UMINx S 1. Interference suppression capacitance at UBOOSx because disturbance signals are processed immediately by the fast CMOS comparator UBOOSx Permissible range UUBOOS IUBOOS UC_BOOS.23/31 Numeric value min typ max Unit UIMX_HS IIMAX_L N = UIMAX_HS / ( UUBAT .5 UAVCC +0.2001 Dept.UUC_RCHG UOFF = UUBOOS .2 -20 0 UAVCC -2.4 Switch off threshold High side protection Input voltage Data sheet CY 220B Conditions IMAX_HS Symbol 1 279 923 504 Page.2 Ext.5.5.UUHSx ) Common UC_RCHG.1 UBOOSx GR_UMAXx PZM UC_RCHG GR_UMINx PZM UC_BOOS + CBOOS 7.5 Offset voltage IUC_BOOS or IUC_BOOS UOFF = UUBOOS .2 V A 7.5.0 A Standardization of the switch off threshold 7.10.: AE/EIC3 Name: Ressel .UUC_BOOS Day: 25.5 Monitoring Voltage Booster capacitance Double Block diagram N 7.BOSCH REUTLINGEN Parameter or Connection 7.5 +5 9 10 V Input current © All rights reserved by ROBERT BOSCH GMBH even in the case of patent applications.4.5 UAVCC -0. 5.24/31 Symbol UHYS Numeric value min typ max 25 50 75 Unit mV © All rights reserved by ROBERT BOSCH GMBH even in the case of patent applications. UC_RCHG U [V] 4 UC_RCHG 3 UBOOSx 1 279 923 504 Page.6 Current regulation Double Common ISOLL_A. All rights of use such as copyright and right of disclosure reserved 2 UC_BOOS 1 Time 7.BOSCH REUTLINGEN Parameter or Connection 7.2 Ext.: AE/EIC3 Name: Ressel . wiring Nominal preset by voltage divider at ISOLL_x Voltage divider at IHYS Day: 25.6 Hysteresis voltage Data sheet CY 220B Conditions Active on references UC_BOOS.6.10. UIMV2 Bank1: YHS1 Bank2: YHS2 Output (internal): KL_ISOLLx 7. ISOLL_H. ISOLL_N.1 Block diagram UIMVx ISOLL_A ISOLL_H ISOLL_N KL_ISOLLx YHSx RG FET IHYS Logic Logic 7.6.2001 Dept. IHYS Internal: UIMV1. 5 +0. 500mV < UISOLL_N < 600mV: IISOLL_Nmin= .5 +0.6.6 V UISOLL_N UAVCC -1.2001 Dept.: AE/EIC3 Name: Ressel .2 ISOLL_N range expansion Offset voltage UOFF -20 40 mV UOFF -20 55 mV IISOLL -7 2 A Day: 25.3 Nominal inputs 7. 500mV < UISOLL_N < 600mV: Range 1: 540mV < UISOLL_N < 600mV .1 Normal nominal range Data sheet CY 220B Conditions ISOLL_A (start current level) ISOLL_H (holding current level) ISOLL_N (recharging current level) Specified range 0.3.0 V UISOLL_A UAVCC -1.6 V UISOLL_A 1V 0.6.6 V UISOLL_H 1V 1.6 UAVCC -1.25/31 Numeric value min typ max Unit Input voltage © All rights reserved by ROBERT BOSCH GMBH even in the case of patent applications.5 +0.6. (applies for UISOLL_N in range 1/2) UOFF dU/dt -20 +20 mV Switching speed 0. All rights of use such as copyright and right of disclosure reserved 0.BOSCH REUTLINGEN Parameter or Connection 7.3.10.1V 0.5 V Input current -2 -5 -5 -2 -2 A A A A A Level selection RCHG MODE Current level 0 0 1 0 1 X ISOLL_H ISOLL_A ISOLL_N direct access by RCHG and MODE Offset voltage UOFF = UUIMV .1V 1. UOFFmax=(3/8) x (540mV-UISOLL_N) + 40mV (UOFFmax= f(UISOLL_N).UISOLL (hysteresis not active) Nominal voltage on the current comparator (see also note chapter 3 Functional Description) Range expansion for UISOLL_N. (applies for UISOLL_N in range 1) Range 2: 500mV < UIISOLL_N < 540mV . UOFFmax=(1/3) x (600mV-UISOLL_N) + 20mV (UOFFmax= f(UISOLL_N).1 +0.(1 A/20mV x (600mV-UISOLL_N) -2 A (IISOLL_N= f(UISOLL_N).0 V UISOLL_H UAVCC -1.5 +0. (applies for UISOLL_N in range 2) Input current Total range 1/2.1V UISOLL IISOLL_N IISOLL_A IISOLL_H IISOLL_A IISOLL_H Symbol 1 279 923 504 Page.75 V/ s 7. 5 Power stage output Switching point Output voltage UVDD -0.5 nF Series resistor R = 50 9 Times measured at output YHSx YHS = HIGH for UUIMV > UISOLL_X YHS = LOW for UUIMV > UISOLL_X .: AE/EIC3 Name: Ressel .1 0 0 50 UVDD UVDD 0.HYSINT > 0.0 mA State LOW: 0 < IYHS 0.5 V Input current © All rights reserved by ROBERT BOSCH GMBH even in the case of patent applications.0 V from UYHSmax to UYHS = UYHSmin tfall1 tfall2 tdown UIHYS Symbol 1 279 923 504 Page.3 0.2 UAVCC -1.0 V from UYHSmin to UYHS = UYHSmax trise1 trise2 tON Falling edge from UYHSmax to UYHS = 1.6.BOSCH REUTLINGEN Parameter or Connection 7.HYSIN 5 50 12 100 % mV 7.19 Tolerance F .HYSINT State HIGH: 0 < IYHS .7 V V V V kHz Switching frequency Turn-on time 300 900 250 ns ns ns Turn-on delay Turn-off time 250 900 250 ns ns ns Turn-off delay Day: 25.HYSINT / HYSINT for UIHYS 1 V for UIHYS  1 V YHS1.2 V UIHYS UAVCC -1.1.5 mA 0 < IYHS .6.5 V N = UIHYS / HYSINT (with HYSINT as hysteresis voltage related to UISOLL_X) F = .4 Hysteresis level Input voltage Data sheet CY 220B Conditions IHYS Specified range Note: It must be ensured that it applies UISOLL_X .2 UVDD -1. YHS2 Measuring wiring Load capacitance C = 0.10.2001 Dept.4.5 mA 0 < IYHS 4. All rights of use such as copyright and right of disclosure reserved IIHYS N -5 +5 A Standardization of the hysteresis voltage 6.0 mA UYHS UYHS UYHS UYHS fS Rising edge from UYHSmin to UYHS = UVDD .0.5 V 0.26/31 Numeric value min typ max Unit 0. 0 mA State LOW: 0 < IYBOOS 0.: AE/EIC3 Name: Ressel .2001 Dept.7 Power stages Booster FET: Double Power stage output Data sheet CY 220B Conditions YBOOSx Symbol 1 279 923 504 Page.7 V V V V kHz Switching frequency Turn-on time Rising edge from UYBOOSmin to UYBOOS = UVDD .1.1 UYBOOS UYBOOS fS 0 0 50 UVDD UVDD 0.4.5 mA 0 < IYBOOS 4.5 mA 0 < IYBOOS .0 V from UYBOOSmax to UYBOOS = UYBOOSmin tfall1 tfall2 tdown 250 900 250 ns ns ns Turn-off delay Day: 25.1 © All rights reserved by ROBERT BOSCH GMBH even in the case of patent applications.BOSCH REUTLINGEN Parameter or Connection 7.5 nF Series resistor R = 50 9 Times measured at output YBOOSx State HIGH: 0 < IYBOOS . YBOOS2 Measuring wiring Load capacitance C = 0.27/31 Numeric value min typ max Unit 7.0.10.2 UYBOOS UVDD -1.2 0.7.0 V from UYBOOSmin to UYBOOS = UYBOOSmax trise1 trise2 tON 300 900 250 ns ns ns Turn-on delay Turn-off time Falling edge from UYBOOSmax to UYBOOS = 1. All rights of use such as copyright and right of disclosure reserved YBOOS1.0 mA Output voltage UYBOOS UVDD -0. 28/31 Numeric value min typ max Unit 7.5 UVDD -0.0 V from UYLSmin to UYLS = UYLSmax trise1 trise2 tON from UYLSmax to UYLS = 1.2 0. All rights of use such as copyright and right of disclosure reserved YLSxy Logic PON RG Low-side FET 7.3 Power stage output YLSxy Measuring wiring Load capacitance C = 15 nF Series resistor R = 50 9 Times measured at output YLSxy State HIGH: 0 < IYLS .8.0 V from UYLSmax to UYLS = UYLSmin tfall1 tfall2 tdown 200 0.8.2001 Dept.8 Power stage Low-side FET Eightfold Block diagram Data sheet CY 220B Conditions Inputs YSELxy Outputs: YLSxy Symbol 1 279 923 504 Page.1 0 0 50 1 2 2 3 500 400 1 500 UVDD UVDD 0.BOSCH REUTLINGEN Parameter or Connection 7.2 Power stage selection YSELxy Selection only possible if component is inactive (no injection or recharging) YSELx1 0 0 1 1 YSELx0 0 1 0 1 Power stage bank x YLSx1 YLSx2 YLSx3 YLSx4 7.7 V V V V kHz s s ns ns s ns Output voltage static Switching frequency Turn-on time Turn-on delay Turn-off time Turn-off delay Day: 25.8.4 UVDD -1.1 © All rights reserved by ROBERT BOSCH GMBH even in the case of patent applications.10.5 mA 0 < IYLS .0.1.0 mA State LOW: 0 < IYLS 0.4.0 mA UYLS UYLS UYLS UYLS fS from UYLSmin to UYLS = UVDD .: AE/EIC3 Name: Ressel .5 mA 0 < IYLS 4. 2) internal Threshold UAVCC 3.29/31 Numeric value min typ max Unit © All rights reserved by ROBERT BOSCH GMBH even in the case of patent applications.4 Power-On switch off Data sheet CY 220B Conditions Ensures that the outputs are switched off independently of the external system at undervoltage. All rights of use such as copyright and right of disclosure reserved PON also 7.: AE/EIC3 Name: Ressel .10.2 V Day: 25.8V the external reset signal (RES) must be applied stably so that the then active power stage can ensure switching-off.3 4. From UAVCC = 3.1.2001 Dept.1.8.BOSCH REUTLINGEN Parameter or Connection 7. (see Symbol 1 279 923 504 Page.1 and 7. 3 Ext.2 7.2001 Dept. SY Serial data input of the shift register for cascading Shift clock for reading out diagnosis information.3 + 10 pF V A Day: 25.9. active on the falling edge.10 0 0 0.9. wiring Inputs Data input DE Pull-up resistor DA DE. state is then: error-free Clock frequency Data validity after positive clock edge Data validity after SY = Low Wait time after SY = Low up to first positive clock edge Low time at SY to reset error memory tvSYL 1 s fT tvDG tvST 1 1 0. T.5 MHz s Clock T Synchronization SY s 7.10.9.: AE/EIC3 Name: Ressel .BOSCH REUTLINGEN Parameter or Connection 7. T Output: DA Symbol 1 279 923 504 Page.9 7. SY.6 mA UDA CDA State HIGH: State HIGH: UDA UDA . active on the rising edge Transfer signal for the shift register.30/31 Numeric value min typ max Unit © All rights reserved by ROBERT BOSCH GMBH even in the case of patent applications.4 V Output capacitance Input voltage Input current 15 UAVCC +0. Rising edge resets the registers.1 Diagnosis Block diagram Data sheet CY 220B Conditions Inputs DE.9. All rights of use such as copyright and right of disclosure reserved RDA DE SY T Interface DA 7.4 Output Output voltage DA State LOW 0 < IDA 1. BOSCH REUTLINGEN Parameter or Connection 7.... Bit SL Cylinder 1 Bit SL Cylinder 8 ..9.6 Shift sequence and coding DE Bit n DE Bit 1 Cylinder 8 Bit SL .5 Transmission protocol Error No error H L H L tvst T H L tvst DA H L Cylinder: B1 B2 B1 B2 B1 1 2 3 Data sheet CY 220B Conditions Symbol 1 279 923 504 Page...2001 Dept. All rights of use such as copyright and right of disclosure reserved SY 1/fT B1 B2 SL SL 8 1 2 SL D1 D2 D3 8 Register is reseted Time 7.: AE/EIC3 Name: Ressel .9. Cylinder 1 Bit 2 | Bit 1 Bit 2 | Bit 1 Bit 2 | Bit 1 Coding fast decay Error state No error fast decay error Bit SL H L Coding Short-circuit/drop in load Error state No error Drop in load Short-circuit to Ubat Short-circuit to GND Bit 2 | Bit 1 H|H H|L L|H L|L Day: 25.31/31 Numeric value min typ max Unit DE © All rights reserved by ROBERT BOSCH GMBH even in the case of patent applications.10...