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11Some Basic Issues and Applications of Switch-Mode Rectifiers on Motor Drives and Electric Vehicle Chargers C. M. Liaw and Y. C. Chang National Tsing Hua University, National Chung Cheng University Taiwan 1. Introduction Switch-mode rectifier (SMR) or called power factor corrected (PFC) rectifier (Erickson & Maksimovic, 2001; Mohan et al, 2003; Dawande & Dubey, 1996) has been increasingly utilized to replace the conventional rectifiers as the front-end converter for many power equipments. Through proper control, the input line drawn current of a SMR can be controlled to have satisfactory power quality and provide adjustable and well-regulated DC output voltage. Hence, the operation performance of the followed power electronic equipment can be enhanced. Taking the permanent-magnet synchronous motor (PMSM) drive as an example, field-weakening and voltage boosting are two effective approaches to enhance its high-speed driving performance. The latter is more effective and can avoid the risk of magnet demagnetization. This task can naturally be preserved for a PMSM drive being equipped with SMR. Generally speaking, a SMR can be formed by inserting a suitable DC-DC converter cell between diode rectifier and output capacitive filter. During the past decades, there already have a lot of SMRs, the survey for single-phase SMRs can be referred to the related literatures. Since the AC input current is directly related to the pulse-width modulated (PWM) inductor current, the boost-type SMR possesses the best PFC control capability subject to having high DC output voltage limitation. In a standard multiplier based highfrequency controlled SMR, its PFC control performance is greatly affected by the sensed double-frequency voltage ripple. In (Wolfs & Thomas, 2007), the use of a capacitor reference model that produces a ripple free indication of the DC bus voltage allows the trade off regulatory response time and line current wave shape to be avoided. A simple robust ripple compensation controller is developed in (Chen et al, 2004), such that the effect of double frequency ripple contaminated in the output voltage feedback signal can be cancelled as far as possible. In (Li & Liaw, 2003), the quantitative digital voltage regulation control for a zero-voltage transition (ZVT) soft-switching boost SMR was presented. As to (Li & Liaw, 2004b), the robust varying-band hysteresis current-controlled (HCC) PWM schemes with fixed and varying switching frequencies for SMR have been presented. In (Chai & Liaw, 2007), the robust control of boost SMR considering nonlinear behavior was presented. The adaptation of voltage robust compensation control is made according to the observed nonlinear phenomena. The development and control for a SRM drive with front-end boost SMR were presented in (Chai & Liaw, 2009). In (Chai et al, 2008), the novel random www.intechopen.com 252 Electrical Generation and Distribution Systems and Power Quality Disturbances switching approach was developed for effectively reducing the acoustic noise of a lowfrequency switching employed in a PMSM drive. In the bridgeless SMRs developed in (Huber et al, 2008), the higher efficiency is achieved by reducing loop diode voltage drops. In some occasions, the galvanic isolation of power equipment from AC source is required. In (Hsieh, 2010), a single-phase isolated current-fed push pull (CFPP) boost SMR is developed, and the comparative evaluation for the PMSM drive equipped with standard, bridgeless and CFPP isolated boost SMRs is made. From input-output voltage magnitude relationship, the buck-boost SMR is perfect in performing power factor correction control (Erickson & Maksimovic, 2001; Matsui et al, 2002). And it is free from inrush current problem owing to its indirect energy transfer feature. However, the traditional non-isolated buck-boost SMR possesses some limitations: (i) without isolation; (ii) having reverse output voltage polarity; (iii) discontinuous input and output currents; and (iv) having relatively high voltage and current stresses due to zero direct power transfer. As generally recognized, the use of high-frequency transformer isolated buck-boost SMR can avoid some of these limitations. The performance comparison study among Cuk, single ended primary inductor converter (SEPIC), ZETA and flyback SMRs in (Singh et al, 2006) concludes that the flyback SMR is the best one in the control performance and the required number of constituted component. In (Lamar et al, 2007), in addition to the power rating limits, the limitations of flyback SMR in PFC characteristics and output voltage dynamic response are discussed. In (Papanikolaou et al, 2005), the design of flyback converter in CCM for low voltage application is presented. In the power circuit developed in (Lu et al, 2003), a dual output flyback converter is employed to reduce the storage capacitor voltage fluctuation against input voltage and load changes of flyback SMR in DCM. Similarly, two flyback converters are also used in the flyback SMRs developed in (Zheng & Moschopoulos, 2006) and (Mishra et al, 2004) to achieve direct power transfer and improved voltage regulation control characteristics. As to the single-stage SMR developed in (Lu et al, 2008), it combines a boost SMR front-end and a two-switch clamped flyback converter. Similarly, an intermediate energy storage circuit is also employed. In (Rikos & Tatakis, 2005), a new flyback SMR with non-dissipative clamping is presented to obtain high power factor and efficiency in DCM. The proposed clamping circuit utilizes the transformer leakage inductance to improve input current waveform. In (Jang et al, 2006), an integrated boost-flyback PFC converter is developed. The soft switching of all its constituted switches is preserved to yield high efficiency. On the other hand, the improved efficiency of the flyback converter presented in (Lee et al, 2008) is obtained via the use of synchronous rectifier. It is known that digital control for power converter is a trend to promote its miniaturization. In (Newsom et al, 2002), the control scheme realization is made using off-the-shelf digital logic components. And recently, the VLSI design of system on chip application specific integrated circuit (SoC-ASIC) controller for a double stage SMR has also been studied in (Langeslag et al, 2007). It consists of a boost SMR and a flyback DC-DC converter. The latter is controlled using valley-switching approach operating in quasi-resonant DCM, which has fixed on-time and varying off-time according to load. As far as the switching control strategies are concerned, they can be broadly categorized into voltage-follower control (Erickson & Madigan, 1990) and current-mode control (Backman & Wolpert, 2000). The former belongs to open-loop operation under DCM, and thus the current feedback control is not needed. As to the latter, the multiplier-based current control loop is necessary to achieve PFC control. Basically, the commonly used PWM switching control approaches for a flyback SMR include peak current control (Backman & Wolpert, www.intechopen.com Some Basic Issues and Applications of Switch-Mode Rectifiers on Motor Drives and Electric Vehicle Chargers 253 2000), average current control, charge control and its modifications (Tang et al, 1993). In the peak current controlled flyback converter presented in (Backman & Wolpert, 2000), the proper choice of magnetizing inductance is suggested to reduce the distortion of input current. In (Tang et al, 1993; Larouci et al, 2002), after turning on the switch at clock, the switch is turned off as the integration of switch current is equal to the control voltage. As to (Buso et al, 2000), a modified nonlinear carrier control approach is developed to avoid the sense of AC input voltage. For easily treating the dynamic control of a single-stage PFC converter, its general dynamic modeling and controller design approaches have been conducted in (Uan-Zo-li et al, 2005). In addition, there were also some special control methods for flyback SMR. See for example, a simplified current control scheme using sensed inductor voltage is developed in (Tanitteerapan & Mori, 2001). In (Y.C. Chang & Liaw, 2009a), a flyback SMR in DCM with a charge-regulated PWM scheme is developed. For a SMR, the nonlinear behavior and the double-frequency voltage ripple may let the closed-loop controlled SMR encounter undesired nonlinear phenomena (Orabi & Ninomiya, 2003). The key parameters to be observed in nonlinear behavior of a SMR will be the loading condition, the value of output filtering capacitor and the voltage feedback controller parameters. In the flyback SMR developed in (Y.C. Chang & Liaw, 2009a), the simple robust control is proposed to avoid the occurrence of nonlinear phenomena, and also to improve the SMR operating performance. Random PWM switching is an effective means to let the harmonic spectrum of a power converter be uniformly distributed. Some typical existing studies concerning this topic include the ones for motor drives (Liaw et al, 2000), DC-DC converters (Tse et al, 2000), SMRs (Li & Liaw, 2004b; Chai et al, 2008), etc. In the flyback SMR developed by (Y.C. Chang & Liaw, 2011), to let the harmonic spectrum be dispersdly distributed, a random switching scheme with fixed turn-on period and varying turn-off period is presented. Although flyback SMR possesses many merits, it suffers from the major limitation of having limited power rating. To enlarge the rating, the parallel of whole isolated converter of flyback SMR was made in (Sangsun & Enjeti, 2002). In the existing interleaved flyback converters, the researches made in (Forest et al, 2007, 2009) are emphasized on the use of intercell transformers. However, the typical interleaving of flyback SMR requires multiple switches and diodes, which increases the cost and complexity of power circuit. For a singlephase flyback SMR, the major DC output voltage ripple is double line frequency component. Hence PWM interleaving control is not beneficial in its ripple reduction. Moreover, the power limitation of flyback transformer is more critical than the other system active components. It follows that sole parallel of transformer (Manh & Guldner, 2006; Inoue et al, 2008) will be the convenient way to enlarge the rating of whole flyback SMR. In (Y.C. Chang & Liaw, 2009b), the rating enlargement is made by parallel connection of transformer. For the power equipments with higher ratings, the three-phase SMR is a natural choice for higher rated plants. The systematic surveys for the existing three-phase SMRs can be found in (Hengchun et al, 1997; Shah et al, 2005). Similar to transformers, three-phase SMRs can also be formed using multiple single-phase SMR modules via proper connection (Hahn et al, 2002; Li & Liaw, 2004c). For simplicity and less stringent performance, the three-phase single-switch (3P1SW) SMR will be a good choice. In the 3P1SW SMR presented in (Chai et al, 2010), a robust current harmonic cancellation scheme and a robust voltage control scheme are developed. The undesired line current and output voltage ripples are regarded as disturbances and they are reduced via robust controls. In voltage control, a feedback controller is augmented with a simple robust error canceller. The robust cancellation www.intechopen.com 254 Electrical Generation and Distribution Systems and Power Quality Disturbances weighting factor is automatically tuned according to load level to yield compromised voltage and power quality control performances. Similar to single-phase bridgeless SMRs (Zhang et al, 2000; Youssef et al, 2008), there were also some researches being emphasized on the development of three phase bridgeless SMRs (Reis et al, 2008; Oliverira et al, 2009). In (Wang, 2010), a bridgeless DCM three phase SMR is developed and used as a front-end AC-DC converter for the SRM drive. As generally recognized, soft-switching can be applied for various converters to reduce their switching lossess, voltage stresses and electromagnetic interference. The applications of softswitching in 3P1SW SMRs have also been conducted in (Gataric et al, 1994; Ueda et al, 2002). For the 3P1SW SMR operating under DCM, only the zero-current switching (ZCS) at turnoff is effective in reducing its switching losses. In (Wang, 2010), the zero-current transition (ZCT) (Gataric et al, 1994) is utilized to the developed 3P1SW to achieve the ZCS of the main switch at turn-off. In realization, an auxiliary resonant branch is added, and the proper switching signals are generated for the main and auxiliary switches. The soft-switching can be achieved without adding extra sensors. And also in (Wang, 2010), the comparative performance evaluation is made for the SRM drive powered using standard 3P1SW SMR, ZCT 3P1SW SMR and bridgeless DCM three phase SMR. 2. Power factor correction approaches For facilitating the research made concerning power quality, the commonly referred harmonic standard is first introduced. Then the possible power factor correction approaches are described to comprehend their comparative features. 2.1 Harmonic ccurrent emission standard IEC 61000-3-2 (previously, IEC-555) is the worldwide applied harmonic current emission standard. This standard specifically limits harmonics for equipments with an input current up to 16A, connected to 50Hz or 60Hz, 220V to 240V single phase circuit (two or three wires). The IEC 61000-3-2 standard distinguishes the loads into four classes with different harmonic limits (Erickson & Maksimovic, 2001; Mohan et al, 2003). From the contents one can find that for the equipments below 600W, the harmonic limits of Class A are larger than those of Class D. This advantage will be more significant for lower power level. Taking the third harmonic under 100W as an example, the limit in Class A is 2.3A compared to 0.34A in Class D. Power converter can apply Class D or Class A regulation depending on its input current wave shape. The peaky line drawn current of a diode rectifier with larger filtering capacitor definitely belongs to Class D. However, if the simple low-frequency switching SMR (Chai et al, 2008) is employed, the modified line drawn current may fall into Class A and thus possesses the advantage mentioned above. 2.2 Possible power factor correction methods Depending on rating, schematic and control complexities, control performance and cost, there are many possible power factor correction approaches. The suited and cost effective one can be chosen according to the desired performance for specific application. 2.2.1 Passive filter Various series L-C resonant trap filters are connected across the line terminal to attenuate the specific order harmonics. This approach is simple, rugged, reliable and helpful in www.intechopen.com shunt and hybrid types (Erickson & Maksimovic.com . a controlled current is generated from the APF to compensate the load ripple current as far as possible. the line drawn power quality is improved. active power filter (APF) has the higher control ability to compensate load reactive and harmonic current components. it is bulky and cannot completely regulate nonlinear loads. However. (b) rectifier using valley-fill filter www. 1(b) (Farcas et al. Mohan et al.2 Active power filter Compared with passive filter. and it is needed the redesign adapted to load changes. 1(a) shows the sketched key waveforms of a full-bridge rectifier with large and small filtering capacitors. to reduce the rectified DC voltage ripple. 1. According to the types of connections.2. Taking the shunt type active power filter as an example.Some Basic Issues and Applications of Switch-Mode Rectifiers on Motor Drives and Electric Vehicle Chargers 255 reducing EMI. the effects of DC-link voltage ripple should be considered in making the control of the followed power stage. 2. Recently. 2001. active power filters can be categorized into series. Some passive PFC circuits: (a) rectifier with small filtering capacitor. However. One can be aware that if a very small filtering capacitor is employed. 2006). some plants employ the valley-fill filter as shown in Fig.3 Passive PFC circuits Fig. iac Load vac vdc t i ac Large C dc Cdc v ac vdc vac vdc iac t θc (a) Small Cdc Load vac iac vdc iac vac vdc t Valley − fill filter (h) Fig.intechopen. and thus the Class A rather than the Class D is applied.2. 2. 2003). The features of HF-SMR comparing to LF-SMR are: (i) more complicated in control. 2(a). a SMR is formed by inserting a suited DC/DC converter between diode rectifier and capacitive output filter. Hence. (b) sketched key waveforms for low-frequency switching. and the typical waveforms of iac using low-frequency (LF) and high-frequency (HF) switchings are sketched in Figs. The three-phase SMR will be a natural choice for larger power plants. (iii) lower efficiency. More detailed survey for SMRs will be presented in the latter paragraphs. 2(b) and 2(c). 2. under well regulated DC output voltage. boost or buck/boost: depending on the input-output relative voltage levels. Non-isolated or isolated: although the former SMR is simpler and more compact. or called silver box. www. the boosttype SMR possesses the best current control ability subject to having high DC output voltage level. Schematics a.com . Single-stage or multi-stage: generally speaking. the latter one should be used if the galvanic isolation from mains is required. Basically. c. Classification of SMRs Basically. the stage number should be kept as small as possible for achieving higher efficiency and system compactness. A single-phase boost-type SMR is shown in Fig. See for example. Boost-type SMR: (a) circuit. the flyback SMR is gradually employed in communication distributed power architecture as a single-stage SMR front-end.2.256 Electrical Generation and Distribution Systems and Power Quality Disturbances 2. the desired AC input line drawn power quality can be achieved. suited type of SMR and its control scheme should be chosen. (c) sketched waveforms for high-frequency switching 3. The existing SMRs can be categorized as: 1. to establish -48V DCbus voltage. power factor and output voltage. b. d. (ii) high control performances in line drawn current. iac vac iL iD L D vi S Load Cdc vdc (a) * iac iac vac iac vac ωt ωt θ d θ on (b) (c) Fig. Single-phase or three-phase: each category still possesses a lot of types of SMR schematics. single-stage SMR is preferable if possible.intechopen.4 Switch-mode rectifier The SMRs possess many categories in circuit topology and switching control approaches. Voltage buck. 2. c. 3. For a motor drive equipped with such SMR.voltage-follower control: without current control loop. and it can provide fault tolerant operation. However. (b) push-pull boost. (j) flyback SMR. 2005) possesses four operation quadrants and high flexibility in power conditioning control. and (l) isolated ZETA SMR. (i) and (k) possess the common features of having both continuous input and output currents. 257 One-quadrant or multi-quadrant: multiple quadrant SMR may possess reverse power flow from DC side to AC source. since its AC input current is directly related to the switched inductor current. It is simple but has limited power quality characteristics. (e) full-bridge buck. whereas (j) to (l) are isolated ones. Low-frequency control: only v-loop is needed and only one switching per half AC cycle is applied. the switch utilization ratio of this SMR is low.intechopen. Some commonly used boost-type SMRs are briefly introduced as followed. In addition to the SMRs of (j) to (l) mentioned above. Wang. see for example. (f) SEPIC SMR. (c) buck. and hence needing less stringent filter design requirement. and its control is complicated.standard control: it belongs to multiplier-based current-mode control approach with both v.. 3. Some comments are given for these circuits: (i) The SMRs of (a) to (i) belong to non-isolated types. High-frequency control. 3. (h) buck-boost cascade SMR. www. 2003. 2005).Some Basic Issues and Applications of Switch-Mode Rectifiers on Motor Drives and Electric Vehicle Chargers e. (k) isolated Ćuk SMR. (i) boost-buck hybrid SMR. (ii) Among the non-isolated SMRs. Shah & Moschopoulos. (iii) The circuits of (d).2. High-frequency control. f. 2010).1 Three-leg six-switch standard SMR The standard three-phase six-switch SMR (Hengchun et al. (e) SEPIC SMR with coupled inductors. it may possess regenerative braking ability. (g) ZETA SMR. 3. The complexities of schematic and control mechanism depend on the control ability and the desired performances. the additional fourth leg can be arranged to regulate the imbalance caused by source voltage and switching operation. buck-boost SMR and flyback SMR. (d) Ćuk SMR. 2010) include: (a) push-pull buck. the boost-type SMR possesses the best PFC control performance.com . 1997. (c) half-bridge buck. 2000) with eight switches.1 Single-phase SMRs The typical existing single-phase SMR circuits include: (a) boost SMR. Hard-switching or soft-switching: Similarly. 1997.2 Four-leg eight-switch SMR In the four-leg three-phase SMR (Zhang et al. Shah & Moschopoulos. some isolated SMRs specifically for PMSM drives (Singh B. (b) buck SMR. (d) half-bridge boost. (f) full-bridge boost. The pushpull boost SMR possesses excellent PFC control ability and high voltage boost ratio. only some specific SMRs operating in DCM possess this feature. & Singh S. switching stress and EMI of a SMR (Li & Liaw.2. such as the regenerative braking of a SMR-fed AC motor drive can be performed by sending braking energy back to the utility grid.2 Three-phase SMRs Detailed surveys for the existing three-phase SMR circuits can be referred to (Hengchun et al.and i.boost SMR. Control methods a.control loops. suited soft switching technique can also be applied to reduce the switching loss. b. However. three-phase SMRs can also be formed by suitable connection of multiple single-phase modules (Hahn et al. (v) Optimum PWM pattern. -0. Li & Liaw. It can be regarded as a simplified version of three singlephase PFCs connected to the same intermediate bus voltage. 0. 2009). and needs complicated power switch and two serially connected capacitors. it possesses the limits: (i) Having higher input peak current and switch stress. For Δ − connected three-phase SMR. However. 3.2. the robust current harmonic cancellation scheme is developed to yield improved line drawn power quality. …. (ii) Harmonic-injection approach. 3(b) (Reis et al. 3. Obviously. the remaining two modules can continuously provide DC power output subject to the reduction of rating. This converter uses fewer switches but possesses higher input current harmonics. 2002. the SMR uses three diodes and three switches rather than using diode bridge rectifier. The specific power switch (VUM 25-05) for implementing this SMR is avaiable from IXYS Corporation. To improve the input power quality of this three-phase single-switch SMR.95.com . and the current injection device is used to inject the third-harmonic currents in front of the diode bridge to improve the line drawn power quality. (ii) lower switch voltage rating.3 Three-switch Vienna SMR The Vienna three-phase SMR (Youssef et al.5vo ) providing larger switching control flexibility. n=1. It possesses only unidirectional power flow capability. it has only unidirectional power flow capability.6 Modular connection using single-phase SMRs Similar to three-phase transformers. when one module is faulted. see for example: (i) Fifth-order harmonic band-stop filtering. 2008) uses only three switches to achieve good current command tracking control.2.4 Single-switch SMR The three-phase single-switch SMR (3P1SW) possesses the simplest schematic and control scheme. 2. (ii) The input line current contains significant lower-frequency harmonics with the orders of 6n ± 1. (iii) Variable switching frequency controls.7 Bridgeless SMR As shown in Fig. typically the power factor is slightly higher than 0.5 vo . USA. (iv) Passive filtering and input current steering. Fig. 2004c). 3. and (iii) lower input current distortion. In (Chai et al. many existing researches have been conducted. this 3P1SW SMR possesses only one-quadrant capability. (iv) Similarly. 3(a) shows a Y-connected three-phase boost-type SMR. and the dominant ones are the 5th and 7th harmonics. one diode drop is www.intechopen. the PFC is naturally preserved without applying current PWM control. The major features of this SMR are: (i) three output voltage levels ( 0. 2008) is constructed by two serially connected DC/DC boost converter cells behind the rectifier. and (vi) Injected PWM robust compensation control.2. By operating it in DCM.5 vo rather than vo . (iii) The line drawn power quality is limited. vo .258 Electrical Generation and Distribution Systems and Power Quality Disturbances 3.2.5 Two-switch SMR This SMR (Badin & Barbi. 2010). 3. Thus suitably designed AC-side low-pass filter is required to yield satisfactory power quality. The boost converters are applied to shape the input currents. Oliverira et al. The robust cancellation weighting factor is automatically tuned according to load level.2. 2008. 2 Modified three-phase single-switch ZCT SMR In the modified 3P1SW ZCT SMR presented in (Das & Moschopoulos. 3.3 Three-phase three-switch bridgeless ZCT SMR As to the three-phase bridgeless ZCT SMR (Mahdavi & Farzanehfard. two additional power switches are employed. van io 1φ SMR Single-phase boost SMR power stage Lb1 D1 Cd vo Z L Load Kv SW vbn Control circuit n 1φ SMR SW Lb 2 SW D2 vcn Control circuit 1φ SMR SW Control circuit (a) van vbn n vcn ian L f vab ib1 Lb1 ibn L f C f C f ib 2 Lb 2 Cf ib3 Lb3 Cd icn L f vd Z L Load (b) Fig. The efficiency is limited. 2009). However.1 Classical three-phase single-switch ZCT SMR The classical 3P1SW ZCT SMR (Wang et al. The choice depends on the semiconductor devices to be used. 2007).3. the auxiliary circuit provides soft-switching condition through ZCT approach for all semiconductor devices without any extra current and voltage stress. Some existing softswitching SMRs are introduced as follows: 3. The addition of the transformer in the auxiliary circuit let the circulating energy from the auxiliary circuit be transferred to the output.intechopen.3.3. Two types of SMRs: (a) modular connection of three single-phase SMRs. On the other hand. The ZVS approaches are generally recommended for MOSFET. Hence it possesses higher efficiency than the classical type.3 Three-phase single-switch ZCT SMRs The soft-switching SMRs using auxiliary switching circuit can be generally classified into zero-voltage-transition (ZVT) and zero-current-transition (ZCT). However. 1994) is simple in structure and easy to realize. the auxiliary switch is not operated on ZCS at turn-off.com . 3. ZCS approaches are effective for IGBT. (b) bridgeless DCM three-phase SMR 3. www.Some Basic Issues and Applications of Switch-Mode Rectifiers on Motor Drives and Electric Vehicle Chargers 259 eliminated in each line-current path resulting to increase the efficiency compared to singleswitch SMR. 3. 4. The AC source input voltage is expressed as vac = Vm sin ωt = 2Vac sin ωt . Operation principle and some key issues of SMR 4. Conceptual configuration of a single-phase SMR Vd = Vac Rd Re (2) By neglecting the capacitor ESR rc in Fig. If the AC input current iac can be regulated to be sinusoidal and kept in phase with vac . one can obtain the following equivalent resistance transfer relationship: P = Pd iac ac + + vac DC/DC converter cell ii = iac iL iD iD p (t ) iS vi = vac Cd rc − − Pd = Po id + Rd vd − d (t ) Re vac iL vd Control scheme Fig. the current id (t ) can be found from (1): id ( t ) ≅ p(t ) Vac2 (1 − cos 2ωt ) = I d + id 2 = Vd ReVd (3) The AC component id 2 is approximately regarded flowing through the capacitor: Cd www. 4 can be expressed as: p(t ) = Pac = Vm2 V2 V2 V2 sin 2 ωt = m (1 − cos 2ωt ) = ac − ac cos 2ωt Re Re Re 2 Re (1) V2 V2 = d − ac cos 2ωt Δ Pd + Pac 2 Rd Re where Pd and Pac 2 respectively denote the output DC and the double-frequency power components. 4. the double line frequency output voltage ripple always exists for an actual SMR with finite value of output filtering capacitor. then the ideal SMR is similar to an emulated resistor with the effective resistance of Re viewing from the utility grid. From the average power invariant property in (1).260 Electrical Generation and Distribution Systems and Power Quality Disturbances 4. In reality. The output power p(t ) of the SMR shown in Fig.1 Single-phase SMRs Fig. This ripple may contaminate to distort the current command. and hence to worsen the power quality control performance.intechopen.com dΔvd (t ) V2 = − ac cos 2ωt dt ReVd (4) . 4 shows the conceptual configuration of a single-phase SMR. the threephase line drawn instantaneous power can be approximately expressed as: pac = vania + vbnib + vcnic = Vm2 sin ωt 1 1 [sin ωt − sin 5ωt − sin 7ωt ] + Re 5 7 Vm2 sin(ωt − 2π / 3) 1 1 [sin(ωt − 2π / 3) − sin 5(ωt − 2π / 3) − sin 7(ωt − 2π / 3)] + Re 5 7 Vm2 sin(ωt + 2π / 3) 1 1 [sin(ωt + 2π / 3) − sin 5(ωt + 2π / 3) − sin 7(ωt + 2π / 3)] Re 5 7 = (7) 3Vm2 3Vm2 − cos 6ωt Δ Pac + δ pac 2 Re 35 Re where Pac = average AC power. 5. Hence. 2010).2.1 Three-Phase Single-Switch (3P1SW) SMR For a well-regulated three-phase single-switch (3P1SW) DCM SMR shown in Fig.Some Basic Issues and Applications of Switch-Mode Rectifiers on Motor Drives and Electric Vehicle Chargers 261 Then the voltage ripple Δvd (t ) can be found by integrating the above equation: Δvd (t ) = 1 1 V2 Vac2 Vd 1 − ac cos2ωtdt = sin2ωt = sin2ωt  2ωC d Rd 2ωC dVd Re Cd ReVd (5) From (5) one can get the peak to peak value of output ripple voltage: Δvd = Vd (6) ω C d Rd 4. it can be regarded as a loss-free emulated resistor Re viewing from the phase AC source with line drawn current having dominant 5th and 7th harmonics (Chai et al. one has Po = Pd . By neglecting all power losses. i. 5.intechopen.com D + vd − ib3 Lb Lf Load Cd Lf b vcn + (8) ib1 Lb a + v vbn + a b 3Vm2 Vd2 = 2 Re Rd Rd . δ pac = ripple AC power.e.2 Three-phase SMRs 4. Conceptual configuration of a three-phase DCM SMR www. Pac = Pac = Pd van + Re i a n c Pd = Po iD Lf ib Cf Cf S ib 2 Lb Cf ic vd d (t ) Control scheme Fig.. For completeness. Chai & Liaw. 4. the AC charging current flowing the output filtering capacitor is: Cd 2Vd dvd =− cos6ωt 35 Rd dt (9) Thus one can derive the peak-to-peak output voltage ripple: Δvd = 2Vd 105ω RdC d (10) 4.5kHz . 2007. the sampling rates are selected according to the achievable loop dynamic response.1 Standard single-phase boost SMR 5. 2004a). In making DSP-based digital control. 2007. 2010).C. the three-phase line drawn currents will be balanced without harmonics. the ripples and ratings of the constituted components must be derived. The low-pass filtering cut-off frequencies for the sensed current and voltage are respectively set as f ci = 12Hz and f cv = 600Hz . Some typical examples can be referred to (Li & Liaw.2. H.1 System configuration The power circuit and control scheme of the developed SMR are shown in Fig.intechopen. 2009. In power circuit. www. Comparative evaluation of three single-phase boost SMRs Three single-phase boost SMRs are comparatively evalued their prominences experimentally in serving as front-end AC/DC converters of a PMSM drive. (b) the effects of DC-link ripples on the motor drive operating performance (Chai & Liaw. 6. 2011). the robust tracking error cancellation controls (Chai & Liaw. Chang & Liaw. Chai & Liaw. 5. Chang & Liaw. This control system belongs to multi-loop configuration consisting of inner RC-CCPWM scheme and outer voltage loop.1. 5. Other issues may include: (a) random switching to yield spread harmonic spectral distribution (Li & Liaw. Y. The feedback controller must first be properly designed considring the desired perfromance and the effects of comtaiminated noises in sensed variables. And the digital control sampling rates of the two loops are chosen as f si = f s = 25kHz and f sv = 2. wherein the two robust controllers are removed. 2009b) and SMR modules (Li & Liaw. the traditional diode rectifier is also included as a reference. 2009a) can further be added. 2004b. Y. in addition to the basic feedback controls.2 Three-phase three-switch and six-switch SMRs For the Vienna SMR and three-phase six-switch standard SMR with ideal current mode control. some key issues are indicated in Fig.com . from (7) one can find that the DC output voltage ripple will be nearly zero. Chai et al. 2008. 2009a.3 Some key issues of SMR Taking the DSP-based single-phase standard boost SMR as an example. and accordingly the components are properly designed and implemented. As to the control scheme. 6.C. 2003.C. For satisfying more strict control requirements. the sensed inductor current and output voltage should be filtered. Chang & Liaw. Chang & Liaw. Y.C. Hence. 2007. 2009).C. (c) rating enlargement via parallel connection of transformers (Y. Chang & Liaw.262 Electrical Generation and Distribution Systems and Power Quality Disturbances Then from (7) and (8). Vˆac .95 (Lagging).com .intechopen.min = 2Vac .1.min = 110V × 0. Key issues of a DSP-based single-phase standard boost SMR The system variables and specifications of the established SMR are given as follows: AC input voltage: Vac = 110V ± 10% / 60Hz . (v) the inductor current ripple is treated at ω t = 0. www. Vac .min = 140V . (iv) vac Δ 2Vac sinω t . 5. since at which the current ripple is maximum.5π . Boosting inductor Some assumptions are made in performing the inductor design: (i) continuous conduction mode (CCM). Pdc = 1500W . 6.9 = 99V . (iii) vdc = Vdc = 350V . (ii) all constituted components are ideal.2 Design of circuit components The design of energy storage inductor.1 × 2 = 171V ). Power factor: PF ≥ 0.Some Basic Issues and Applications of Switch-Mode Rectifiers on Motor Drives and Electric Vehicle Chargers 263 Fig. output filtering capacitor and power devices for this type of SMR are made according to the given specifications. Efficiency: η ≥ 90% . DC output: Vdc = 300V ~ 350V ( ≥ 110V × 1. Switching frequency: f s = 25kHz . a. 1.17V ω1 RLC d ω1C dVdc 2π × 60 × 2200 × 10 −6 × 350 (15) Power semiconductor devices The maximum current of the main switch S and the diode D is (iˆL )max + 0. the condition of boosting inductance L is obtained as: L≥ Vˆac .9 × 0.81A Vˆac .5π can be found as: D= Vdc − Vˆac . Vdc Pdc 1500 = = = 5. and 1. Accordingly. and their maximum voltage is 350V.9 (11) Let the inductor current ripple be: ΔiL = Vˆac . which is calculated from (11) and (12).6 350 (13) Hence from (12) and (13). 5. ESR= 62 Ω at 25kHz). 6 is chosen to be PI-type: Gci (s ) = K Pi + K Ii s (16) The upper limit of the P-gain is first determined based on large-signal stability at switching frequency: www.5ΔiL = 25A . The measured inductances using HIOKI 3532-50 LCR meter are L1 = (2.38A (12) The instantaneous duty ratio at ω t = 0.68 Ω at 25kHz) and L2 = (2.3 Control schemes Current controller: he current feedback controller Gci (s ) in Fig.978mH. ESR = 210m Ω at 60Hz. ESR= 196m Ω at 60Hz. Output capacitor By choosing the output filtering capacitor C d = 2200µ F/450V .41mH (14) The inductor L is formed by serially connected two available inductors L1 and L2 .intechopen.min D f s ΔiL = 1. IDM = 100A (pulsed)) and the fast diode DSEP60-06A (IXYS) (600V.264 Electrical Generation and Distribution Systems and Power Quality Disturbances The maximum inductor current occurred at ω t = 0.min DTs L ≤ 0.5π can be calculated as (iˆL )max = Pdc 1500 ×2 = × 2 = 23. Hence L = L1 + L2 =4. the MOSFET IXFK44N80P (IXYS) (800V. which is suited here. b.14mH. the peak-to-peak output voltage ripple can be found as: ΔVdc = c. and 1. ID= 44A (continuous).min Vdc = 350 − 140 = 0.11mH. ESR= 5.03mH.minη 110 × 2 × 0.1(iˆL )max = 2. average current IFAVM = 60A) are chosen for implementing the main switch S and all diodes respectively.92mH.com . Accordingly K Pi = 4. and the current command is set as I L* = IˆL × vac with IˆL = 8A . f s = 25kHz . Fig. 8. 6 are set as: Vdc = 300V . (iv) RL = 200Ω . Hence finally. the upper value of the K Pi can be found from (17) to be K Pi < K Pi = 8. System configuration in current loop gain measurement Magnitude (dB) 20.0 is set. 8 indicates that the crossover frequency is f c = 1. Gci (s ) = K Pi + 45000 K Ii =4+ s s (18) If the measurement of loop-gain frequency response is not convenient.0 400Hz 1kHz Frequency (Hz) Fig. or using trail-and-error approach to determine the integral gain. (vi) the current feedback controllers are set as K Pi = 4 and K Ii = 45000 . the magnitude frequency response of the loop gain LG(s = jω )Δ iL' (s) / ε i (s ) s = jω is measured using the HP 3563A control systems analyzer as shown in Fig. (ii) swept sine frequency range is from 400Hz to 11kHz. peak = 10mV . wherein Vinj denotes an injected swept sine signal.47kHz 0 -20. The measurement conditions are set as: (i) vinj . 7.0 1. (v) vac = 110Vrms .14mH and dvtri dt = 25kV/sec . (iii) the voltage loop is opened.47kHz < f s / 2 . one can also use the derived small-signal dynamic model (Chai & Liaw.intechopen.625 ( vac = 0 is set here). 7.Some Basic Issues and Applications of Switch-Mode Rectifiers on Motor Drives and Electric Vehicle Chargers 265 Vdc − vac dvcont dv = K Pi K i < tri dt L dt (17) The parameters of the developed SMR shown in Fig. Measured magnitude frequency response of current loop gain www. The measured result in Fig.04V/A . Fig. K i = 0. In making the determination of integral gain. L = 4. which is reasonable for a ramp-comparison current-controlled PWM scheme.com 11kHz . 8 shows the measured magnitude frequency response of the loop gain. Using the given data. 2007). 7W ) and ( RL = 200Ω .2W Vdc 300. 9(a) and 9(b). iL′ ).C.25A (a) 1ms vac 100V 20A iac (b) 5ms Fig. 9.11% PF (Lagging) 0. iac ) www. Measured results of the standard boost SMR at RL = 200Ω : (a) ( iL* .61% 94.992 0. Pdc =227. Good line drawn power quality can also be observed from Table 1. Measured steady-state characteristics of the standard boost SMR under two loads iL* i′L 6. And the measured ( iL* .6W 502.2V Pdc 227. Load cases Resistive load ( RL = 400Ω ) Resistive load ( RL = 200Ω ) Vac 110V/60Hz 110V/60Hz Variables Pac 241.8V 300. the measured efficiencies η . (b) ( vac .266 Electrical Generation and Distribution Systems and Power Quality Disturbances Voltage controller: Although the quantitative controller design can be achieved (Y. Chang & Liaw. iac ) under ( RL = 200Ω . Pdc =473. Pdc =473.intechopen.7W 473.31% 6.25% 6.com .6W ) are shown in Figs.6W ) are summarized in Table 1. 2009a). the PI voltage feedback controller is chosen trial-and-error here to be: Gcv (s ) = K Pv + 200 K Iv =8+ s s (19) 5.994 Table 1.1. iL′ ) and ( vac . The results indicate that the input current iac is nearly sinusoidal and kept almost in phase with the utility voltage vac .6W η THDi 94.4 Experimental results Let Vac =110 V /60Hz and Vdc = 300V . THDi of iac and PF at ( RL = 400Ω . 3 Control schemes Current controller: Following the similar process introduced in Sec. THDi of iac and PF at two loads. 6 with the two switches being respectively operated in positive and negative half cycles.2 are used here as the two bridgeless boost SMR inductors. 11(a) and 11(b).3. some assumptions are made: (i) all circuit www. Finally: Gci (s ) = K Pi + 2000 K Ii =3+ s s (20) Voltage controller: The PI voltage feedback controller is chosen to be: Gcv (s ) = K Pv + 200 K Iv =8+ s s (21) 5. it possesses the common mode EMI problem due to the large parasitic capacitance between the output and ground.0 is set and the integral gain is chosen via trial-and-error.5L S1 Vdc RL S2 Fig.1. Schematic and control scheme of the developed bridgeless boost SMR 5.2. the boosting inductor is divided into two equal inductors. L1 = L2 = 0.3 Current-Fed Push-Pull (CFPP) isolated boost SMR 5.Some Basic Issues and Applications of Switch-Mode Rectifiers on Motor Drives and Electric Vehicle Chargers 267 5.2.1. Hence.5L . which provides a relatively low impedance path. 9 and are not repeated here. 5.1 System configuration and operation The power circuit and control scheme of the CFPP isolated boost SMR are shown in Figs.2.e. Pdc Pac iac 0. Although the efficiency of bridgeless SMR can be slightly increased. i.625 .1 System configuration Fig. 5. K Pi = 3.3 one can get K Pi < K Pi = 8. From Tables 1 and 2 one can find the slight higher efficiencies being yielded by the bridgeless SMR.2 Circuit design The specifications are identical to those listed above.intechopen. The two inductors L1 and L2 in Sec.2. Table 2 lists the measured efficiencies η . and they are placed at AC source side.2 Bridgeless boost SMR 5.com . 10 shows the bridgeless boost SMR.. 10. 5.4 Experimental results The measured key waveforms are almost identical to Fig. To reduce this problem. its control scheme is identical to those shown in Fig. In making the analysis.5L iL vac Cdc 0. 5. only a brief description and some key formulas are given here. (iv) the circuit is operated under CCM.95 (Lagging).9W η THDi 95. Efficiency: η ≥ 75% . (iii) vin = vac = Vmsinω t = 2Vac sinω t . S4 and C a are neglected. Measured characteristics of the developed bridgeless boost SMR under two loads 5. The gate signal of S2 is generated from S1 by shifting 180° . duty cycle must be greater than 0.intechopen.6V 300. DC output: Vdc = 300V ~ 350V ( ≥ 110V × 1.5W 475.996 Table 2.88% 6. During analysis.8 2 × 350 (24) . (ii) the active voltage clamp circuits including S3 .5) Ns ≤ 1 Np 2 × 110 (23) Thus the turn ratio can be found to be n ≤ 1. By choosing n = 1 . Pdc = 1200W .5π can be found from (22) as: Dmax = 1 − www.66% 6. Load Cases Vac Resistive load ( RL = 400Ω ) 110V/60Hz Resistive load ( RL = 200Ω ) 110V/60Hz Pac 233.1 × 2 = 171V ). the variations of Vdc and Vac should be considered in making the derivation of component ratings.11% PF (Lagging) 0. Detailed analysis process can be referred to (Hsieh.max =1− 140 = 0. Specifications The system variables and specifications of the established SMR are given as follows: AC input voltage: Vac = 110V ± 10% / 60Hz .268 Electrical Generation and Distribution Systems and Power Quality Disturbances components are ideal. Moreover. the voltage transfer ratio from vin to Vdc can be derived as: Vdc N s 1 = vin N p 2(1 − D) (22) It should be noted that the duty ratio D is a time varying function for the constant Vdc and time varying input DC voltage vin = vac . In the established current-fed push-pull SMR. the duty ratio DΔ ton / Ts ( 0. and from (22): nΔ 300 2(1 − 0.2V Pdc 223. Boosting inductor To provide magnetization path of the inductor.3.02% 95.5W Variables Vdc 300.1W 497.min 2Vdc . the instantaneous duty ratio at ω t = 0.935 .5 at any time. PF ≥ 0.com Vˆac . b.2 Circuit design a. Switching frequency: f s = 25kHz . 2010).5 < D < 1 ) is set.996 0. 5)Ts L ≤ 0.75 (25) Let the inductor current ripple be: ΔiL = Vˆac .2856A (26) The condition of boosting inductance L is obtained as: L≥ Vˆac . The current-fed push-pull isolated boost SMR: (a) power circuit.735mH (27) The inductances of an available inductor measured using HIOKI 3532-50 LCR meter are L = (2.intechopen.9 × 0.03mH.min (D − 0.5π can be calculated as: (iˆL )max = Pdc 1200 ×2 = × 2 = 22.minη 110 × 2 × 0.856A Vˆac .5) f s ΔiL = 0. ESR = 210m Ω at 120Hz) and (1.978mH.68 Ω at 25kHz). 11.Some Basic Issues and Applications of Switch-Mode Rectifiers on Motor Drives and Electric Vehicle Chargers 269 Fig. (b) control scheme The maximum inductor current occurred at ω t = 0. Hence this www.1(iˆL )max = 2. ESR = 5.min (D − 0.com . Accordingly. Transformer design The AMCU series UU core AMCU-80 manufactured by AMOSENSE Cooperation is used to wind the push-pull transformer here.5ΔiL = 22.856 + 0.5 . The measured parameters of the designed transformer at f = 25kHz using HIOKI 3532-50 LCR meter are: Lm = 1. the problems lie in having lower efficiency and increased voltage stress of power switches. S2 ) but with a small dead-time.max = (iˆL )max + 0. the inductor current ripple given in (26) becomes ΔiL = 0.13V ω1 RLC d ω1C dVdc 2π × 60 × 2200 × 10 −6 × 350 (28) Power semiconductor devices From (25) and (26). Active voltage clamp As generally known that a current-fed push-pull boost converter may possess serious problems due to the voltage spikes caused by transformer leakage inductances. ID= 40A ( 100°C . average current IFAVM = 60A) are chosen for implementing the switches and all the diodes.25T = 0. respectively.com . f.85A. 2010) is used to solve this problem. IDM = 105A (pulsed)) and the fast diode DSEP60-06A (IXYS) (600V. Sangwon & Sewan.978mH at f = 25kHz. The designed results (Hsieh.086mH . c. Lls 1 = 10. the deadtime td = 1µ s is set here. S4 ) and one capacitor C a . Output capacitor The output filtering capacitor C d = 2200µ F/450V is chosen to yield the following peak-topeak voltage ripple: ΔVdc = d.5T . the active voltage clamp circuit consists of two auxiliary switches ( S3 . the turns of the primary side can be expressed as follows: Np = n × Vdc . 11(a). 2008. Ts = 40 μs .max =350V. IDM = 105A (pulsed)). As shown in Fig. S3 and S4 are IGBT K40T120 (Infineon) (1200V. continuous).838μH . and N p = N s = 32 are chosen here.max (1 − Dmin )Ts Ae × ΔB (29) The known parameters in (29) are: n = 1 .21cm 2 . continuous). Using the inductance of L = 1. The active voltage clamp circuit (Kwon. Ae = 5. The used components for active voltage clamp circuit are: C a = 0. Dmin = 0.795 μH . Lls 2 = 8.4Ω .5 × 0.28A . ESR = 20. 2010) are summarized as followed. the maximum current flowing through the switches and all the diodes can be calculated as iS . 11.85 = 23. the IGBT K40T120 (Infineon) (1200V. B = 0.270 Electrical Generation and Distribution Systems and Power Quality Disturbances inductor is suited and employed here.25T is set.87 is found. Hence N p = 26. These two auxiliary switches are switched in complement fashion to the two main switches ( S1 .4 μF/1000V .intechopen. Vdc Pdc 1200 = = = 4. ID= 40A ( 100°C . where Lls 1 and Lls 2 denote the leakage inductances of the two transformer primary windings. Vdc . The maximum voltage for the switches is 700V which is found from Fig. From Faraday’s law. To lower the core loss. and thus the maximum flux density variation will be ΔB = 2 × 0. and voltage rating for the load side rectifier diodes is 350V. www. e. A step load resistor change of RL = 300 Ω → 200 Ω ( ΔPdc = 149.C.0V .27.5 + s s (30) The robust current tracking error cancellation controller shown in Fig.11(b) is not applied here. For the ease of implementation. one can obtain the estimated dynamic model parameters are obtained: a = 7. the PI voltage feedback controller is chosen: Gcv (s ) = K Pvs + K Iv s (31) The quantitative design technique presented in (Y. 2009a) is applied to here to find the parameters of Gcv (s ) to have the desired regulation response shown in Fig.com .Some Basic Issues and Applications of Switch-Mode Rectifiers on Motor Drives and Electric Vehicle Chargers 271 5. 12 to be ( −4. K pl =0. 12 are: ( t1 = t f . and the SMR is normally operated at the chosen operating point ( Vdc* = 300V . 2009a). Chang & Liaw. Pdc = 302. The desired voltage response due to a step load power change is also sketched in Fig. ( t3 = tre . which possesses the key features: (i) no overshoot and steady-state error.5ms).3W .3.00084542 b. Following the quantitative design process presented in (Y.002V/V .3W . ΔVdc 1 = 0. RL = 300Ω ).1500ms).95 . Current controller Similarly. b = 2975. Chang & Liaw. a. with t f = fall time. 2009a) one can solve to obtain: www. ΔVdc 2 = Δvom ). tre = 800 ms for a step load power change of ΔPdc = 149. (ii) the typical key response points indicated in Fig. Pdc = 302. ΔVdc 3 = 0. the voltage regulation control specifications are defined as: ΔVdc .5 s be arbitrary set.5 is set. through careful derivation (Y. 12. The details are neglected and only a brief description is given here.71 . Accordingly K Pi = 0. ii.55ms) and ( −1V .1W ) is applied and the response of Vdc is recorded.intechopen. the upper value of K Pi can be found from (17) to be K Pi < K Pi = 1. Then the integral gain is chosen via trial-and-error.1Δvom ).C. ( t2 = tm .8W → 452. Dynamic model estimation i.53 ( Vdc is replaced by vp and vac = 0 is set). By choosing three typical response points as indicated in Fig.max = 5. the SMR is reasonably represented by a first-order process in main dynamic frequency range.6V . Voltage controller The voltage loop dynamic model and the proposed feedback control scheme are shown in Fig. Δvom = maximum voltage dip. 12.C. b.8W ). tm = the time at which maximum dip being occurred.3 Controller design of CFPP Isolated boost SMR a. ( −7.4V . and finally it is found that: Gci (s ) = K Pi + 2500 K Ii = 0. Chang & Liaw.5Δvom ). (32) Controller design At the given operating point ( Vdc = 300V . tre = restore time. The voltage feedback sensing factor is set as K v = 0. 12. Let the Gcv (s ) = K Pv + K Iv s = 6 + 10. 1W . Pdc = 623. Pdc = 234. and the PI feedback and robust controls are all operated.272 Electrical Generation and Distribution Systems and Power Quality Disturbances Gcv (s ) = K Pv + 33. The established current-fed push-pull boost SMR control scheme and the desired regulation response c.8878 K Iv = 10.5W ) are www. Hence the original voltage error can be reduced by a factor of (1 − Wd ) within main dynamic frequency range. Fig. 11(b). ( RL = 200 Ω . a robust compensation control command Vdcr is generated from the voltage error ε v through a weighting function Wd (s ) = Wd /(1 + τ d s ) with Wd being a weighting factor.6W ). Pdc = 465. Pdc = 908. Vdc* = 300V ).5 ) robust control due to a step load power change of ΔPdc = 149. The selection of Wd must be made considering the compromise between control performance and effects of system noises.3W ( Pdc = 302. 0 ≤ Wd < 1 1 + τ ds (34) where the approximation is made for the main dynamic signals.com . ( RL = 133Ω . The low pass filter process with cut-off frequency f cd = 1 /(2πτ d ) = 120Hz ( τ d = 0. Let Vac =110V/60Hz and Vdc* =300V. From Fig. 11(b) one can derive that the original voltage tracking error ε v = Vdc* − Vdc′ will be reduced to Vdc* − Vdc' = (1 − Wd )ε v ≈ (1 − Wd )ε v .0013263 ) is used to reduce the effects of high-frequency noises on dynamic control behavior.8W ) and ( RL = 100Ω . 2007) is applied here to enhance the SMR voltage regulation control robustness.8W → 452. Figs.0036 + s s (33) The simulated and measured output voltage responses (not shown here) are confirmed their closeness and satisfying the specified control specifications. 12.intechopen. Robust voltage error cancellation controller A simple robust voltage error cancellation controller (RVECC) presented in (Chai & Liaw. The results show that they are very close and the effectiveness of robust control in the improvement of voltage regulation response. 13(a) and 13(b) show the simulated and measured output voltage responses by PI control without ( Wd = 0 ) and with ( Wd = 0. the measured steady-state characteristics at ( RL = 400 Ω .8W ). In the * control system shown in Fig. this is mainly due to the addition of isolated HF transformer. Vdc* = 300V ): (a) Wd = 0 .4 Evaluation for the PMSM drive with different front-end AC/DC converters Figs.5W ) are shown in Figs. Measured (upper) and simulated (lower) Vdc by PI control without ( Wd = 0 ) and with ( Wd ≠ 0 ) robust control due to a step load power change of ΔPdc = 149. Measured steady-state results of the current-fed push-pull boost SMR at Vac = 110V/60Hz and RL = 100Ω : (a) ( iL* .1W . iac ) under ( RL = 100Ω . 14. iL ) and ( vac . 15(a) to 15(d) show the standard PMSM drives equipped with different front-end AC/DC converters. (b) ( vac .intechopen. iac ) 5. Pdc = 908.25A (a) 1ms vac 100V 30A iac (b) 5ms Fig. 13.5 iL′ iL* 6. the following inputs are set: (i) Diode www. From the results. In making experimental works. And the measured ( iL* .Some Basic Issues and Applications of Switch-Mode Rectifiers on Motor Drives and Electric Vehicle Chargers 273 summarized in Table 3. iL′ ). one can find that the developed SMR possesses good power quality control performances under wide load range. The lower efficiencies compared with the previous two types of SMRs are observed. 300V Vdc Vdc 300V 5V 300V Vdc 5V Vdc 300V 5V 5V (a) (b) 500ms 500ms Fig.com . (b) Wd = 0.3W ( Pdc = 302. respectively.14(a) and 14(b).8W → 452. 5L iL Vdc Pac ebs ics rs Ls ecs Encoder signals PL PMSG n Te ωr RL EC PMSM T5 T3 ias Cd T4 Ls rs ibs b rs Ls Dynamic load eas PL TL ebs PMSG n c S2 S1 Ls (b) a 0. 15.intechopen.com . (c) bridgeless boost SMR front-end.274 Electrical Generation and Distribution Systems and Power Quality Disturbances rectifier: Vac = 220V/60Hz . (ii) SMRs: Vac = 110V/60Hz .5L rs Pdc id T1 vac ibs TL T2 N Bridgeless boost SMR front-end Dynamic load eas Ls rs ics rs Ls ecs Te ωr RL T2 T6 Encoder signals N EC (c) Current-fed push-pull boost SMR front -end S1 S3 Pac iac iL Pdc N p : Ns T1 Lm D1 ias a L vL PMSM T5 T3 D2 Ca Cd S4 S2 b Vdc c Lm vac D3 D4 T4 rs Ls Dynamic load eas ibs rs Ls ebs ics rs Ls ecs PL TL PMS G n Te ωr RL T2 T6 N Encoder signals EC (d) Fig. Vdc = 300V with satisfactory regulation control. (b) standard boost SMR front-end. the switching frequency f s = 25kHz is set. (d) current-fed push-pull boost SMR front-end www. The measured results are summarized as follows: Pdc iac PMSM T5 T3 T1 Pac a Vdc vac b Cd c T4 ias rs Ls eas ibs rs Ls ebs ics rs Ls ecs Dynamic load PL TL PMSG n Te ωr RL T2 T6 Encoder signals N EC (a) Standard boost SMR front-end iL L Pac Pdc id iac ias a S vac PMSM T5 T3 T1 D is Vdc b Cd c T4 T6 iac 0. Vdc will vary with loading conditions. The circuit configuration of established standard PMSM drive with SMR front-end: (a) diode rectifier front-end. 16(b). iac ) at ( ωr* = 2000rpm . ωr* = 3000rpm .57% 83. i′as ) and ( vac . This is mainly due to the insufficient DC-link voltage ( Vdc = 278.4. 16(a) and Fig. 16(b) indicate that large tracking errors exist in speed and phase current under ωr* = 3000rpm .45% 83. RL = 44. RL = 44. the peaky iac leads to poor power factor and high THDi .62% 6.4W 697. However.5V 300. ias* . i′as ) and ( vac .4V ) established by rectifier for encountering the back-EMF effect.( H A .8V 300.com .7Ω ).997 0.998 0.7Ω ) www.8W 908. and the corresponding steady-state characteristics are listed in Table 4.998 0.8W 623.7Ω ) are shown in Fig. ωr ).998 Table 3.6W 465.57% 89. RL = 44.4W 1082.1 Diode rectifier front-end The measured ( ωr* . ias* . ( H A . Measured ( ωr* .2W Pac Vdc 301. ωr* 3000rpm ωr* 2000rpm ωr 100rpm 100rpm ωr 5ms 5ms 4A i*as i*as HA HA 4A i′as i′as 5ms 5ms vac vac 200V 10A iac (a) 5ms 200V 10A iac (b) 5ms Fig.Some Basic Issues and Applications of Switch-Mode Rectifiers on Motor Drives and Electric Vehicle Chargers Load Cases Variables Vac 275 Resistive load ( RL = 400Ω ) Resistive load ( RL = 200Ω ) Resistive load ( RL = 133Ω ) Resistive load ( RL = 100Ω ) 110V/60Hz 110V/60Hz 110V/60Hz 110V/60Hz 298. In addition.5W η 78.3V Pdc 234. iac ) of the standard PMSM drive with diode rectifier front-end at: (a) ( Vac = 220V/60Hz .83% 6.2V 300.7Ω ) and ( ωr* = 3000rpm .53% 3.95% THDi 8. Measured characteristics of the current-fed push-pull boost SMR under four loads 5.82% PF (Lagging) 0.intechopen. ωr* = 2000rpm . (b): ( Vac = 220V/60Hz . RL = 44. One can notice the normal operation of the PMSM drive under ωr* = 2000rpm . the results in Fig. ωr ).6W 557. 16. 86% 65.9V 278. Fig. (iii) CFPP boost SMR: Fig.2 Three boost SMR front-ends (i) Standard boost SMR: Fig. ωr = 2400rpm. iac ) of the standard PMSM drive with standard boost SMR front-end at: (a) ( Vac = 220V/60Hz . ωr* = 2000rpm . 19(a). RL = 44. the close winding current tracking performances are obtained. RL = 44.intechopen. ( H A .95% 72. Further observations find that: (i) the efficiencies of bridgeless SMR are slightly higher than those of standard boost SMR.com . Measured characteristics of the standard PMSM drive fed by diode rectifier frontend under two speeds ( Vac = 220V/60Hz . (ii) Bridgeless boost SMR: Fig. ωr* = 3000rpm .5W 969.276 Electrical Generation and Distribution Systems and Power Quality Disturbances Cases Variables Vac Pac ωr* = 2000rpm ωr* = 3000rpm 220V/60Hz 220V/60Hz 527. ωr ). 17(b) and Table 5. and thus good line drawn power quality characteristics are achieved. i .4. ωr ).7W 706.3W η THDi 69. RL = 44. ′ ) and Vdc of the whole PMSM Fig. (ii) the efficiencies of the CFPP SMR are lower than the other two SMRs. This is mainly due to the increased losses in the high-frequency transformer. RL = 44. 18(b) and Table 6. 17(a). Fig.7Ω ) 5. iqs drive with CFPP boost SMR front-end at ( Vdc = 300V . Fig. 20(b) show the measured ( ωr* .7Ω ) www. * ias * ias i′as i′as 4A 4A 5ms 5ms vac vac 100V 10A iac (a) * r 5ms * as 100V 20A iac (b) 5ms Fig.54% PF (Lagging) 0. Measured ( ω .4W Vdc 295. (b): ( Vac = 220V/60Hz . i′as ) and ( vac . ( iqs* .4V Pdc 366. 20(a) and Fig.7Ω .7Ω ) due to a step speed command change of 100rpm and due to a step load resistance change from RL = 75Ω to RL = 44. 18(a). 17.52% 72. The results indicate that good speed tracking and regulating responses are obtained by the developed SMR-fed PMSM drive. 19(b) and Table 7. The results indicate that for all cases.7Ω ). And the DC-link voltages Vdc are well regulated under these two cases.758 Table 4.751 0. 998 0.3V Pdc 365.9W 791.95% 8.996 Table 6.2W η THDi 66.3W Vdc 300. RL = 44.1V Pdc 364.998 0.18% 7. (b): ( Vac = 220V/60Hz .022% PF (Lagging) 0.7Ω ) Cases Variables Vac ωr* = 2000rpm ωr* = 3000rpm 110V/60Hz 110V/60Hz Pac 543.4V 300. Measured ( ωr* . ias* .7Ω ) * ias * ias i′as i′as 4A 4A 5ms 5ms vac vac 100V 10A iac (a) 5ms 100V 20A iac (b) 5ms Fig. 18.997 Table 5. ωr* = 3000rpm .493% 69.08% 7. Measured characteristics of the standard PMSM drive fed by bridgeless boost SMR front-end under two speeds ( Vdc = 300V .3W η THDi 67.6V 300.085% PF (Lagging) 0. ωr* = 2000rpm . i′as ) and ( vac . ωr ). iac ) of the standard PMSM drive with bridgeless boost SMR front-end at: (a) ( Vac = 220V/60Hz .4W Vdc 300.9W 1142.com .Some Basic Issues and Applications of Switch-Mode Rectifiers on Motor Drives and Electric Vehicle Chargers Cases Variables Vac 277 ωr* = 2000rpm ωr* = 3000rpm 110V/60Hz 110V/60Hz Pac 546. Measured characteristics of the standard PMSM drive fed by standard boost SMR front-end under two speeds ( Vdc = 300V . ( H A .238% 69.7Ω ).07% 8.intechopen. RL = 44. RL = 44.7Ω ) www.5W 1145. RL = 44.8W 790. 3W 792.7Ω www. RL = 44. ωr ).7Ω ): (a) due to a step speed command change of 100rpm: (b) due to a step resistive load change from RL = 75Ω to RL = 44.com . RL = 44. 19.8W 1231.8W Vdc 301.7Ω ).998 Table 7.intechopen. ( H A . ωr* = 2400rpm . iqs push-pull boost SMR front-end at ( Vdc = 300V .10% 3.1W η THDi 61.7V Pdc 365. RL = 44.30% 4. i′as ) and ( vac .7Ω ) ωr 2400rpm ωr* 50rpm ωr 2400rpm 50rpm 10ms * iqs 200ms * iqs i′qs i′qs 2A 1A 20ms 300V 50ms Vdc 300V Vdc 10V (a) * r 100ms * qs 10V (b) 500ms ′ ) and Vdc of the whole PMSM drive with current-fed Fig.02% PF (Lagging) 0.278 Electrical Generation and Distribution Systems and Power Quality Disturbances * ias * ias i′as i′as 4A 4A 5ms 5ms vac vac 100V 10A iac (a) (b) 5ms * r 100V 20A iac 5ms * as Fig. 20. ( i . (b): ( Vac = 220V/60Hz .7Ω ) Cases Variables Vac ωr* = 2000rpm ωr* = 3000rpm 110V/60Hz 110V/60Hz Pac 597. Measured ( ω . i . ωr* = 3000rpm .90% 64. Measured characteristics of the standard PMSM drive fed by current-fed push-pull boost SMR front-end under two speeds ( Vdc = 300V . RL = 44.998 0. Measured ( ω . iac ) of the standard PMSM drive with current-fed push-pull SMR front-end at: (a) ( Vac = 220V/60Hz . ωr ).2V 300. ωr* = 2000rpm . Input filter: C f = 3. (2) DC output: Vo = Vd = 400V. 3P1SW SMR: The ratings of the 3P1SW SMR are: (1) AC input: three-phase.θ on . 6. SRM drive: The SRM drive is manufactured by TASC Drives Ltd.679 µ H .. 400V. In this section. a SMR based electric vehicle battery charger and a flyback SMR based battery plug-in charger are presented to further comprehend the advantages of using SMR. b. 8/6 pole. which is rated as 4phase. VL = 220 ± 10% Vrms .Some Basic Issues and Applications of Switch-Mode Rectifiers on Motor Drives and Electric Vehicle Chargers 279 6. The output filtering capacitor is C o = 2000 µ F / 500V with the corresponding peak-to-peak DC output voltage ripple: Δvo = 2Vo /(105ω RoC o ) = 0. The lower switches S1 to S4 are in charge of commutation. pd D van vbn n vcn vab S A D1 ib1 Lb ia L f D3 D2 SB SRM Lf ib 2 Lb ib Cf ic L f ib3 Lb S Cd vo = vd W1 W2 i1 i2 W4 W3 S1 HA S1 S 2 S3 S 4 S * vor vo Kv 1 +τvs + Σ v′o A/D H LF (s ) wv (s ) + v*o1 vo* + vc − Σ PWM modulator vtri εv Feedback controller Gcv + vc1 vc Σ − vch ω r∗ DSP Notch filter ia Ki 1 + τis A/D e −1 / 180 s e −1 / 90 s ibh ich + − ωr' ∑ Hall signals S1 S 2 S3 S 4 S A S B Isolated gate drivers S1 S 2 S 3 S 4 S A S B PIO S1 S2 S3 S4 i* ~ i* winding 1 4 ε ω Speed I c Phase current control i1′ ~ i4′ command scheme generator θr N os . The energy storage inductor is Lb = 15.459 µ H (10 kHz ) . 21. 1500rpm.1. The two power stages possess the following key features: iD 3P1SW SMR Front-end Switched reluctance motor drive id . 60Hz. Its windings are excited by a 2(n+1) Miller’s converter from the SMR established DC-link voltage.intechopen.253V .1 System configuration Fig. a SMR fed switched-reluctance motor (SRM).com .θ ff Randomband HCC PWM schemes A/ D (Commutation tuning) iah H NF (s ) SRM drive control scheme S4 S2 Commutation logic generator LPF Threephase rectification ih wh (s ) Robust current harmonic compensation scheme RL H AH B DB HB Ro = Rd Robust error canceller ωr i4 i3 S3 PMSG EC − DA Robust voltage control scheme D4 + Cf Cf d / dt θr Encorder interface i1′ ~ i4′ EC A. www. 2010). A three-phase single-switch SMR fed drive and its control scheme a.1 Switch-Mode Rectifier fed Switched-Reluctance Motor drive 6.3 µ F and L f = 123. Po = 4 kW (Ro = 40Ω ) . 4kW. and the upper switches SA (phase windings 1 and 3) and SB (phase windings 2 and 4) are used for performing PWM switching control. B HA HB Fig. 21 shows the power circuit and control scheme of a three-phase single-switch (3P1SW) fed SRM drive (Chai et al. Some specific applications of Switch-Mode Rectifier The applications of three types of single-phase SMRs as the AC-DC front-end converters of PMSM drives and their comparative evaluation have been introduced in the previous section. 280 Electrical Generation and Distribution Systems and Power Quality Disturbances 6. b. the measured DC-link voltages vd (t ) and vibrations a(t ) using different AC/DC front-end converters are compared in Figs.82% ). ωr = 1500rpm . Pd = 2135W ). The results show that the DC-link voltage ripple and the stator vibration using conventional rectifier as a front-end (measured line power quality parameters are PF = 0. Then an injected PWM robust compensating control voltage vch = wh (s )ih is yielded. At the operation condition of ( Vd = 400V .3 Performance evaluation The SMR fed SRM drive is shown in Fig. Larger performance improvement is achieved by applying the robust voltage control scheme with the weighting factor being automatically set to be Wv = 0. The weighting factor in the weighting function wv (s ) is updated according to load level. (b) a(t ) www.1. The undesired line current and output voltage ripples are regarded as disturbances and they are reduced via robust controls. the dynamic responses of the followed SRM drive are enhanced. 6.com .968. a(t ) vd (t ) SMR (PI and robust control s) + SRM SMR (PI and robust control s) + SRM 400V SMR((PI control only)+SRM SMR((PI control only)+SRM 400V Rectifier+SRM Rectifier+SRM 400V 1V (a) 2ms 0. RL = 13. THDi = 10.953. 22(a) and 22(b). where wh (s ) denotes a robust harmonic compensation weighting function.631.2 SMR control scheme The SMR control scheme shown in Fig. THDi = 18. Pd = 2135W (a) vd (t ) . 22.33% ) indicate the further improvements both in DC-link voltage ripple and stator vibration.989 . 21. 22(a) and 22(b) ( PF = 0. ωr = 1500rpm . and its vibration and speed ripple are also reduced. The chaotic phenomena can be avoided automatically. THDi = 134% ) are slightly reduced by employing the three-phase SMR ( Wh = 1 ) with PI control only ( Wv = 0 )( PF = 0. RL = 13. better SMR control performance and voltage response are obtained simultaneously. which is identified from the low-pass filtered control voltage vc = H LF ( s )vc . Robust current harmonic compensation scheme: The three-phase total current harmonic current ih is synthesized from the sensed phase-a line current ia .2Ω . The results in Figs.1.intechopen. . Robust voltage control scheme: A compensation control command vor* = wv (s )ε v is generated from the tracking error ε v . a. 21 consists of a robust current harmonic cancellation scheme and a robust voltage control scheme. Owing to the boostable and regulated DC-link voltage provided by the SMR.98 m / s2 (b) 1ms Fig. Measured DC-link voltages vd (t ) and vibrations a(t ) of the SRM drive fed by different AC/DC front-end converters at ( Vd = 400V .2Ω . 932 19.91 0.3kW.598 19.0 0. Lb and C d in Fig.33 0.03 0.15 Wh = 1. Initially.04 90.4Ω Wh = 0 0. The inductances of the first two motor windings are used as the input filter components during each half AC cycle. 8-6.08 84. 23(a) form a DC/DC boost converter. In driving mode.414 18. With the insertion of off-board part.4Ω . ωr = 1500rpm .943 0.C. ωr = 1000rpm .362 10. Pd = 2. a buck-boost SMR based charger is formed and drawn in Fig. ( ωr = 1000rpm . 2009).2 Switch-Mode Rectifier based EV battery charger 6.81 0.intechopen.968 2.16 0. The diode De is added to avoid the short circuit of battery when Q6 is turned on. 23(b) with the employed embedded motor drive components being highlighted. Db . RL = 22Ω Wh = 0 0.396 kW . 23(a) are set as: Sm → C and Sd permanently off. The nominal battery voltage is Vb = 12 × 4 = 48V . The measured power quality characteristics under SRM drive active load at various power levels without and with current harmonic compensation 6.579 11. the switches are set as: Sm → M and Sd → closed.13 3. Pd = 807 W ). 23(a) (H.18 0.58 0.62 0. The SMR control scheme shown in Fig. The components Sb . it is boosted and establishes the DC-link voltage with 48V ≤ Vda ≤ 72V. 2.0 ) current harmonic compensation are listed in Table 8. the battery is charged in constant current www. Moreover.01 3.1 System configuration A battery powered SRM drive for electric vehicle propulsion is shown in Fig.29 0.55 0. the measured power quality characteristics of the established SMR without ( Wh = 0 ) and with ( Wh = 1. ωr = 100rpm .39 PF Pac Pd = 1.36 Wh = 1.2Ω .17 0. RL = 13.47 2.41 Pd = 0.59 Table 8. the switches in Fig.18 0.959 23.33 5.941 1.44 0.807 kW . 6000rpm. the line drawn power quality improvements at all cases are also obtained. Chang & Liaw. the winding energies can be directly sent back to the battery bank via the diodes D1 .82 5.135 kW .54 1.2. RL = 22Ω . D3 . D5 and D7 .05 87.01 0. During demagnetization of each communication stroke.0 0. 48V. RL = 3.953 2.935 0.04 88.2Ω Ia1 (Arms) Ia5 (Arms) Ia7 (Arms) Ia11 (Arms) Efficiency (%) (kW) THDi (%) Wh = 0 0.Some Basic Issues and Applications of Switch-Mode Rectifiers on Motor Drives and Electric Vehicle Chargers 281 At three cases of ( ωr = 1500rpm . RL = 3.08 88. The SRM (DENSEI company Japan) is rated as 4-phase.28 0.com .0 0. and the SMR robust voltage control scheme and the SRM drive control schemes are normally operated.42 0.The results show that the fundamental and all other harmonic currents are all reduced and the efficiency of the SMR is increased accordingly by the harmonic compensation approach.25 0. RL = 13.31 0.06 86.44 Wh = 1. In charging mode. Pd = 1396 W ) and ( ωr = 100rpm . 23(b) consists of outer charging control scheme and inner current controlled PWM scheme.951 1. Pd = 2135W ). And the third motor winding inductance is employed as the energy storage component of the SMR. intechopen. A battery powered SRM drive with voltage boosting for electric vehicle propulsion: (a) system configuration. (b) schematic and control scheme of the formed on-board buckboost SMR based battery charger in idle status www.71A v′b Ic = I Lm Cb De (D ) iD A vac i L (i3 ) vb XINT A/D A/D K ic K vc s (t ) iL∗ i′L vb′ ≤ 52V Pcb SMR current control scheme v′b Current controller Σ ∗ iLc Y vb ib B′ Reference signal generator Voltage controller B (E ) D6 ( D) D3 D1 + v ac − iD A′ iL∗1 Σ εi Gib (s ) PWM v pwm (Q6 ) Wib (s ) DSP TMS320F240 (b) Fig.25C/9. Then the charging enters constant voltage floating mode.com . M Sm SRM and converter convert r er C Q1 Q3 Q5 D5 A′ Batt Battery t ery ry bank i + C Cd vb C Sb Q2 Test load Q4 − PMSG RL On-boar Onn boar Cf iac Utility source vac Off-board (a) Buck/boost PFC charger Embedded components of SRM and converter Q (ON ) 5 iac Pac Cf iL (i3 ) L3 ( L) L2 L1 D2 D4 Q6 (S ) E (B ) Battery charging control scheme ∗ b v Σ Gcv (s ) N v′b I c = 22.282 Electrical Generation and Distribution Systems and Power Quality Disturbances mode to let the batteries be charged under maximum current (0.5A) until the condition of Vb ≥ 52V ( = 13V × 4) reaches. 23. 65 47.02 7.85 ).75 81.989. Good line drawn waveform and power quality by the buck-boost SMR charger can be seen from the results.3 453. 23(a) and Fig.14 Pb (W) 388. 2009).4 Vb (V) 46.5 kHz ( Wib = 0. 7.85) are shown in Fig.45A ): (a) iL and iL* by PI and robust controls ( Wib = 0.32 47. I b = 9.45A ).85 (PI and robust feedback controls) Wib = 0.95 0.981 0. Some facts are observed from the results: (i) The current loop is normally operated at each switching frequency. Chang & Liaw.5kHz .65V .45 η (%) PF 67.2.3 459. Some results concerning charging mode are observed here.23%) fs Variables 2.11 5.00 75.989. Table 9 lists measured performance parameters corresponding to the switching frequencies of f s = 12.991 THDiac (%) 10.6 I ac (A) 5.2 Performance evaluation The derivation of circuit component ratings and the implementation affairs of the SRM drive shown in Fig. I b = 9.85 .5kHz 7. Under the constant current charging mode with I Lm = I c = 21. the inductor current will gradually become partial and then total discontinuous current mode (DCM) within the AC cycle. 15 kHz . f s = 12. and (ii) As the switching frequency becomes smaller.3A and switching frequency f s = 12. The close inductor current tracking control is observed from the results. To observe the effects of switching frequency on the SMR control performance.5kHz i*L iL 100V iac 10A (a) 10A (b) 1ms 5ms Fig.65V . THDi =4.84 82.5kHz 15kHz Pac (W) 579. the power quality becomes worse. Measured power quality parameters of the buck-boost SMR based charger under different switching frequencies www.972 0.84 4.45 9.com . THDi = 4.12 47.4 547.15 5.intechopen.73 I b (A) 8.5kHz . Wib = 0.04 Table 9.23 4.7 563.5 kHz and 2.85 vac f s = 12.22 9.989 0.23 %).8 560. 23(b) can be referred to (H. Fig.4 427.Some Basic Issues and Applications of Switch-Mode Rectifiers on Motor Drives and Electric Vehicle Chargers 283 6.56 5.02 9.5kHz ).C. Measured results of the buck-boost SMR based charger in constant-current charging mode at ( vb = 47. 24. Accordingly. (b) vac and iac (PF=0. 24(b) shows the corresponding AC source voltage vac and current iac (PF = 0. 24(a) ( vb = 47. the measured iL and its command iL* by PI control and robust control ( Wib = 0.5kHz 12. System configuration of a switched-reluctance generator based DC micro-grid system with flyback SMR auxiliary plug-in charger www. ib ) at steady state of I b = 6A during charging process are plotted in Figs.2 Performance evaluation for the flyback SMR based auxiliary plug-in charger For the battery bank shown in Fig. a lead-acid battery energy storage system is equipped.intechopen. The measured static characteristics under two charging currents ( I b = 6A and 5A) are listed in Table 10.3 Flyback Switch-Mode Rectifier based auxiliary plug-in charger 6. iac ) and ( vb .3. For the flyback converter employed in the SMR.C. and (iii) power factor: PF > 0.107 = 5. The The specifications of the developed flyback SMR are given as: (i) AC input: 110V/60Hz. 2011). 2009a).1 System configuration Fig.42A ) is set.2 µ s . 25.3. Chang & Liaw.com N B . 25 shows a switched-reluctance generator (SRG) based DC microgrid distributed power system (Y. The battery bank (48V) is interfaced to the common 400V DC-grid via a bidirectional buck-boost converter. The measured ( vac . which is constant for the employed PWM switching scheme. To preserve the microgrid power quality. Chang & Liaw. 25.97.284 Electrical Generation and Distribution Systems and Power Quality Disturbances 6. IˆSc = 6 / K ic = 6 / 1. Wind powered switchedreluctance generator system Converter AC source iN 1k Flyback SMR auxiliary plug-in charger iac Lf vac i′a c − Cf N1 : N 2 DC 400V Current-fed push-pull DC/DC boost converter + vdc − Cdc A 1φ 3W inverter iN 2k Battery bank Lmk vdi iN 21 iN11 + + Cd − 1φ 3W 110V/220V AC outputs i Lk iS Pac vd ve − Te ωr DC 48V + + SRG IM Common DC bus N1 : N 2 iD D i L1 Lm1 (48V) Co vb Bidirectional DC/DC converter − S Energy storage system Fig. The flyback SMR is operated under discontinuous current mode using the charge-regulated PWM scheme developed in (Y. (ii) DC output: Vo = Vb = 48V/300W.. The SRG establishes a 48V DC-link voltage. The results show that good charging characteristics with satisfactory line drawn power quality are obtained by the developed flyback SMR based auxiliary plug-in charger. the constant charging current I b = 6A (i. three paralleled transformers are used to enlarge its power rating. The turn-on time in is set as ton = dTs = 9. The battery bank can also be charged from the utility grid by a flyback SMR based auxiliary plug-in charger. 6. and a common 400V DC-grid is formed through a current-fed push-pull (CFPP) DC-DC converter. 26(a) and 26(b).e.C. 9981 5. the ratings of circuit components and the ripples of energy storage components should be analytically derived. Measured results of the developed flyback SMR based auxiliary plug-in charger under steady-state charging current of I b = 6A : (a) ( vac . the constituted components are designed and implemented. DCM or CCM operation.com . parallel opeartion to enlarge SMR ratings.9986 3. ib ) Ib 5A 6A Pb 265.742% 73.28W 306. and accordingly. The schematic type and control scheme should be properly chosen according to the specific application and the desired operation characteristics.220% (a) (b) 5ms 5ms Fig. In this article.17W 415.intechopen.70% 0. 26. 2009a).Some Basic Issues and Applications of Switch-Mode Rectifiers on Motor Drives and Electric Vehicle Chargers 285 vb vac 1V 50V iac 50V 5A ib 10A PF = 0. SRM drive. etc.9981 THDi =5.C. Conclusions This article has presented the basic issues of switch-mode rectifiers for achieving batter performance. iac ). dynamic control requirement. can further be applied. phase number. the applications of various SMRs to PMSM drive.85% 0. The simple advanced control. If more stringent control requirements are desired.56W Pac 364. Other possible affairs lie in the digital control with properly chosen sampling intervals. The considering issues include input-output relative voltage levels. In power circuit establishment. random switching. such as the robust tracking error cancellation controls (Chai & Liaw. galvanic isoltation. (b) ( vb . Measured results of the developed flyback SMR based auxiliary plug-in charger at two charging current levels 7. 2007. electric vehicle plug-in battery charger and microgrid plug-in battery charger were presented.220% PF THDi Table 10. The www. etc. As to the control affairs. the sensed inductor current and output voltage should be filtered with suited low-pass cut-off frequencies. Y. operation quadrant. voltage mode or current mode control. the considrations of DC-link ripple effects on the followed power stage.98W η 72. Then the basic feedack controllers are designed considring the desired perfromance and the effects of comtaiminated system noises. Chang & Liaw. T. C.com . Vol. No.2. No. pp. pp. No.55. A Flyback Rectifier with Spread Harmonic Spectrum. IET Electric Power Applications. 560-566. pp. H. (March 2009).1. 1295-1309.286 Electrical Generation and Distribution Systems and Power Quality Disturbances treatments of basic issues in power circuit and control scheme have been decribed. No. M. S. M. M. Y. A. And their comparative performances have also been assessed to demonstrate the effectiveness of the introduced issues. pp.. Simplified Single Stage PFC Including Peak Current Mode Control in a Flyback Converter. & Liaw. (January 2009). M. & Liaw. Unity Power Factor Isolated Three-Phase Rectifier with Split DC-Bus Based on the Scott Transformer. Spiazzi. (2004). pp. (2000). 1278-1287. H. Y. J. (2009). M. 59-74. (2009). IEEE Transactions on Industrial Electronics.24.1. Proceedings of Taiwan Power Electronics Conference and Exhibition.5. & Moschopoulos. References Backman. Vol. No. C. ISSN 1751-8660 Chai. 8. Vol. ISSN 0278-0046 www.36. Y. Ho. IEEE Transactions on Power Electronics. pp. P. C. & Liaw. ISSN 0093-9994 Chai. to appear in No. I. C. Y. J. & Liaw. No. IEEE Transactions on Industry Applications. ISSN 0885-8993 Chang. J. (2010). (March 2004). Y. Proceedings of IEEE Telecommunications Energy Conference. C. pp.1. & Liaw. & Tagliavia. (September 2000). ISBN 0-7803-6407-4 Badin. Simplified Control Technique for High-PowerFactor Flyback Cuk and Sepic Rectifiers Operating in CCM. (2011). pp. Chang. M. On the Switched-Reluctance Motor Drive with Three-Phase Single-Switch-Mode Rectifier Front-End. pp. Development and Control of a Flyback Switch-Mode Rectifier with Enlarged Rating via Paralleled Transformers. IEEE Transactions on Vehicular Technology. Vol. C. Y. Switch-Mode Rectifier with Digital Robust Ripple Compensation and Current Waveform Controls. Development Of a Switched-Reluctance Motor Drive with PFC Front-End. It is believed that the cost-effective SMR fed power palnt with satisfactory performance can be achieved if the suggested basic issues can be considered. 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(April 2000). the presence of a static converter as output interface of the generating plants introduces voltage and current harmonics into the electrical system that negatively affect system power quality. Some Basic Issues and Applications of Switch-Mode Rectifiers on Motor Drives and Electric Vehicle Chargers. Chang (2011). Prof.Electrical Generation and Distribution Systems and Power Quality Disturbances Edited by Prof. M. Office Block. being not appropriate sources to be directly connected to the main utility grid. to grid instability and to a total or partial loss of load power supply. 304 pages Publisher InTech Published online 21.com/books/electrical-generation-and-distribution-systems-and-power-qualitydisturbances/some-basic-issues-and-applications-of-switch-mode-rectifiers-on-motor-drives-and-electricvehicle-ch InTech Europe University Campus STeP Ri Slavka Krautzeka 83/A 51000 Rijeka. feel free to copy and paste the following: C. China Phone: +86-21-62489820 Fax: +86-21-62489821 .intechopen. Nevertheless.com InTech China Unit 405. among others. 2011 Published in print edition November. since their availability is arbitrary and unstable this can lead to frequency variation. November. In this book the reader will be introduced to different power generation and distribution systems with an analysis of some types of existing disturbances and a study of different industrial applications such as battery charges. Shanghai. InTech. we can eliminate the need to transfer energy over long distances through the electric grid. C. Yan An Road (West).65. or solar energy.). 200040. Electrical Generation and Distribution Systems and Power Quality Disturbances. Hotel Equatorial Shanghai No.intechopen. Liaw and Y. Gregorio Romero (Ed. ISBN: 978-953-307-329-3. is currently of greater interest. By integrating distributed power generation systems closed to the loads in the electric grid. 2011 The utilization of renewable energy sources such as wind energy. Gregorio Romero ISBN 978-953-307-329-3 Hard cover. How to reference In order to correctly reference this scholarly work. Additionally. Available from: http://www. Croatia Phone: +385 (51) 770 447 Fax: +385 (51) 686 166 www.