74HC_HCT157

74HC157; 74HCT157Quad 2-input multiplexer Rev. 6 — 27 August 2012 Product data sheet 1. General description The 74HC157; 74HCT157 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL. It is specified in compliance with JEDEC standard no. 7A. The 74HC/HCT157 are quad 2-input multiplexers which select 4 bits of data from two sources under the control of a common data select input (S). The enable input (E) is active LOW. When E is HIGH, all of the outputs (1Y to 4Y) are forced LOW regardless of all other input conditions. Moving the data from two groups of registers to four common output buses is a common use of the 74HC/HCT157. The state of the common data select input (S) determines the particular register from which the data comes. It can also be used as function generator. The device is useful for implementing highly irregular logic by generating any four of the 16 different functions of two variables with one variable common. The 74HC/HCT157 is logic implementation of a 4-pole, 2-position switch, where the position of the switch is determined by the logic levels applied to S. The logic equations are: 1Y = E (1I1 S + 1I0 S) 2Y = E (2I1 S + 2I0 S) 3Y = E (3I1 S + 3I0 S) 4Y = E (4I1 S + 4I0 S) The 74HC/HCT157 is identical to the 74HC158 but has non-inverting (true) outputs. 2. Features and benefits  Low-power dissipation  Non-inverting data path  ESD protection:  HBM JESD22-A114F exceeds 2 000 V  MM JESD22-A115-A exceeds 200 V  Specified from 40 C to +85 C and from 40 C to +125 C 74HC157. Ordering information Type number Package 74HC157N Temperature range Name Description Version 40 C to +125 C DIP16 plastic dual in-line package.85 mm SOT763-1 74HCT157N 74HC157D 74HCT157D 74HC157DB 74HCT157DB 74HC157PW 74HCT157PW 74HC157BQ 74HCT157BQ 4.9 mm SOT109-1 40 C to +125 C SSOP16 plastic shrink small outline package. 16 leads. Functional diagram S E 1I1 1Y 1I0 2I1 2Y 2I0 2 3I1 3 5 6 11 10 14 13 3Y 1I0 1I1 2I0 2I1 3I0 3I1 4I0 4I1 3I0 1 S 15 E 4I1 1Y 2Y 3Y 4Y 4 7 9 12 4Y 4I0 Fig 1.5  3. no leads. All rights reserved. 2 of 19 .V.5  0. 16 terminals. logic symbol All information provided in this document is subject to legal disclaimers. body width 4. 2012. Rev. 16 leads (300 mil) SOT38-4 40 C to +125 C SO16 plastic small outline package.3 mm SOT338-1 40 C to +125 C TSSOP16 plastic thin shrink small outline package. body width 3. 74HCT157 NXP Semiconductors Quad 2-input multiplexer 3. 16 leads.4 mm SOT403-1 40 C to +125 C DHVQFN16 plastic dual in-line compatible thermal enhanced very thin quad flat package. body 2. Ordering information Table 1. body width 5. 6 — 27 August 2012 © NXP B. 16 leads. Logic diagram 74HC_HCT157 Product data sheet mna484 mna481 Fig 2. However. Rev. the solder land should remain floating or be connected to GND. Logic symbol mna482 Fig 4. 2012. Pinning information 5.1 Pinning 1 S terminal 1 index area 74HC157 74HCT157 16 VCC 74HC157 74HCT157 1I0 2 15 E 1I1 3 14 4I0 S 1 16 VCC 1I0 2 15 E 1Y 4 13 4I1 1I1 3 14 4I0 2I0 5 12 4Y 1Y 4 13 4I1 2I1 6 2I0 5 12 4Y 2Y 7 2I1 6 11 3I0 2Y 7 10 3I1 GND 8 8 9 3Y 3Y 11 3I0 10 3I1 GND 9 GND(1) 001aan354 Transparent top view 001aan353 (1) This is not a supply pin. Pin configuration DIP16. 3 of 19 . 6 — 27 August 2012 © NXP B. The substrate is attached to this pad using conductive die attach material. SO16.74HC157. 74HCT157 NXP Semiconductors Quad 2-input multiplexer 1 2 G1 1I0 3 1I1 5 2I0 6 2I1 11 3I0 10 3I1 14 4I0 13 4I1 SELECTOR 1Y 4 15 2Y 7 2 EN 1 3 MULTIPLEXER OUTPUTS 3Y MUX 4 1 5 9 7 6 11 4Y 12 9 10 14 S E 1 15 12 13 mna483 Fig 3. There is no electrical or mechanical requirement to solder this pad. Fig 5. All rights reserved.V. Pin configuration DHVQFN16 All information provided in this document is subject to legal disclaimers. (T)SSOP16 74HC_HCT157 Product data sheet Fig 6. if it is soldered. IEC logic symbol 5. 6.5 V to (VCC + 0. 10. Symbol Parameter Conditions Min VCC supply voltage IIK Max Unit input clamping current VI < 0. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). 6 — 27 August 2012 © NXP B. [2] Ptot derates linearly with 5. 7.5 V) - 25 mA ICC supply current - +50 mA IGND ground current - 50 mA Tstg storage temperature 65 +150 C Ptot total power dissipation Tamb = 40 C to +125 C SO16 package [1] - 500 mW TSSOP16 package [2] - 500 mW DHVQFN16 package [3] - 500 mW [1] Ptot derates linearly with 8 mW/K above 70 C.5 V or VO > VCC + 0.5 V - 20 mA IO output current VO = 0. 11. Pin description Symbol Pin Description S 1 common data select input 1I0 to 4I0 2.2 Pin description Table 2. 7. 12 multiplexer outputs GND 8 ground (0 V) E 15 enable input (active LOW) VCC 16 supply voltage 6.5 V or VI > VCC + 0. 74HC_HCT157 Product data sheet All information provided in this document is subject to legal disclaimers.5 mW/K above 60 C. Function table[1] Input Output E S nI0 nI1 nY H X X X L L L L X L L L H X H L H X L L L H X H H [1] H = HIGH voltage level. 5.V. X = don’t care. All rights reserved. 4 of 19 .74HC157. 13 data inputs from source 1 1Y to 4Y 4. Rev. Functional description Table 3. 2012. Limiting values Table 4. 74HCT157 NXP Semiconductors Quad 2-input multiplexer 5.5 +7 V - 20 mA IOK output clamping current VO < 0.5 V 0. L = LOW voltage level. Voltages are referenced to GND (ground = 0 V). 9. 14 data inputs from source 0 1I1 to 4I1 3. 26 - 0.5 V 2. 74HCT157 NXP Semiconductors Quad 2-input multiplexer [3] Ptot derates linearly with 4.16 0.1 - 0.1 - 0. 8. 5 of 19 .2 - 4.4 - 4.0 V - 0 0.26 - 0.15 - V 3.84 - 3. VCC = 6. Static characteristics At recommended operating conditions.5 V - VCC = 6.2 mA.9 6.8 1.2 mA.2 VCC = 2.9 - 5.0 V VCC = 4.8 - 1.4 V - - 0. Recommended operating conditions Voltages are referenced to GND (ground = 0 V) Symbol Parameter Conditions 74HC157 74HCT157 Unit Min Typ Max Min Typ Max VCC supply voltage 2.5 - V 2.98 4.0 5.34 - 5. 2012.35 - 1.5 V VI input voltage 0 - VCC 0 - VCC V VO output voltage 0 - VCC 0 - VCC V Tamb ambient temperature 40 +25 +125 40 +25 +125 C t/V input transition rise and fall rate - - 625 - - - ns/V VCC = 2.67 139 ns/V VCC = 6. VCC = 6. Rev.5 - 0.5 V - 0.4 4.81 - 5.1 V IO = 20 A.7 - V IO = 5. 6 — 27 August 2012 © NXP B.2 - 4.0 V 4.0 - 1.5 V 3.5 5.V.74HC157.4 V IO = 5.0 5. VCC = 4.0 mA. VCC = 6.35 V - 2.1 - 0.0 V 1. VCC = 4.8 - 1.5 - 4.4 - V IO = 20 A. voltages are referenced to GND (ground = 0 V).5 - 0.0 - 5.0 A 74HC157 VIH VIL VOH VOL II HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage input leakage current 74HC_HCT157 Product data sheet VI = VIH or VIL VI = VIH or VIL VI = VCC or GND. VCC = 2.5 V - 0 0. Recommended operating conditions Table 5.33 - 0.9 - V IO = 20 A. All rights reserved. Static characteristics Table 6.67 139 - 1. Symbol Parameter Tamb = 25 C Conditions Min Typ VCC = 2.1 1. VCC = 6.0 V 1.8 V IO = 20 A.0 V - - 83 - - - ns/V 9.9 - 1.1 V IO = 4.0 V All information provided in this document is subject to legal disclaimers.15 0. VCC = 4.0 - 1.1 - 1.0 V Tamb = 40 C to +85 C Tamb = 40 C to Unit +125 C Max Min Max Min Max 1. VCC = 6.5 V - 1.48 5.9 - V IO = 4.33 - 0.5 VCC = 4.0 mA.1 V IO = 20 A. VCC = 4.2 - V IO = 20 A.5 - 1.15 - 3.1 - 0.4 - 3.2 - 1.1 - 0.8 0.0 V - VCC = 4.35 - 1.2 - V 0.15 VCC = 6.0 V 5.0 6. VCC = 2.9 2.5 V 3.5 mW/K above 60 C.0 V - 0.1 - 0.5 V 4.0 V 5.0 V - 0 0.0 4.32 - 3. 1 - 1.5 V to 5. VCC = 4.5 V to 5. VCC = 4. E input - 60 216 - 270 - 294 A per input pin.0 - 2.5 V 2. Symbol Parameter Tamb = 25 C Conditions Min ICC supply current CI input capacitance VI = VCC or GND.0 - 1.5 V. S input - 100 360 - 450 - 490 A - 3. IO = 0 A.5 V - - 8.V.0 A ICC supply current VI = VCC or GND.32 - 3.0 - V VIL LOW-level input voltage VCC = 4.8 V VOH HIGH-level output voltage VI = VIH or VIL.5 V II input leakage current VI = VCC or GND.0 mA - 0.1 V.84 - 3.0 V Tamb = 40 C to +85 C Tamb = 40 C to Unit +125 C Typ Max Min Max Min Max - - 8. All rights reserved. VCC = 6.6 - 2.26 - 0.5 V - - 0.5 V - 1. nIn inputs CI input capacitance 74HC_HCT157 Product data sheet per input pin. VCC = 5.7 - V IO = 20 A - 0 0. VCC = 4.8 - 0.33 - 0.0 - 80 - 160 A ICC additional supply current VI = VCC  2. 6 of 19 . voltages are referenced to GND (ground = 0 V). Rev.4 - V IO = 4 mA 3.1 - 0.4 - 4. 6 — 27 August 2012 pF © NXP B. IO = 0 A.0 1. 2012.74HC157.5 - 4.1 V IO = 4.98 4.5 - All information provided in this document is subject to legal disclaimers.2 0. other inputs at VCC or GND. 74HCT157 NXP Semiconductors Quad 2-input multiplexer Table 6.1 - 0.5 V to 5.4 V VOL LOW-level output voltage VI = VIH or VIL.0 - 80 - 160 - 3. Static characteristics …continued At recommended operating conditions.5 - A pF 74HCT157 VIH HIGH-level input voltage VCC = 4.15 0. IO = 0 A - 100 360 - 450 - 490 A per input pin.8 - 0.5 V IO = 20 A 4. VCC = 5.4 4. Dynamic characteristics Table 7. nI1 to nY.5 V - 13 25 - 31 - 38 ns VCC = 5 V. Symbol Parameter Tamb = 25 C Conditions Tamb = 40 C to +85 C Tamb = 40 C to +125 C Unit Min Typ Max Min Max Min Max - 36 125 - 155 - 190 ns VCC = 4. f = 1 MHz.0 V VCC = 6. see Figure 8 74HC_HCT157 Product data sheet [1] VCC = 4. CL = 15 pF - 12 - - - - - ns All information provided in this document is subject to legal disclaimers.0 V [1] S to nY.5 V - 15 25 - 31 - 38 ns VCC = 5 V. 74HCT157 NXP Semiconductors Quad 2-input multiplexer 10.5 V - 14 23 - 29 - 35 ns VCC = 5 V. CL = 15 pF - 11 - - - - - ns - 11 20 - 25 - 30 ns VCC = 2. see Figure 7 [1] - 6 13 - 16 - 19 ns - 70 - - - - - pF - 16 27 - 34 - 41 ns - 13 - - - - - ns - 22 37 - 46 - 56 ns - 19 - - - - - ns For type 74HCT157 tpd propagation delay VCC = 4. CL = 15 pF - 12 - - - - - ns - 12 21 - 26 - 32 ns VCC = 2.0 V - 41 125 - 155 - 190 ns VCC = 4. see Figure 7 [1] VCC = 4. 7 of 19 . All rights reserved. nI1 to nY. CL = 50 pF unless otherwise specified. see Figure 8 VCC = 6. Rev.0 V - 19 75 - 95 - 110 ns VCC = 4.0 V tt transition time [2] nY.74HC157. see Figure 7 VCC = 6. CL = 15 pF - 11 - - - - - ns - 10 21 - 26 - 32 ns For type 74HC157 tpd propagation delay nI0. CL = 15 pF S to nY. for test circuit see Figure 9. CL = 15 pF E to nY. 2012. VI = GND to VCC [3] nI0.5 V VCC = 5 V.5 V VCC = 5 V. see Figure 7 VCC = 2.0 V - 39 115 - 145 - 175 ns VCC = 4.5 V - 15 26 - 33 - 39 ns VCC = 5 V. see Figure 7 [1] VCC = 2.0 V CPD power dissipation capacitance CL = 50 pF.V.5 V - 7 15 - 19 - 22 ns VCC = 6. 6 — 27 August 2012 © NXP B.0 V [1] E to nY. Dynamic characteristics Voltages are referenced to GND (ground = 0 V). (CL  VCC2  fo) = sum of outputs. S) to output (nYn) 74HC_HCT157 Product data sheet All information provided in this document is subject to legal disclaimers.74HC157. Propagation delay input (nI0. 6 — 27 August 2012 © NXP B. f = 1 MHz. nI0. [2] tt is the same as tTHL and tTLH. nI1. 2012. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V). N = number of inputs switching. 74HCT157 NXP Semiconductors Quad 2-input multiplexer Table 7. CL = 50 pF unless otherwise specified.V. Symbol Parameter tt transition time power dissipation capacitance CPD [1] Tamb = 25 C Conditions Tamb = 40 C to +85 C Tamb = 40 C to +125 C Unit Min Typ Max Min Max Min Max - 7 15 - 19 - 22 ns - 70 - - - - - pF [2] nY. All rights reserved. see Figure 7 VCC = 4. fo = output frequency in MHz. [3] CPD is used to determine the dynamic power dissipation (PD in W). CL = output load capacitance in pF. nI1 VM VM GND t PHL t PLH VOH output nY 90 % VM VM 10 % VOL t THL t TLH 001aad477 Measurement points are given in Table 8.5 V CL = 50 pF. PD = CPD  VCC2  fi  N + (CL  VCC2  fo) where: fi = input frequency in MHz. Fig 7. Rev. VOL and VOH are typical voltage output levels that occur with the output load. for test circuit see Figure 9. VCC = supply voltage in V. Waveforms VI input S. VI = GND to VCC [3] tpd is the same as tPLH and tPHL. 11. 8 of 19 . All rights reserved. VOL and VOH are typical voltage output levels that occur with the output load. 2012.3 V 1.V. Fig 8. Propagation delay input (E) to output (nY) Table 8.5VCC 0.74HC157. 9 of 19 . 74HCT157 NXP Semiconductors Quad 2-input multiplexer VCC VM E input GND t PHL t PLH VOH VM nY output VOL mna485 Measurement points are given in Table 8. 6 — 27 August 2012 © NXP B. Measurement points Type Input Output VM VM 74HC157 0. Rev.5VCC 74HCT157 1.3 V 74HC_HCT157 Product data sheet All information provided in this document is subject to legal disclaimers. 50 pF tPLH. Rev.0 V 6. All rights reserved. 10 of 19 .0 ns 15 pF. Test circuit for measuring switching times Table 9. Test data Type Input VI tr. tPHL 74HC_HCT157 Product data sheet Load All information provided in this document is subject to legal disclaimers.74HC157. tPHL 74HCT157 3.V. Fig 9. 6 — 27 August 2012 Test © NXP B. 2012. S1 = Test selection switch. 74HCT157 NXP Semiconductors Quad 2-input multiplexer VI negative pulse tW 90 % VM VM 10 % GND tr tf tr tf VI 90 % positive pulse GND VM VM 10 % tW VCC G VI VO DUT RT CL 001aah768 Test data is given in Table 9. Definitions test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. 50 pF tPLH. RL = Load resistance. CL = Load capacitance including jig and probe capacitance. tf CL 74HC157 VCC 6.0 ns 15 pF. 80 10.62 3.V. 74HCT157 NXP Semiconductors Quad 2-input multiplexer 12. A1 min.33 0.76 inches 0.85 0.60 3. OUTLINE VERSION REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 95-01-14 03-02-13 SOT38-4 Fig 10.32 0. 2012.068 0.01 0.009 0.48 6. Package outline SOT38-4 (DIP16) 74HC_HCT157 Product data sheet All information provided in this document is subject to legal disclaimers.13 0.2 1.14 0.01 inch) maximum per side are not included.1 0.51 3.39 0. Plastic or metal protrusions of 0. Rev.021 0. All rights reserved.015 0.25 0.50 18.12 0. 16 leads (300 mil) SOT38-4 ME seating plane D A2 A A1 L c e Z w M b1 (e 1) b b2 MH 9 16 pin 1 index E 1 8 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max.73 0. A2 max.014 0.73 1.25 mm (0.3 0.3 0. Package outline DIP16: plastic dual in-line package.05 8.31 0.38 1.254 0.77 0. b b1 b2 c D (1) E (1) e e1 L ME MH w Z (1) max. 6 — 27 August 2012 © NXP B.55 6. 11 of 19 .53 0.54 7.23 19.74HC157.30 0.26 0. mm 4.0 8.20 2.049 0.03 Note 1.2 0.17 0.033 0.02 0.24 0.051 0.25 7.36 0. 0100 0.0 3.057 0. body width 3.041 0.004 0.25 0.016 0.049 0.01 0.3 0.10 1.8 1. 12 of 19 . Package outline SOT109-1 (SO16) 74HC_HCT157 Product data sheet All information provided in this document is subject to legal disclaimers.012 θ 8o o 0 Note 1.75 0.9 mm SOT109-1 D E A X c y HE v M A Z 16 9 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 8 e 0 detail X w M bp 2.38 0.36 0.05 1.01 0.028 0. REFERENCES OUTLINE VERSION IEC JEDEC SOT109-1 076E07 MS-012 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig 11. 16 leads.25 0. Rev.0 9.006 inch) maximum per side are not included.039 0.25 0.49 0.05 0.4 0.27 6.7 0. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.014 0.V.25 0.19 10.244 0.004 0.16 0.74HC157.25 0.0 0. Plastic or metal protrusions of 0. 74HCT157 NXP Semiconductors Quad 2-input multiplexer SO16: plastic small outline package.028 0.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max.15 0.020 inches 0.01 0.069 0.010 0. 6 — 27 August 2012 © NXP B.228 0.6 0.2 5.019 0.15 mm (0.39 0. All rights reserved.25 0. 2012.8 1.7 0.8 4.0075 0.45 1.1 0. 2 0.1 1. Rev. All rights reserved.13 0.21 0.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max.38 0.03 0. 16 leads. Package outline SOT338-1 (SSOP16) 74HC_HCT157 Product data sheet All information provided in this document is subject to legal disclaimers.55 8o o 0 Note 1.80 1. OUTLINE VERSION SOT338-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 MO-150 Fig 12. 6 — 27 August 2012 © NXP B. 2012.09 6.4 6. body width 5.25 0. Plastic or metal protrusions of 0. 13 of 19 .65 0.74HC157.9 7.25 mm maximum per side are not included.25 1.20 0.00 0.2 0.25 0.0 5. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2 0.V.7 0.4 5.05 1.9 0.65 7. 74HCT157 NXP Semiconductors Quad 2-input multiplexer SSOP16: plastic shrink small outline package.3 mm D SOT338-1 E A X c y HE v M A Z 9 16 Q A2 A (A 3) A1 pin 1 index θ Lp L 8 1 detail X w M bp e 0 2.6 1.63 0. 1 5. OUTLINE VERSION SOT403-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 MO-153 Fig 13. Package outline SOT403-1 (TSSOP16) 74HC_HCT157 Product data sheet All information provided in this document is subject to legal disclaimers.74HC157.30 0.3 0.5 4.80 0. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1. body width 4.1 0.4 0.05 0. Rev.40 0.1 0.13 0.15 0. 74HCT157 NXP Semiconductors Quad 2-input multiplexer TSSOP16: plastic thin shrink small outline package. Plastic interlead protrusions of 0. 2.25 mm maximum per side are not included. All rights reserved. 14 of 19 . Plastic or metal protrusions of 0.V.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. 16 leads.9 4.06 8o o 0 Notes 1.95 0.75 0.6 6.25 0.1 4.50 0.19 0. 2012.15 mm maximum per side are not included.2 1 0.2 0.2 0. 6 — 27 August 2012 © NXP B.3 0.4 mm SOT403-1 E D A X c y HE v M A Z 9 16 Q (A 3) A2 A A1 pin 1 index θ Lp L 1 8 e detail X w M bp 0 2.65 6. 15 of 19 .5 0.4 2.1 Note 1.85 2.4 1. 2012.3 0.00 0.85 mm A B D A A1 E c detail X terminal 1 index area terminal 1 index area C e1 e 2 7 y y1 C v M C A B w M C b L 1 8 Eh e 16 9 15 10 Dh X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT mm A(1) max. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT763-1 --- MO-241 --- EUROPEAN PROJECTION ISSUE DATE 02-10-17 03-01-27 Fig 14.V. All rights reserved. no leads.6 3. Package outline SOT763-1 (DHVQFN16) 74HC_HCT157 Product data sheet All information provided in this document is subject to legal disclaimers.30 0.85 e 0.5 e1 L v w y y1 2.18 c D (1) Dh E (1) Eh 0.15 1.05 0. A1 b 1 0. Plastic or metal protrusions of 0.15 0.5 x 3.74HC157.1 0. body 2.6 2. Rev. 6 — 27 August 2012 © NXP B.075 mm maximum per side are not included. 74HCT157 NXP Semiconductors Quad 2-input multiplexer DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package.05 0.2 3. SOT763-1 16 terminals.05 0.5 x 0.5 0. 74HC157. 74HCT157 NXP Semiconductors Quad 2-input multiplexer 13.2 19970827 Product specification - - 74HC_HCT157 Product data sheet All information provided in this document is subject to legal disclaimers.3 74HC_HCT157 v. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 14.3 20101231 Product data sheet - 74HC_HCT157_CNV v. All rights reserved. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC_HCT157 v. 2012.4 20111219 Product data sheet - 74HC_HCT157 v. 74HC_HCT157 v.2 74HC_HCT157_CNV v.6 20120827 Product data sheet - 74HC_HCT157 v.V. Abbreviations Table 10. Rev.5 Modifications: • Package outline drawing DIP16 added.4 Figure 7 updated with transition times. 20120425 • Product data sheet - 74HC_HCT157 v. Revision history Table 11. 6 — 27 August 2012 © NXP B. 16 of 19 .5 Modifications: 74HC_HCT157 v. For detailed and full information see the relevant full data sheet. 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Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale. which may result in modifications or additions. special or consequential damages (including . damage. or the application or use by customer’s third party customer(s). 74HC_HCT157 Product data sheet Suitability for use — NXP Semiconductors products are not designed. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. In no event however. including without limitation specifications and product descriptions. authorized or warranted to be suitable for use in life support. All rights reserved. warranty. as published at http://www. [2] The term ‘short data sheet’ is explained in section “Definitions”. expressed or implied. Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). 17 of 19 . the full data sheet shall prevail. Rev. as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. 15. NXP does not accept any liability in this respect. and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. breach of contract or any other legal theory. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. life-critical or safety-critical systems or equipment. unless otherwise agreed in a valid written individual agreement.without limitation . 74HCT157 NXP Semiconductors Quad 2-input multiplexer 15. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. which is available on request via the local NXP Semiconductors sales office. All information provided in this document is subject to legal disclaimers. The content is still under internal review and subject to formal approval. 2012.V. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. business interruption. unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant. death or severe property or environmental damage. costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence). Applications — Applications that are described herein for any of these products are for illustrative purposes only. at any time and without notice.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. NXP Semiconductors does not accept any liability related to any default.2 Definitions Draft — The document is a draft version only. The latest product status information is available on the Internet at URL http://www. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. as well as for the planned application and use of customer’s third party customer(s). Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document.com.com/profile/terms. Legal information 15.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable.nxp. 15. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products. punitive. Translations — A non-English (translated) version of a document is for reference only. the product is not suitable for automotive use. 18 of 19 . All rights reserved. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified.nxp. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards. Contact information For more information.com For sales office addresses. 6 — 27 August 2012 © NXP B.com 74HC_HCT157 Product data sheet All information provided in this document is subject to legal disclaimers. and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk. 16. Rev.4 Trademarks Notice: All referenced brands. 74HCT157 NXP Semiconductors Quad 2-input multiplexer Export control — This document as well as the item(s) described herein may be subject to export control regulations. product names. customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications. The English version shall prevail in case of any discrepancy between the translated and English versions. 15. and (c) customer fully indemnifies NXP Semiconductors for any liability. service names and trademarks are the property of their respective owners. please visit: http://www. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications.74HC157. please send an email to: salesaddresses@nxp. 2012. use and specifications. It is neither qualified nor tested in accordance with automotive testing or application requirements.V. . . . 16 Revision history . . . 16 Legal information. . . . . . 8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2012. . 17 Definitions . . . . .V. .com For sales office addresses. For more information. . . . . . . . . . . . . . . . . . 17 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Data sheet status . . . . . 19 Please be aware that important notices concerning this document and the product(s) described herein. . . . . . . . 18 Contents . . . . . . . . . . . . . . . . . .nxp. . . . . . . . . . . . . . 1 Ordering information . . please send an email to: salesaddresses@nxp. . . . . . . . . . . . . . . . . . . . . . . . . . . have been included in section ‘Legal information’. . . . . . . . . . . . . . . . . . . . . . . . . . .3 15. . . . . . . . . . . . 4 Recommended operating conditions. . © NXP B. . . . . . . . 5 Static characteristics. . . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Waveforms . . . . . . 11 Abbreviations . . . 4 Limiting values. . . . . . .1 15. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 15. . . . . . . . . . . . . . . . . . . . . . . . . . .com Date of release: 27 August 2012 Document identifier: 74HC_HCT157 . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . 2 Pinning information .NXP Semiconductors 74HC157. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 6 7 8 9 10 11 12 13 14 15 15.4 16 17 General description . . . . . . . . . . . 74HCT157 Quad 2-input multiplexer 17. . . . . . . . . . . . . . please visit: http://www. . . . . 3 Pinning . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . Contents 1 2 3 4 5 5. . . . . . . . . . . . 18 Contact information. . . . . . . . . . . . . . . . 17 Disclaimers .1 5. . . . . . . . . . . . All rights reserved. . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . 5 Dynamic characteristics . . . . . . . . .