TUTORIAL NO. – 1 Q.1 Explain drift and diffusion of charge carriers in semiconductors.Derive an expression for the electron current due to drift and diffusion. Q.2 Distinguish between the followings: (i) Intrinsic and extrinsic semiconductor (ii) Majority and minority charge carriers (iii) P and N type semi conductor (iv) Forward and reverse biasing of P-N junction Q.3a) For what voltage will the reverse current in a p-n junction germanium diode reach 90% of its saturation values at room temperature? b)What is the ratio of the current of a forward bias of 0.05 V to the current for the same magnitude of the reverse bias. c) If the reverse saturation current is 10 µ A, calculate the forward currents for voltages of 0.1, 0.2 and 0.3 V respectively Q.4 Using the fact that a silicon diode has I0=10-14A at 25ºC and that is increases by 15% perº C rise in temperature. Find the value of I0 at 125ºC. (Ans. : 1.17 x 10-8 A) Q.5 Assuming that the diodes in the circuit given below is ideal, utilize thevein’s theorem to simplify the circuit shown in figure and find the values of the labelled currents and voltages. 15V 10kΩ I 20kΩ V 20kΩ Q.6 For the circuit shown below, both the diodes are identical conducting 10mA at 0.7V and 100mA at 0.8V. find the value of R for which V= 50mV. 10mA D 1 I2 + vD2 - D 2 R I1 + vD1 + - 50mV - + V - Q.7 For the circuit given, find the output voltage vo for the cases a) V1 = V2 = 5V b) V1 = 5V, V2 = 0V c) V1 = V2 = 5V 5V V1 V2 Q.8 300Ω D1 4.7kΩ V0 300Ω D2 (a) Calculate the anticipated factor by which the reverse saturation current of a germanium diode is multiplied when the temperature increased from 25 to 80ºC. (b) Repeat part(a) for a silicon diode over the range 25 to 150ºC. An ideal germanium p-n junction diode has at a room temperature of 125ºC a reverse saturation current of 30 µA. At a temperature of 125ºC find the dynamic resistance for a bias in (a) the forward direction (b) the reverse direction. Q.9 0.2V Q.10 The zero-voltage barrier height at an alloy germanium p-n junction is 0.2 V. The concentration NA of acceptor atoms in the p-side is much smaller than the concentration of donor atoms in the n- material, and NA = 3 x 1020 atoms/m3. Calculate the width of the depletion layer for an applied reverse voltage of (a) 10V and (b) 0.1 V and (c) for a forward bias of 0.1 V. 4 50 A single phase full-wave rectifier uses two diodes. : 45mA.5 Q. Idc and Irms. determine (i) dc load current (ii) dc out put voltage (iii) ripple voltage (iv) ripple factor Q.c.7 Give output of following clipper circuits when input to all circuits is a sinusoidal wave of peak voltage Vm. of 50 v. A half wave rectifier uses a diode with a forward resistance of 100 Ω If the input a. Calculate the % voltage regulation.c. – 2 A half wave rectifier uses a diode with an equivalent forward resistance of 0. 50mA.3Ω If the Irms Q. 79. voltage is 10V (rms) and the load resistance of 20Ω . Q.6 Ans. Q. the internal resistance each being 20Ω The transformer r. output voltage drops from 44V with no load to 42 V at full load.2 input a.3(a) What is the ripple factor for the ripple of 2v on avg. (Ans : r = V rms 2 = = 0. Determine (i) Imax. voltage is 220 V (rms) and the load resistance of 2 kΩ .04 ) V dc 50 (b) In a power supply the d.m. input power (v) ripple factor (vi) TUF (vii) Rectification efficiency.c. Find (a) The mean load current (b) Rms load current (c) Output efficiency Q. Calculate Idc and in the load. The filter used is shunt capacitor one with 20µ F . (ii) Peak Inverse voltage when diode is ideal (ii) Load output voltage (iv) d.1 TUTORIAL NO.58 What is the ripple 2V on average of 50V? A full wave rectifier has a peak output voltage of 25V at 50 Hz and feed a resistive load of 1KΩ .c.s.Q. + Vi – R VO + + Vi I V R VO + (a) – – (b) – .c. secondary voltage form centre tap each end of secondary is V and RL= 980Ω . output power and a. Q.8 Give output of following clipper circuits when input to all circuits is a sinusoidal wave of peak voltage Vm + Vi R + VO – (c) R + R + V i V1 – (e) V2 VO V – – + Vi + VO V – (d) – Q. + + Vi – (a) + Vi — – (c) – – ( C R VO + ( C R VO – – + Vi + Vi ( C R VO + (b) ( C R — (d) VO – + – .9 Give output of following clamper circuit a square wave input having maximum voltage Vm. Q. + Vi – ( C R V1 — VO + – (e) + Vi – ( C R V1 — (f) VO + – .10 Give output of following clamper circuit a square wave input having maximum voltage Vm. 27 V VL =8.2 K Ω VL Vz =10V.7 mW Q.9 (a) Find range of RL and IL that will maintain VL at 10V. - – Vz =10V.2K Ω Vi=16V PZM=30mW Vz=10V Q. Q.73V. – 3 Q1.3 Show that Zener diode can be used as a voltage regulator. 2. Pzm = 30 mu) (Ans.67 mA. IZ and PZ.7 Determine VL.27V. oW (b) 10V.4 What is Schottky diode? Why it is also called hot carrier diode? How does it differ in construction from a normal P-N junction? Give its working. characteristics and application.5 For the zener diode network. VR. Q.73V (b) VL = 10V VR= 6 V IL=3. Ans.TUTORIAL NO.8 Repeat above question with RL= 3 kΩ 1kΩ + ↓ IZ IL + Vi=50V RL VL Q.7 mW) Q. In what respect is an led different from an ordinary PN junction diode? Q. VR. : (a) 8.2 List the application of an LED. 1) VR 1 KΩ ↓IZ RL=1. b) Determine maximum voltage rating of diode.33 mA IR = 6mA IZ=1. Izm = 32 mA . IZ and PZ + VR 1 KΩ — IZ RL 16V 1.: (a) 1z = 0A PZ = 0W VR = 7. Q. oA. 7. 6V. Draw the V-I characteristics of Zener diode and also explain avalanche breakdown and zener breakdown. determine VL. 26.67 mA Pz = 26.6 Repeat above question with RL=3KΩ Q. : 250 Ω -1.2 KΩ + VL – Vi (Ans.25 KΩ mW) Q.(Ans. I2m = 60 mA TUTORIAL NO.87V) – VZ= 20 V.10 Determine range of Vi that will maintain zener diode in on state. : 23.67 V – 36. + 220 Ω IR IL IZ RL 1. – 4 . RB = 680 K Ω RE = 0. VBC = -10. Vc.22 V 22 V RC=10 KΩ β=140 R2= 3. VE & VBC Assume : VCC = 20 V Rc = 4. VE = 0.7 K. : VCE = 12.07 mA VCEQ = 3.69 V 250 K RB Vi Rc = 4.c. b) Differentiate between ICO and ICBO. bias voltage VCE and the current Ic for the voltage divider configuration.5 KΩ Q.2 K Ω Q.4 For the network shown in problem (2) Determine (a) ICQ & VCEQ2 (b) Find VB. β = 120 Ans. Q.26 V.2 Determine the d.: Vcc = 10V ICQ = 1.86 mA. : ICQ = 1.Q. VCEQ = 11.9 K R1= 39 K I/P RE=1.26V. VB = 0.78V.56V . What is the effect of temperature on ICBO. VC = 11. Ans.1 a) Define α and β of a transistor and derive the relationship between them.7 KΩ β = 90 RE = 1.3 Determine the quiescent levels of ICQ and VCEQ for the network shown below Ans. Ans.68 V IE = 4. : VCEQ= 11.448 V VB= -8.16 mA Vi RB 240 KΩ β = 90 Vo VEE = -20V Q.53 V VB= -11.8 KΩ .2 KΩ Vo Vi RB 100 KΩ β = 45 VEE = -9V Q.7 Determine Vc & VB for the network .Q.2 KΩ 1.7 KΩ Vo Vi β = 120 2.5 Determine Vc &VB for the network.59 V VCC = 20V 8.2 KΩ 2. : VC = .4.3V 1.6 Determine VCEQ and IE for the network Ans. : VC = 8. Ans. b) Repeat with 2k emitter resistance added as given in fig (b).13 V Vcc= +10V calculate = RB 240 KΩ Rc = 2.033 mA) then transistor will be in saturation (b) Ic = 1.35 mA (c) VB & Vc VCEQ = 6. IBmin = 0.83 V VB = 0.910 Repeat the above problem when a resistance RE=1 KΩ is attached between emitter and ground.:IBQ = 47. determine whether or not the transistor is in saturation and find IB and IC. IB = 0. : Find IB by calculation and final (IB)min = or .71 mA.2 KΩ Ic + β=50 VCE O/p IB I/p Q.83V (d) VBC VBC = .8 a) In the circuits shown fig (a). If (IB)calculated > (IB) min (IB 0. (a) IBQ.7V. – 5 .0171 mA.9 Determine the following for the fixed bias configuration.084 mA.72 Q. TUTORIAL NO.Q. 10 V 3 KΩ RB= 50 KΩ hfe = 100 5V 5V RE = 2KΩ 50 K 10 V 3K β = 100 (a) (b) Hint. Vqb = 0.6. ICQ Ans.08 µ A (b) VCEQ ICQ = 2. VC = 6. A base resistor biasing circuit shown in fig 1. RC=1K. collector emitter voltage and collector voltage. RE=1 kΩ . β = 80. 6 V.3 Q. In a CE germanium transistor amplifier circuit the bias is provided by self bias. If VCC = 15 V.1 Q.Q.3 (i) Q. If transistor is replaced by another having β = 150. VCE = 8V. what will be new coordinates of operating point.5 Q.985. (i) What will be the new operating point if β changes to 150 assuming all other values of the circuit to be same. R1 = 56 kΩ . Calculate the value of RB in fig.3 V and β= 100. Determine emitter current.6 What is the need for biasing the transistor? Briefly explain the reason for keeping the operating point of a transistor as fixed. . A transistor biased by potential divider and emitter resistance biasing has its zero operating point fixed at 2 mA. R2 = 10 kΩ and VBE = V. A voltage divider biasing circuit is shown in fig. VCC = 12V.8 Q. Determine (a) the coordinates of the operating points (b) the stability factor S.4 Q. Determine IC and VCE neglect VBE and β = 60 (ii) if RB is changed to 200 kΩ Calculate collector current and collector to emitter voltage for the circuit shown in fig.7 Q. R2 = 20 kΩ Q. (a)What is thermal runaway? How can it be avoided? (b) Define stability factor. It is desired to set the operating point using feedback resistor method of biasing at I C = 1mA. What will be value of RC and RB. RC = 3kΩ .(4) so that operating point is fixed at IC = 6. RE = 2kΩ . VBE = 0. The various parameters are VCC = 16V.2 Q.9 0. Find value of RC and R1. (2) Calculate the coordinates of operating point in fixed biasing circuit shown in fig(3). (5).4 mA and VCE = 3V. Given RB=120K.10 and α = 0. 5 RE 1 kΩ R2 10 kΩ Figure .VBB +6 V VCC +12 V VCC 6V RB 200 KΩ Rc 2 KΩ β=50 RB 300 KΩ Rc 3 KΩ Figure .6 RE 1 kΩ .4 RE 5000 + – 100 µF VCC 18 V VCC +15V R1 7 kΩ Rc 2K Ω R1 Rc R2 2 kΩ Figure .3 Figure .1 Figure .2 VCC 12 V VCC 10 V RB Rc β=60 RB Rc 250 Ω β=80 Figure . 642 mA. Determine (a) the value of RB (b) stability factor and (c) what will be the new operating point if β= 50 with all other circuit values are same. 1) For the circuit shown. S=56. a silicon transistor with feedback resistor is used. – 6 Q.5 (C) Ic = 0. : RB = 630 K Ω . prove that the stability factor S is given by Vcc RC RB Vout IB Vin + VBE Q. 2) – In the biasing with feedback resistor method. The operating point is at 7V.TUTORIAL NO. VCE = 8. 1mA and Vcc = 12V.79 V Vcc Ic↓ RC RB IB Vin + VBE – Vout . Assume β= 100. Ans. 3 K. Determine (a) co-ordinates of the operating points (b) the stability factor S. the bias is provided by self bias.537 A voltage divider bias circuit is designed to establish the Q-point at VCE = 12V. 4) Q. : (a)Ic= 1.4K. R1=56 K. i. : RE = 1.Q. If Vcc = 24V.e. Rc = 3K. VBE = 0. the various parameters are Vcc = 16V. 5) by – For the two – battery transistor circuit shown. RE=2K. VCE=7. 6) Determine the stability factor S for the circuit shown. 3) In a CE germanium transistor amplifier circuit. Determine the values of RE.7 V. β=50 and Rc = 47K. R2. Ic = 2mA and stability factor S< 5. (Ans. emitter resistor and potential divider arrangement. Ans. prove that the stabilization factors is given B Rc RB Q. Vcc Rc RE + – V 1 – + V2 R1 B R2 Ro .985.35V (b) S=7. R2=6. R1. R2=20K and α = 0. R1 = 6.1.73 mA.5K) Q. Ri. Calculate AI = .9 For the circuit shown is a two stage amplifier circuit CE – CC configuration.7 The transistor amplifier shown uses a transistor whose parameters are given (refer book). The transistor parameters at corresponding Q-point are hie=2 hfe= 50 hre=6x10– 4 hoe = 25A/V . Av. Ro. Avs and . Avs.Q. Va R1 100 KΩ Ii Vo R2 10 KΩ – Ri Ie↓ RL 5 KΩ + RS 10 KΩ VS ∼ Q.8 For amplifier show calculate Ri. = (for the transistor parameter refer book) Vcc R1 RS 10 KΩ + VS ∼ – Vo 200 KΩ RL 10 KΩ + I2↓ – R′ i Ri Q. . Av. Justify the validity of approximate hybrid model applicable in low frequency region. output impedances and individual. List its three most important characteristics. current gain.hic=2 hfc = -51 Vcc hrc = 1 hoc = 25A/V RC1 5 KΩ Q2 RS + VS ∼ – 1KΩ Q1 Rc2 5 KΩ Find the input. (g) Lowest AI (h) Highest AI.87 KΩ . and Rs = 1K . CE. 1) (a) In terms of h-parameters and the source resistance. (b) Draw the circuit of an emitter follower. derive the expression for (a) AI and Ri.6 Avs = -75.2 Derive the equation for voltage gain.3 TUTORIAL NO. Why it is used in hybrid models.991 Ai1= 45.5 Ri1 = 1.7 For the figure shown is connected as common emitter amplifier.5 KΩ .3 Ri2 = 228. If R L = 10K. as well as overall. Av1 = 16.3. (b) Lowest Ri (c) Highest Ro (d) Lowest Ro (e) Lowest Av (f) highest Av. Av2 = 0. . Q. – 7 Q.5 What is Miller’s Theorem. CC) has the (a) highest Ri. + Vo – Ai2= 45.4. Draw the AC equivalent of a CE amplifier with fixed bias using h-parameter model. Find the various gains and input and output impedance.6 Which of the configurations (CB. derive the equation for output admittance. Q. Q. (c) Derive the expression for Av in terms of AI. (b) Find (i) Avs in terms of Av (ii) AIS in terms of AI. (d) In terms of the h-parameter and the load impedance. Q. input impedance and out put impedance for a BJT using h-parameter model for (a) CE configuration (b) CB configuration (c) CC configuration Q. Q. voltage and current gains. Explain how the transconductance of a JFET varies with drain current and gate voltage.9 TUTORIAL NO. Establish the relation between them.4 Q. – 8 Q. it behaves as a resistance R given approximately by Given IDSS = 9 mA and VP = -3. (b) Draw the circuits for the CE & CC configurations subjected to the restriction that the input is open circuited. Show that the input impedance of the two circuits are same.5V (d) VGS = -5V Determine the value of Rs required to self bias an N channel JFET with IDSS = 50 mA. For any single transistor amplifier prove that RI = hi /(1-hr Av) Q. 5 Why a field effect transistor is called so? Also explain why BJT is bipolar device while FET is unipolar device.8 I1 V1 Two – port active Network (Transistor) I2 V2 ↓IL RL Yo (a) Draw the equivalent circuit for CE & CC configurations subjected to the restriction that RL = 0. Vp = -10 V and VGSQ = 5 V.3 Q. Define and explain the parameters transconductance gm.5 V.6 . (Ans.: Rs = 400Ω ) Q.2 Q. drain resistance rd and amplification factor µ of a JFET.1 Q. Show that output impedances of two are same. Show that if a JFET is operated at sufficiently low drain voltage.Rs + Vs ∼ – Zin Q. determine ID when (a) VGS = 0V (b) VGS = -2V (c) VGS = -3. 5 KΩ ) For JFET biased in self bias configuration.9 Q. Calculate the gain of negative feed back amplifier having A = -2000 and β = -1/10.2 V.8 In an N channel JFET biased by voltage divider method.921.: -5. AIf = AI An amplifier with open loop voltage gain AV = 1000± 100 is available.10 TUTORIAL NO. – 9 Q. The FET has drain resistance rd = 200 k Ω and µ = 20. Find the open loop gain and closed loop gain.: 7895.7 Q. When the feed back is removed the distortion becomes 15%.04.Q. (Ans.1 percent.6 Ω IDSS = 12 mA. How does negative feed back reduce distortion in an amplifier? The distortion in an amplifier is found to be 3% when the feed back ratio of negative feed back amplifier is 0. Vp = -4 V. Given VDD = 25 V. Determine VDS and VGS. Rg1 = 1. 0.6 Q. Rg2 = 0. -2. Compute the voltage gain and output impedance Ro. -0.2 Q.8 V) A common source FET amplifier uses load resistance R D = 100 KΩ and an unbypassed resistor RS is the source circuit. RD = 3 K Ω . 5 Q.777) A CD amplifier uses FET having rd = 300 kΩ and µ = 15. for the following values of Rs (i) 2 kΩ (ii) 10 kΩ and (iii) 20 k Ω (Ans.882) Q.1 Q. determine value of R S to give operating point ID = 4mA & VDS = 8V.: 18.3 What do you understand by feedback in amplifiers? Explain the terms feedback factor and open loop gain.: 2. -3. (a) find the reverse transmission factor β of the feed back network used.4 Q. What are the advantages and disadvantages of positive and negative feedback. (b) find the gain with feed back. Compute (a) the output impedance and (b) the voltage gain for the following values of load resistance Rs (i) 100 k Ω (ii) 300 KΩ (Ans. Explain the characteristics of Negative feed back amplifiers. prove that the voltage –series feed back with RS =0.7 . Q. 847. RS = 400 Ω and ID = 2mA (Ans. It is necessary to have an amplifier whose voltage gain varies by no more than ± 0.2 MΩ . Given VDD = 25 V. 9 Q. calculate the total harmonic distortion fundamental power component and total power. Ri = 1. input and output impedances of a voltage series feedback amplifier having A = -300. output power and the circuit efficiency.3 A and Rc = 4Ω.5 kΩ.1 V and the fourth harmonic component of 0. Calculate the harmonic distortion components for an output signal having fundamental amplitude of 2. Calculate the gain.05V. D3 = 0.05 with I1 = 3.15.3 Q. TUTORIAL NO. For distortion reading of D2 = 0. Ro = 50 kΩ and β = -1/15.4 Q.8 Q.10 Calculate the gain.1 Q. RD = 8 kΩ and gm = 5000µS.Q.5%. Ro = 50 kΩ and β = -1/15. Ri = 1. 5 Q. Ro = 40 kΩ. R2 = 200 kΩ. rd = 36 kΩ and feed back resistor R = 12kΩ is to operate at 2. Calculate the gain with and without feed back for an FET amplifier for circuit values R 1 = 800 kΩ.3 V third harmonic component of 0. determine the input power .01 and D4 = 0.7 Q.8 .5 kΩ. Select C for specified oscillator operation.2 Q. input and output impedances of a voltage series feedback amplifier having A = -300. An FET phase shift oscillator having gm = 6000 µS.6 How are amplifier classified based on the biasing condition? Explain the following type of distortion in amplifiers (i) harmonic distortion (ii) frequency distortion (iii) phase distortion Draw the circuit diagram of a push pull amplifier and explain its working. Q.5 kHz. – 10 Q. For a class B amplifier providing a 20 V peak signal to a 16Ω load (speaker) and a power supply of VCC = 30V.1 V second harmonic amplitude of 0. Prove that the efficiency of class B amplifier is 78. . R2 = 200 kΩ. Select C for specified oscillator operation.10 Calculate the gain with and without feed back for an FET amplifier for circuit values R 1 = 800 kΩ. RD = 8 kΩ and gm = 5000µS. rd = 36 kΩ and feed back resistor R = 12kΩ is to operate at 2.5 kHz.9 Q. Ro = 40 kΩ.Q. An FET phase shift oscillator having gm = 6000 µS.